A82DL1644 - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70 - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70F - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70I - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70IF - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70U - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644TG-70UF - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70 - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70F - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70I - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70IF - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70U - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL1644UG-70UF - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL16x2 - A82DL16x2T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only,The A82DL16x2T(U) family consists of 16 megabit, 3.0 voltonlyflash memory devices, organized as 1,048,576 words of16 bits each or 2,097,152 bytes of 8 bits each. Word modedata appears on I/O0–I/O15; byte mode data appears on I/O0–I/O7. The device is designed to be programmed in-systemwith the standard 3.0 volt VCC supply, and can also beprogrammed in standard EPROM programmers.
A82DL16x4 - A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Mx16 Bit) CMOS 3.3 Volt-only,The A82DL16x2T(U) family consists of 16 megabit, 3.0 voltonlyflash memory devices, organized as 1,048,576 words of16 bits each or 2,097,152 bytes of 8 bits each. Word modedata appears on I/O0–I/O15; byte mode data appears on I/O0–I/O7. The device is designed to be programmed in-systemwith the standard 3.0 volt VCC supply, and can also beprogrammed in standard EPROM programmers.
A82DL16X4T - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM, A82DL16x4T(U) 16 Megabit (2Mx8 Bit/1Simultaneous Operation Flash Memory and 4M (256Kx16 Bit) S
A82DL32x4 - A82DL32x4T(U) 32 Megabit (4Mx8 Bit/2Mx16 Bit) CMOS 3.3 Volt-only,The A82DL32x4T(U) family consists of 32 megabit, 3.0 voltonlyflash memory devices, organized as 2,097,152 words of16 bits each or 4,194,304 bytes of 8 bits each. Word modedata appears on I/O0–I/O15; byte mode data appears on I/O0–I/O7. The device is designed to be programmed in-systemwith the standard 3.0 volt VCC supply, and can also beprogrammed in standard EPROM programmers.
FQV2105 - 3.3 Volt Synchronous x18 First-In/First-Out QueueHBA’s FlexQ™ II offers industry leading FIFO queuing bandwidth (up to 3.0 Gbps), withA wide range of memoryconfigurations (from 8,192 x 18 to 262,144 x 18). System designer has full flexibility of implementing deeper and wider queuesusing FWFT mode and width expansion features. Full, Empty, and Half-Full indicators allow easy handshaking betweentransmitters and receivers. User programmable Almost Full and Almost Empty (Parallel/Serial) indicators allow imple
LLP62E16128A - 128K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62E16128A-T isA low operating current2,097,152-bit static random access memory organized as131,072 words by 16 bits and operates on low powervoltage from 1.65V to 2.2V. It is built using AMIC\'s highperformance CMOS process.
LP61L1008 - 128k X 8 Bit 3.3v High Speed Center Power Cmos Sram
LP61L1008A - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008AS-10 - 128k X 8 Bit 3.3v High Speed Center Power Cmos Sram
LP61L1008AS-12 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008AS-8 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008S-12 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008S-15 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008X-12 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1008X-15 - 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
LP61L1024 - 128k X 8 Bit 3.3v High Speed Low Vcc Cmos Sram
LP61L1024-12 - SRAM High Speed Asynchronous 1Mb x8
LP61L1024-15 - SRAM High Speed Asynchronous 1Mb x8
LP621024D-55LLTF - 128K X 8 BIT CMOS SRAMThe LP621024D-T isA low operating current 1,048,576-bitstatic random access memory organized as 131,072 wordsby 8 bits and operates onA single 5V power supply.Inputs and three-state outputs are TTL compatible andallow for direct interfacing with common system busstructures.
LP621024DM-55LLTF - 128K X 8 BIT CMOS SRAMThe LP621024D-T isA low operating current 1,048,576-bitstatic random access memory organized as 131,072 wordsby 8 bits and operates onA single 5V power supply.Inputs and three-state outputs are TTL compatible andallow for direct interfacing with common system busstructures.
LP62E16256EU-70LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62E16256E-T isA low operating current 4,194,304-bit static random access memory organized as 262,144words by 16 bits and operates on low power voltage from1.65V to 2.2V. It is built using AMIC\'s high performanceCMOS process.
LP62E16256EV-70LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62E16256E-T isA low operating current 4,194,304-bit static random access memory organized as 262,144words by 16 bits and operates on low power voltage from1.65V to 2.2V. It is built using AMIC\'s high performanceCMOS process.
LP62E16512 - 512K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62E16512-T isA low operating current 8,388,608-bitstatic random access memory organized as 524,288 wordsby 16 bits and operates on low power voltage from 1.65V to2.2V. It is built using AMIC\'s high performance CMOSprocess.
LP62E16512-I - 512k X 16 Bit Low Voltage Cmos Sram
LP62E16512-T - 512k X 16 Bit Low Voltage Cmos Sram
LP62S16256F - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FU-55LLT - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FU-55LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FU-70LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FV-55LLT - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FV-55LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16256FV-70LLTF - 256K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16256F-T isA low operating current 4,194,304-bitstatic random access memory organized as 262,144 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16512 - 512K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16512-T isA low operating current 8,388,608-bitstatic random access memory organized as 524,288 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16512-I - 512k X 16 Bit Low Voltage Cmos Sram
LP62S16512-T - 512k X 16 Bit Low Voltage Cmos Sram
LP62S16512U-55LLTF - 512K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16512-T isA low operating current 8,388,608-bitstatic random access memory organized as 524,288 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S16512U-70LLTF - 512K X 16 BIT LOW VOLTAGE CMOS SRAMThe LP62S16512-T isA low operating current 8,388,608-bitstatic random access memory organized as 524,288 wordsby 16 bits and operates on low power voltage from 2.7V to3.6V. It is built using AMIC\'s high performance CMOSprocess.
LP62S4096E - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EU-55LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EV-55LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EV-70LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EX-55LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EX-70LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EXR-55LLT - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EXR-55LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EXR-70LLT - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
LP62S4096EXR-70LLTF - 512K X 8 BIT LOW VOLTAGE CMOS SRAMThe LP62S4096E-T isA low operating current 4,194,304-bitstatic random access memory organized as 524,288 words by 8bits and operates onA low power supply range: 2.7V to 3.3V. Itis built using AMIC\'s high performance CMOS process.Inputs and three-state outputs are TTL compatible and allow fordirect interfacing with common system bus structures.Two chip enable inputs are provided for POWER-DOWN anddevice enable and an output enable input is included for easyinterfacing.
MD7101_A01 - 2,4GHz 64Kbps FSK Receiver ModuleThe receiver module is designed for 2.4GHz ISM band wireless applications using AMIC A7101 FSK transceiver. Thismodule featuresA fully programmable frequency synthesizer, which is base on 100KHz reference frequency and300uA charge pump output current. The data rate is 57.6Kbps or 64Kbps.