CY2310ANZ - 3.3v Sdram Buffer For Mobile Pcs With 4 So-dimms
CY2310ANZPVC-1 - 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
CY2310ANZPVC-1T - 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
CY2310ANZPVXC-1 - 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
CY2310ANZPVXC-1T - 3.3V SDRAM Buffer for Mobile PCs with 4 SO-DIMMs
CY2310BNZPVC-1 - High Performance Clock and Data Buffers Without PLL
CY2310BNZPVI-1 - High Performance Clock and Data Buffers Without PLL
CY2313ANZ - 13 Output, 3.3v Sdram Buffer For Desktop Pcs With 3 Dimms
CY2313ANZSC-1 - 13 Output, 3.3V SDRAM Buffer for Desktop PCs with 3 DIMMs
CY2314ANZSC-1 - High Performance Clock and Data Buffers Without PLL
CY2318ANZ - 18 Output, 3.3v Sdram Buffer For Desktop Pcs With 4 Dimms
CY2318ANZOXC-11 - 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
CY2318ANZOXC-11T - 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
CY2318ANZPVC-11 - 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
CY2318ANZPVC-11T - 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs
CY2318BNZPVC-1 - High Performance Clock and Data Buffers Without PLL
CY2318BNZPVC-11 - High Performance Clock and Data Buffers Without PLL
CY2318BNZPVI-11 - High Performance Clock and Data Buffers Without PLL
CY23EP05 - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXC-1 - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXC-1H - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXI - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXI-1 - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXI-1H - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP05SXIT - 2.5V or 3.3V, 220-MHz, 5- Output Zero Delay BufferThe CY23EP05 has 8 pins; it accepts one reference input, and drives out five low-skew clocks. The -1H version operates at up to 220 MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 device. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.The CY23EP05 PLLs enterA power-down mode when there are no rising edges on the REF input. In this state, the outputs are
CY23EP09 - 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay BufferThe CY23EP09 isA 2.5V or 3.3V zero delay buffer designed to distribute high-speed clocks and is available inA 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.There are two banks of four outputs each that can be co
CY23EP09SXC-1 - 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay BufferThe CY23EP09 isA 2.5V or 3.3V zero delay buffer designed to distribute high-speed clocks and is available inA 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.There are two banks of four outputs each that can be co
CY23EP09SXC-1H - 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay BufferThe CY23EP09 isA 2.5V or 3.3V zero delay buffer designed to distribute high-speed clocks and is available inA 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.There are two banks of four outputs each that can be co
CY23EP09SXI-1 - 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay BufferThe CY23EP09 isA 2.5V or 3.3V zero delay buffer designed to distribute high-speed clocks and is available inA 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.There are two banks of four outputs each that can be co
CY23EP09SXI-1H - 2.5V or 3.3V, 10-220-MHz, Low Jitter, 9-Output Zero Delay BufferThe CY23EP09 isA 2.5V or 3.3V zero delay buffer designed to distribute high-speed clocks and is available inA 16-pin SOIC or TSSOP package. The -1H version operates up to 220 (200) MHz frequencies at 3.3V (2.5V), and has higher drive than the -1 devices. All parts have on-chip PLLs that lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad.There are two banks of four outputs each that can be co
CY23FP12 - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OC - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OCT - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OI - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OIT - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OXC - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OXCT - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OXI - 200-MHz Field Programmable Zero Delay Buffer
CY23FP12OXIT - 200-MHz Field Programmable Zero Delay Buffer
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