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Электронный компонент: AD10678

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16-Bit, 80 MSPS A/D Converter
AD10678
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
2003 Analog Devices, Inc. All rights reserved.
FEATURES
80 MSPS sample rate
80 dBFS signal-to-noise ratio
Transformer-coupled analog input
Single PECL clock source
Digital outputs
True binary format
3.3 V and 5 V CMOS compatible
APPLICATIONS
Low signature radar
Medical imaging
Communications instrumentation
Instrumentation
Antenna array processing
FUNCTIONAL BLOCK DIAGRAM
AD10678
ANALOG
POWER
CLOCK DISTRIBUTION
CIRCUIT
DIGITAL POWER
ENCODE ENCODE
OUTPUT
DATA
BITS
DIGITAL
POST-
PROCES-
SING
AGND
ADC
ADC
ADC
ADC
AGND
DGND
DGND
3.3VE
3.3V
5VA
AIN
AIN
D
OUT
0
D
OUT
15
14
14
14
14
03376-A
-
001
DRY
Figure 1.
GENERAL DESCRIPTION
The AD10678 is a 16-bit, high performance, analog-to-digital
converter for applications that demand increased SNR levels.
Exceptional noise performance and a typical signal-to-noise
ratio of 80 dBFS are obtained by digitally postprocessing the
outputs of four ADCs. Only a single analog input and PECL
sampling clock, as well as 3.3 V and 5 V power supplies, are
required.
The AD10678 is assembled using a 0.062" thick laminate board
with three sets of connector interface pads to accommodate
analog and digital isolation. Analog Devices recommends using
this connector from Samtec: FSI-110-03-G-D-AD-K-TR. The
overall card fits a 2.2" 2.8" PCB specified from 0C to 70C.
PRODUCT HIGHLIGHTS
1.
Guaranteed sample rate of 80 MSPS.
2.
Input signal conditioning with optimized noise
performance.
3.
Fully tested and guaranteed performance.
AD10678
Rev. A | Page 2 of 20
TABLE OF CONTENTS
Features .......................................................................................... 1
Applications................................................................................... 1
Functional block diagram ........................................................... 1
General Description..................................................................... 1
Product Highlights ....................................................................... 1
Revision History ........................................................................... 2
AD10678Specifications ................................................................. 3
DC Specifications ......................................................................... 3
Digital Specifications ................................................................... 3
AC Specifications.......................................................................... 4
Switching Specifications .............................................................. 5
Explanation of Test Levels............................................................5
Absolute Maximum Ratings ............................................................6
Operating Range............................................................................6
ESD Caution...................................................................................6
Test Circuits........................................................................................7
AD10678Typical Performance Characteristics ........................ 10
Definition of Specifications ...................................................... 12
Thermal Considerations............................................................ 12
Theory of Operation.................................................................. 13
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
12/03--Data sheet changed from REV. 0 to REV.A
Updated format....................................................................Universal
Changes to AC Specifications table footnotes ............................... 4
Changes to Table 1............................................................................. 3
Changes to Table 3............................................................................. 6
Changes to Figure 11....................................................................... 10
Changes to Theory of Operation................................................... 13
Changes to Ordering Guide ........................................................... 20
AD10678
Rev. A | Page 3 of 20
AD10678SPECIFICATIONS
DC SPECIFICATIONS

Table 1. AV
CC
= 5 V, EV
CC
= 3.3 V, V
DD
= 3.3 V; T
A
= 25C, Differential Encode = 80 MSPS, C
LOAD
10 pF, unless otherwise noted.
Parameter
Test Level
Min
Typ
Max
Unit
RESOLUTION
16
Bits
Offset Error
I
0.30
+0.12
+0.30
%FS
Gain Error
I
7
+7
%FS
Differential Nonlinearity (DNL)
V
0.7
LSB
Integral Nonlinearity (INL)
V
4
LSB
TEMPERATURE DRIFT
Offset Error
V
13
ppm/C
Gain Error
V
200
ppm/C
POWER SUPPLY REJECTION RATIO (PSRR)
V
60
dB
ANALOG INPUTS (AIN, AIN)
1
Differential Input Voltage Range
V
2.15
V p-p
Differential Input Resistance
V
50
Differential Input Capacitance
V
2.5
nF
Input Bandwidth
IV
0.40
220
MHz
VSWR
2
V
1.04:1
Ratio
POWER SUPPLY
3
Supply Current
IAV
CC
(AV
CC
= 5.0 V)
I
0.95
1.1
A
IEV
CC
(EV
CC
= 3.3 V)
I
0.15
0.2
A
IV
DD
(V
DD
= 3.3 V)
I
0.49
0.625
A
Total Power Dissipation
4
I
6.86
8.0
W
1
Measurement includes the recommended interface connector.
2
Input VSWR, see
.
Figure 15
3
Supply voltages should remain stable within 5% for normal operation.
4
Power dissipation measures with encode at rated speed and 1 dBFS analog input at 10 MHz.
DIGITAL SPECIFICATIONS

Table 2. AV
CC
= 5 V, EV
CC
= 3.3 V, V
DD
= 3.3 V; T
A
= 25C, Differential Encode = 80 MSPS, C
LOAD
10 pF, unless otherwise noted.
Parameter
Test Level
Min
Typ
Max
Unit
ENCODE INPUTS (ENCODE, ENCODE)
Differential Input Voltage Range
IV
0.4
V p-p
Differential Input Resistance
V
100
Differential Input Capacitance
V
160
pF
LOGIC OUTPUTS (D15 to D0)
Logic Compatibility
CMOS
Logic 1 Voltage--I
LOAD
100 mA
IV
0.9 V
DD
V
Logic 0 Voltage--I
LOAD
100 mA
IV
0.4
V
Output Coding
True Binary
Series Output Resistance--per Bit
120
AD10678
Rev. A | Page 4 of 20
AC SPECIFICATIONS
Table 3. AV
CC
= 5 V, EV
CC
= 3.3 V, V
DD
= 3.3 V; TA = 25C, Differential Encode = 80 MSPS, C
LOAD
10 pF, unless otherwise noted.
Parameter Test
Level
Min
Typ
Max
Unit
SNR
1
Analog Input
2.5 MHz
I
77.5
80.5
dBFS
@ 6 dBFS
10 MHz
I
77.5
80.5
dBFS
30 MHz
I
77
80.2
dBFS
70 MHz
I
76
78
dBFS
SINAD
2
Analog Input
2.5 MHz
I
77.2
80.3
dBFS
@ 6 dBFS
10 MHz
I
77.2
80.3
dBFS
30 MHz
I
76.6
79.7
dBFS
70 MHz
I
74.7
77.4
dBFS
SFDR
3
Analog Input
2.5 MHz
I
88
97.2
dBFS
@ 6 dBFS
10 MHz
I
88
97.2
dBFS
30 MHz
I
84
94.2
dBFS
70 MHz
I
81
91.7
dBFS
TWO-TONE
4
Analog Input
@ 7 dBFS--IMD
f1 = 10 MHz, f2 = 12 MHz
V
96
dBFS
f1 = 70 MHz, f2 = 72 MHz
V
84
dBFS
1
Analog input signal power at 6 dBFS; signal-to-noise (SNR) is the ratio of signal level to total noise (first five harmonics removed).
Encode = 80 MSPS. SNR is reported in dBFS, related back to converter full scale.
2
Analog input signal power at 6 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics.
Encode = 80 MSPS. SINAD is reported in dBFS, related back to converter full scale.
3
Analog input signal equals 6 dBFS; SFDR is the ratio of converter full scale to worst spur.
4
Both input tones at7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third-order intermodulation product.
AD10678
Rev. A | Page 5 of 20
SWITCHING SPECIFICATIONS
Table 4. AV
CC
= 5 V, EV
CC
= 3.3 V, V
DD
= 3.3 V; T
A
= 25C, Differential Encode = 80 MSPS, C
LOAD
10 pF, unless otherwise noted.
Parameter
Test Level
Min
Typ
Max
Unit
MAXIMUM CONVERSION RATE
I
80
MSPS
MINIMUM CONVERSION RATE
IV
30
MSPS
DUTY CYCLE
IV
40
60
%
ENCODE INPUTS PARAMETERS
Encode Period @ 80 MSPS, t
ENC
V
12.5
ns
Encode Pulse Width High @ 80 MSPS, t
ENCH
V
6.25
ns
Encode Pulse Width Low @ 80 MSPS, t
ENCL
V
6.25
ns
ENCODE/DATA (D15:D0)
Propagation Delay, t
PDH
6.7
ns
Valid Time, t
PDL
7.3
ns
ENCODE/DATA READY
1
Encode Rising to Data Ready Falling, t
DR_F
12.6
ns
Encode Rising to Data Ready Rising, t
DR_R
6.4
ns
DATA READY/DATA
1
Data Ready to Data (Hold Time)--t
H_DR
10
ns
Data Ready to Data (Setup Time)--t
S_DR
1
ns
APERTURE DELAY, t
A
V
480
ps
APERTURE UNCERTAINTY (JITTER), t
J
V
500
fs rms
PIPELINE DELAYS
V
10
Cycles
1
Duty Cycle = 50%.
EXPLANATION OF TEST LEVELS
I.
100% production tested.
II.
100% production tested at 25C and sample tested at specified temperatures.
III.
Sample tested only.
IV.
Parameter is guaranteed by design and characterization testing.
V.
Parameter is a typical value only.
VI.
100% production tested at 25C; guaranteed by design and characterization testing for industrial temperature range; 100%
production tested at temperature extremes for military devices.