REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD629
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
High Common-Mode Voltage
Difference Amplifier
FEATURES
Improved Replacement for:
INA117P and INA117KU
270 V Common-Mode Voltage Range
Input Protection to:
500 V Common Mode
500 V Differential
Wide Power Supply Range ( 2.5 V to 18 V)
10 V Output Swing on 12 V Supply
1 mA Max Power Supply Current
HIGH ACCURACY DC PERFORMANCE
3 ppm Max Gain Nonlinearity
20 V/ C Max Offset Drift (AD629A)
10 V/ C Max Offset Drift (AD629B)
10 ppm/ C Max Gain Drift
EXCELLENT AC SPECIFICATIONS
77 dB Min CMRR @ 500 Hz (AD629A)
86 dB Min CMRR @ 500 Hz (AD629B)
500 kHz Bandwidth
APPLICATIONS
High Voltage Current Sensing
Battery Cell Voltage Monitor
Power Supply Current Monitor
Motor Control
Isolation
FUNCTIONAL BLOCK DIAGRAM
8-Lead Plastic Mini-DIP (N) and SOIC (R) Packages
1
2
3
4
8
7
6
5
21.1k
380k
380k
380k
20k
REF()
IN
+IN
V
S
NC
+V
S
OUTPUT
REF(+)
AD629
NC = NO CONNECT
GENERAL DESCRIPTION
The AD629 is a difference amplifier with a very high input
common-mode voltage range. It is a precision device that
allows the user to accurately measure differential signals in the
presence of high common-mode voltages up to
270 V.
The AD629 can replace costly isolation amplifiers in applications
that do not require galvanic isolation. The device will operate
over a
270 V common-mode voltage range and has inputs
that are protected from common-mode or differential mode
transients up to
500 V.
The AD629 has low offset, low offset drift, low gain error drift,
as well as low common-mode rejection drift, and excellent CMRR
over a wide frequency range.
The AD629 is available in low-cost, plastic 8-lead DIP and
SOIC packages. For all packages and grades, performance is
guaranteed over the entire industrial temperature range from
40
C to +85C.
FREQUENCY Hz
100
50
20
100
COMMON-MODE REJECTION RATIO
dB
1k
10k
20k
95
90
85
80
75
70
65
60
55
Figure 1. Common-Mode Rejection Ratio vs. Frequency
60V/DIV
2mV/DIV
240
120
0
120
240
COMMON-MODE VOLTAGE Volts
OUTPUT ERROR
2mV/DIV
Figure 2. Common-Mode Operating Range. Error Voltage
vs. Input Common-Mode Voltage
REV. A
2
AD629SPECIFICATIONS
AD629A
AD629B
Parameter
Condition
Min
Typ
Max
Min
Typ
Max
Unit
GAIN
V
OUT
=
10 V, R
L
= 2 k
Nominal Gain
1
1
V/V
Gain Error
0.01
0.05
0.01
0.03
%
Gain Nonlinearity
4
10
4
10
ppm
R
L
= 10 k
1
1
3
ppm
Gain vs. Temperature
T
A
= T
MIN
to T
MAX
3
10
3
10
ppm/
C
OFFSET VOLTAGE
Offset Voltage
0.2
1
0.1
0.5
mV
V
S
=
5 V
1
mV
vs. Temperature
T
A
= T
MIN
to T
MAX
6
20
3
10
V/C
vs. Supply (PSRR)
V
S
=
5 V to 15 V
84
100
90
110
dB
INPUT
Common-Mode Rejection Ratio
V
CM
=
250 V dc
77
88
86
96
dB
T
A
= T
MIN
to T
MAX
73
82
dB
V
CM
= 500 V p-p DC to 500 Hz
77
86
dB
V
CM
= 500 V p-p DC to 1 kHz
88
90
dB
Operating Voltage Range
Common-Mode
270
270
V
Differential
13
13
V
Input Operating Impedance
Common-Mode
200
200
k
Differential
800
800
k
OUTPUT
Operating Voltage Range
R
L
= 10 k
13
13
V
R
L
= 2 k
12.5
12.5
V
V
S
=
12 V, R
L
= 2 k
10
10
V
Output Short Circuit Current
25
25
mA
Capacitive Load
Stable Operation
1000
1000
pF
DYNAMIC RESPONSE
Small Signal 3 dB Bandwidth
500
500
kHz
Slew Rate
1.7
2.1
1.7
2.1
V/
s
Full Power Bandwidth
V
OUT
= 20 V p-p
28
28
kHz
Settling Time
0.01%, V
OUT
= 10 V Step
15
15
s
0.1%, V
OUT
= 10 V Step
12
12
s
0.01%, V
CM
= 10 V Step, V
DIFF
= 0 V
5
5
s
OUTPUT NOISE VOLTAGE
0.01 Hz to 10 Hz
15
15
V p-p
Spectral Density,
100 Hz
1
550
550
nV/
Hz
POWER SUPPLY
Operating Voltage Range
2.5
18
2.5
18
V
Quiescent Current
V
OUT
= 0 V
0.9
1
0.9
1
mA
T
MIN
to T
MAX
1.2
1.2
mA
TEMPERATURE RANGE
For Specified Performance
T
A
= T
MIN
to T
MAX
40
+85
40
+85
C
NOTES
1
See Figure 19.
Specifications subject to change without notice.
(T
A
= 25 C, V
S
= 15 V unless otherwise noted)
REV. A
AD629
3
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Internal Power Dissipation
2
DIP (N) . . . . . . . . . . . . . . . . . . . . . . . . See Derating Curves
SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . See Derating Curves
Input Voltage Range, Continuous . . . . . . . . . . . . . . . .
300 V
Common-Mode and Differential, 10 sec . . . . . . . . . . .
500 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Pin 1, Pin 5 . . . . . . . . . . . . . . . . . . V
S
0.3 V to +V
S
+ 0.3 V
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 150
C
Operating Temperature Range . . . . . . . . . . 55
C to +125C
Storage Temperature Range . . . . . . . . . . . . 65
C to +150C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may effect device reliability.
2
Specification is for device in free air: 8-Lead Plastic DIP,
JA
= 100
C/W; 8-Lead
SOIC Package,
JA
= 155
C/W.
AMBIENT TEMPERATURE C
MAXIMUM POWER DISSIPATION
Watts
2.0
50
1.5
1.0
0.5
0
8-LEAD MINI-DIP PACKAGE
40 30 20 10
0
10
20
30
40
50
60
70
80
90
8-LEAD SOIC PACKAGE
T
J
= 150 C
Figure 3. Derating Curve of Maximum Power Dissipation
vs. Temperature for SOIC and PDIP Packages
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD629 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
THEORY OF OPERATION
The AD629 is a unity gain differential-to-single-ended amplifier
(Diff Amp) that can reject extremely high common-mode
signals (in excess of 270 V with 15 V supplies). It consists of an
operational amplifier (Op Amp) and a resistor network.
In order to achieve high common-mode voltage range, an internal
resistor divider (Pin 3, Pin 5) attenuates the noninverting signal
by a factor of 20. Other internal resistors (Pin 1, Pin 2, and the
feedback resistor) restores the gain to provide a differential gain
of unity. The complete transfer function equals:
V
OUT
= V (+IN ) V (IN )
Laser wafer trimming provides resistor matching so that common-
mode signals are rejected while differential input signals are
amplified.
The op amp itself, in order to reduce output drift, uses super
beta transistors in its input stage The input offset current and
its associated temperature coefficient contribute no appreciable
output voltage offset or drift. This has the added benefit of
reducing voltage noise because the corner where 1/f noise becomes
dominant is below 5 Hz. In order to reduce the dependence of
gain accuracy on the op amp, the open-loop voltage gain of the
op amp exceeds 20 million, and the PSRR exceeds 140 dB.
1
2
3
4
8
7
6
5
21.1k
380k
380k
380k
20k
REF()
IN
+IN
V
S
NC
+V
S
OUTPUT
REF(+)
AD629
NC = NO CONNECT
Figure 4. Functional Block Diagram
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option
AD629AR
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629AR-REEL
1
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629AR-REEL7
2
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629BR
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629BR-REEL
1
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629BR-REEL7
2
40
C to +85C
8-Lead Plastic SOIC
SO-8
AD629AN
40
C to +85C
8-Lead Plastic DIP
N-8
AD629BN
40
C to +85C
8-Lead Plastic DIP
N-8
NOTES
1
13" Tape and Reel of 2500 each
2
7" Tape and Reel of 1000 each
REV. A
AD629
4
Typical Performance Characteristics
FREQUENCY Hz
100
0
100
COMMON-MODE REJECTION RATIO
dB
1k
10k
100k
90
80
70
60
50
40
30
20
10
1M
10M
Figure 5. Common-Mode Rejection Ratio vs. Frequency
R
L
= 10k
2mV/DIV
20
4
0
4
20
V
OUT
Volts
OUTPUT ERROR
2mV/DIV
8
12
16
8
12
16
4V/DIV
V
S
= 18V
V
S
= 15V
V
S
= 12V
V
S
= 10V
Figure 6. Typical Gain Error Normalized @ V
OUT
= 0 V and
Output Voltage Operating Range vs. Supply Voltage,
R
L
= 10 k
(Curves Offset for Clarity)
R
L
= 1k
20
4
0
4
20
V
OUT
Volts
OUTPUT ERROR
2mV/DIV
8
12
16
8
12
16
V
S
= 18V
V
S
= 15V
V
S
= 12V
V
S
= 10V
4V/DIV
Figure 7. Typical Gain Error Normalized @ V
OUT
= 0 V
and Output Voltage Operating Range vs. Supply Voltage,
R
L
= 1 k
(Curves Offset for Clarity)
POWER SUPPLY VOLTAGE Volts
COMMON-MODE VOLTAGE
Volts
0
20
400
18
16
14
12
10
8
6
4
2
360
320
280
240
200
160
120
80
40
0
T
A
= +85 C
T
A
= +25 C
T
A
= 40 C
Figure 8. Common-Mode Operating Range vs. Power
Supply Voltage
R
L
= 2k
20
4
0
4
20
V
OUT
Volts
OUTPUT ERROR
2mV/DIV
8
12
16
8
12
16
V
S
= 18V
V
S
= 15V
V
S
= 12V
V
S
= 10V
4V/DIV
Figure 9. Typical Gain Error Normalized @ V
OUT
= 0 V and
Output Voltage Operating Range vs. Supply Voltage,
R
L
= 2 k
(Curves Offset for Clarity)
5
1
0
1
5
V
OUT
Volts
OUTPUT ERROR
2mV/DIV
2
3
4
2
3
4
V
S
= 5V, R
L
= 10k
V
S
= 5V, R
L
= 2k
V
S
= 5V, R
L
= 1k
V
S
= 2.5V, R
L
= 1k
1V/DIV
Figure 10. Typical Gain Error Normalized @ V
OUT
= 0 V
and Output Voltage Operating Range vs. Supply Voltage
(Curves Offset for Clarity)
(@25 C, V
S
= 15 V unless otherwise noted)
REV. A
AD629
5
10
5
0
5
10
V
OUT
Volts
ERROR
0.8ppm/DIV
Figure 11. Gain Nonlinearity; V
S
=
15 V, R
L
=10 k
10
2
0
2
10
V
OUT
Volts
ERROR
1ppm/DIV
4
6
8
4
6
8
Figure 12. Gain Nonlinearity; V
S
=
12 V, R
L
=10 k
3.0
0.6
0
0.6
3.0
V
OUT
Volts
ERROR
6.67ppm/DIV
1.2
1.8
2.4
1.2
1.8
2.4
Figure 13. Gain Nonlinearity; V
S
=
5 V, R
L
=1 k
10
2
0
2
10
V
OUT
Volts
ERROR
2ppm/DIV
4
6
8
4
6
8
Figure 14. Gain Nonlinearity; V
S
=
15 V, R
L
= 2 k
OUTPUT CURRENT mA
OUTPUT VOLTAGE
Volts
0
20
14.0
18
16
14
12
10
8
6
4
2
13.0
12.0
11.0
10.0
9.0
12.0
12.5
13.0
13.5
11.5
40 C
40 C
+85 C
+25 C
V
S
= 15V
40 C
+85 C
+25 C
Figure 15. Output Voltage Operating Range vs. Output
Current; V
S
=
15 V
OUTPUT CURRENT mA
OUTPUT VOLTAGE
Volts
0
20
11.5
18
16
14
12
10
8
6
4
2
10.5
9.5
8.5
7.5
6.5
9.5
10.0
10.5
11.0
9.0
+25 C
+85 C
40 C
+25 C
40 C
+85 C
40 C
V
S
= 12V
+85 C
Figure 16. Output Voltage Operating Range vs. Output
Current; V
S
=
12 V
REV. A
AD629
6
OUTPUT CURRENT mA
OUTPUT VOLTAGE
Volts
0
20
4.5
18
16
14
12
10
8
6
4
2
3.5
2.5
1.5
0.5
2.5
3.0
3.5
4.0
2.0
40 C
+25 C
+85 C
40 C
+25 C
40 C
+85 C
+85 C
V
S
= 5V
+85 C
+25 C
Figure 17. Output Voltage Operating Range vs. Output
Current; V
S
=
5 V
FREQUENCY Hz
120
POWER SUPPLY REJECTION RATIO
dB
0.1
1
110
100
90
80
70
60
50
40
30
100
1k
10
10k
+V
S
V
S
Figure 18. Power Supply Rejection Ratio vs. Frequency
FREQUENCY Hz
5.0
0.01
V/
Hz
0.1
1
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
100
1k
10
10k
100k
Figure 19. Voltage Noise Spectral Density vs. Frequency
R
L
= 2k
C
L
= 0pF
4 s/DIV
25mV/DIV
Figure 20. Small Signal Pulse Response; G = 1, R
L
= 2 k
4 s/DIV
25mV/DIV
R
L
= 2k
C
L
= 1000pF
Figure 21. Small Signal Pulse Response; G = 1, R
L
= 2 k
,
C
L
= 1000 pF
G = +1
R
L
= 2k
C
L
= 1000pF
5 s/DIV
5V/DIV
Figure 22. Large Signal Pulse Response; G = 1,
R
L
= 2 k
, C
L
= 1000 pF
REV. A
AD629
7
OUTPUT
ERROR
1mV/DIV
10 s/DIV
5V/DIV
V
OUT
1mV = 0.01%
0V
+10V
Figure 23. Settling Time to 0.01%, For 0 V to 10 V Output
Step; G = 1, R
L
= 2 k
COMMON-MODE REJECTION RATIO ppm
350
0
150
NUMBER OF UNITS
100
50
0
50
50
150
100
300
250
200
150
100
N = 2180
n 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 24. Typical Distribution of Common-Mode
Rejection; Package Option N-8
1 GAIN ERROR ppm
350
0
600
NUMBER OF UNITS
400
200
0
50
200
600
400
300
250
200
150
100
N = 2180
n 200 PCS. FROM
10 ASSEMBLY LOTS
400
Figure 25. Typical Distribution of 1 Gain Error;
Package Option N-8
OUTPUT
ERROR
1mV/DIV
10 s/DIV
5V/DIV
V
OUT
1mV = 0.01%
0V
10V
Figure 26. Settling Time to 0.01% for 0 V to 10 V Output
Step; G = 1, R
L
= 2 k
OFFSET VOLTAGE V
0
900
NUMBER OF UNITS
600
300
0
50
300
900
600
300
250
200
150
100
N = 2180
n 200 PCS. FROM
10 ASSEMBLY LOTS
Figure 27. Typical Distribution of Offset Voltage;
Package Option N-8
+1 GAIN ERROR ppm
350
0
600
NUMBER OF UNITS
400
200
0
50
200
600
400
300
250
200
150
100
N = 2180
n 200 PCS. FROM
10 ASSEMBLY LOTS
400
Figure 28. Typical Distribution of +1 Gain Error;
Package Option N-8
REV. A
AD629
8
APPLICATIONS
Basic Connections
Figure 29 shows the basic connections for operating the AD629
with a dual supply. A supply voltage of between
3 V and
18 V is applied between Pins 7 and 4. Both supplies should be
decoupled close to the pins using 0.1
F capacitors. 10 F elec-
trolytic capacitors, also located close to the supply pins, may
also be required if low frequency noise is present on the power
supply. While multiple amplifiers can be decoupled by a single
set of 10
F capacitors, each in amp should have its own set of
0.1
F capacitors so that the decoupling point can be located
physically close to the power pins.
REF()
IN
+IN
V
S
NC
+V
S
V
OUT
= I
SHUNT
R
SHUNT
REF(+)
AD629
21.1k
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
(SEE
TEXT)
+V
S
3V TO 18V
0.1 F
(SEE
TEXT)
R
SHUNT
I
SHUNT
V
S
3V TO 18V
8
7
6
5
1
2
3
4
Figure 29. Basic Connections
The differential input signal, which will typically result from a
load current flowing through a small shunt resistor, is applied to
Pins 2 and 3 with the polarity shown in order to obtain a posi-
tive gain. The common-mode range on the differential input
signal can range from 270 V to +270 V and the maximum dif-
ferential range is
13 V. When configured as shown, the device
operates as a simple gain-of-one differential-to-single-ended
amplifier, the output voltage being the shunt resistance times the
shunt current. The output is measured with respect to Pins 1 and 5.
Pins 1 and 5 (REF() and REF(+)) should be grounded for a
gain of unity and should be connected to the same low imped-
ance ground plane. Failure to do this will result in degraded
common-mode rejection. Pin 8 is a no connect pin and should
be left open.
Single Supply Operation
Figure 30 shows the connections for operating the AD629 with
a single supply. Because the output can swing to within only
about 2 V of either rail, it is necessary to apply an offset to the
output. This can be conveniently done by connecting REF(+) and
REF() to a low impedance reference voltage (some analog-
to-digital converters provide this voltage as an output), which is
capable of sinking current. Thus, for a single supply of 10 V,
V
REF
might be set to 5 V for a bipolar input signal. This would
allow the output to swing
3 V around the central 5 V reference
voltage. Alternatively, for unipolar input signals, V
REF
could be
set to about 2 V, allowing the output to swing from +2 V (for a 0 V
input) to within 2 V of the positive rail.
OUTPUT = V
OUT
V
REF
V
REF
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
+V
S
R
SHUNT
I
SHUNT
8
7
6
5
1
2
3
4
V
X
V
Y
21.1k
Figure 30. Operation with a Single Supply
Applying a reference voltage to REF(+) and REF() and operating
on a single supply will reduce the input common-mode range of
the AD629. The new input common-mode range depends upon
the voltage at the inverting and noninverting inputs of the internal
operational amplifier, labeled V
X
and V
Y
in Figure 30. These
nodes can swing to within 1 V of either rail. So for a (single)
supply voltage of 10 V, V
X
and V
Y
can range between 1 V and
9 V. If V
REF
is set to 5 V, the permissible common-mode range
is +85 V to 75 V. The common-mode voltage ranges can be
calculated using the following equation.
V
V
V
CM
X Y
REF
( )
=
( )
-
20
19
/
System-Level Decoupling and Grounding
The use of ground planes is recommended to minimize the
impedance of ground returns (and hence the size of dc errors).
Figure 31 shows how to work with grounding in a mixed-signal
environment, that is, with digital and analog signals present. In
order to isolate low-level analog signals from a noisy digital
environment, many data-acquisition components have separate
analog and digital ground returns. All ground pins from mixed-
signal components such as analog-to-digital converters should
be returned through the "high quality" analog ground plane.
This includes the digital ground lines of mixed-signal converters
that should also be connected to the analog ground plane. This
may seem to break the rule of keeping analog and digital grounds
separate, but in general, there is also a requirement to keep the
voltage difference between digital and analog grounds on a con-
verter as small as possible (typically <0.3 V). The increased
noise, caused by the converter's digital return currents flowing
through the analog ground plane, will typically be negligible.
Maximum isolation between analog and digital is achieved by
connecting the ground planes back at the supplies. Note that
Figure 31, as drawn, suggests a "star" ground system for the
analog circuitry, with all ground lines being connected, in this
case, to the ADC's analog ground. However, when ground planes
are used, it is sufficient to connect ground pins to the nearest
point on the low impedance ground plane.
REV. A
AD629
9
PROCESSOR
0.1 F
AD7892-2
ANALOG POWER
SUPPLY
+5V
GND
5V
+5V
DIGITAL
POWER SUPPLY
V
DD
AGND DGND
V
IN1
V
IN2
V
OUT
12
V
DD
GND
0.1 F
GND
REF()
IN
+IN
V
S
+V
S
REF(+)
AD629
0.1 F 0.1 F
Figure 31. Optimal Grounding Practice for a Bipolar Supply
Environment with Separate Analog and Digital Supplies
PROCESSOR
0.1 F
POWER SUPPLY
+5V
GND
V
DD
AGND DGND
V
IN
V
REF
V
OUT
V
DD
GND
0.1 F
REF()
IN
+IN
V
S
+V
S
REF(+)
AD629
0.1 F
ADC
Figure 32. Optimal Ground Practice in a Single Supply
Environment
If there is only a single power supply available, it must be shared
by both digital and analog circuitry. Figure 32 shows how to
minimize interference between the digital and analog circuitry.
In this example, the ADC's reference is used to drive the
AD629's REF(+) and REF() pins. This means that the reference
must be capable of sourcing and sinking a current equal to V
CM
/
200 k
. As in the previous case, separate analog and digital
ground planes should be used (reasonably thick traces can be
used as an alternative to a digital ground plane). These ground
planes should be connected at the power supply's ground pin.
Separate traces (or power planes) should be run from the power
supply to the supply pins of the digital and analog circuits. Ideally,
each device should have its own power supply trace, but these
can be shared by a number of devices as long as a single trace is
not used to route current to both digital and analog circuitry.
Using a Large Sense Resistor
Insertion of a large shunt resistance across the input Pins 2 and 3
will imbalance the input resistor network, introducing a common-
mode error. The magnitude of the error will depend on the
common-mode voltage and the magnitude of R
SHUNT
. Table I
Table II. Recommended Values for 2-Pole Butterworth Filter
Corner Frequency
R1
R2
C1
C2
Output Noise (p-p)
No Filter
3.2 mV
50 kHz
2.94 k
1%
1.58 k
1%
2.2 nF
10%
1 nF
10%
1 mV
5 kHz
2.94 k
1%
1.58 k
1%
22 nF
10%
10 nF
10%
0.32 mV
500 Hz
2.94 k
1%
1.58 k
1%
220 nF
10%
0.1
F 10%
100
V
50 Hz
2.7 k
10%
1.5 k
10%
2.2
F 20%
1
F 20%
32
V
shows some sample error voltages generated by a common-mode
voltage of 200 V dc with shunt resistors from 20
to 2000 .
Assuming that the shunt resistor has been selected to utilize the
full
10 V output swing of the AD629, the error voltage becomes
quite significant as R
SHUNT
increases.
Table I. Error Resulting from Large Values of R
SHUNT
(Uncompensated Circuit)
R
S
( )
Error V
OUT
(V)
Error Indicated (mA)
20
0.01
0.5
1000
0.498
0.498
2000
1
0.5
If it is desired to measure low current or current near zero in a
high common-mode environment, an external resistor equal to
the shunt resistor value may be added to the low impedance side
of the shunt resistor as shown in Figure 33.
V
OUT
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
+V
S
R
SHUNT
8
7
6
5
1
2
3
4
R
COMP
V
S
0.1 F
I
SHUNT
21.1k
Figure 33. Compensating for Large Sense Resistors
Output Filtering
A simple 2-pole low-pass Butterworth filter can be implemented
using the OP177 at the output of the AD629 to limit noise at
the output, as shown in Figure 34. Table II gives recommended
component values for various corner frequencies, along with the
peak-to-peak output noise for each case.
V
OUT
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
+V
S
8
7
6
5
1
2
3
4
V
S
0.1 F
0.1 F
0.1 F
+V
S
V
S
C2
R2
C1
R1
OP177
21.1k
Figure 34. Filtering of Output Noise Using a 2-Pole
Butterworth Filter
REV. A
AD629
10
Table III. AD629 vs. INA117 Error Budget Analysis Example 1 (V
CM
= 200 V dc)
Error, ppm of FS
Error Source
AD629
INA117
AD629
INA117
ACCURACY, T
A
= 25
C
Initial Gain Error
(0.0005
10) 10 V 10
6
(0.0005
10) 10 V 10
6
500
500
Offset Voltage
(0.001 V
10 V) 10
6
(0.002 V
10 V) 10
6
100
200
DC CMR (Over Temperature)
(224
10
-6
200 V) 10 V 10
6
(500
10
-6
200 V) 10 V 10
6
4,480
10,000
Total Accuracy Error:
5,080
10,700
TEMPERATURE DRIFT (85
C)
Gain
10 ppm/
C 60C
10 ppm/
C 60C
600
600
Offset Voltage
(20
V/C 60C) 10
6
/10 V
(40
V/C 60C) 10
6
/10 V
120
240
Total Drift Error:
720
840
RESOLUTION
Noise, Typ, 0.0110 Hz,
V p-p
15
V 10 V 10
6
25
V 10 V 10
6
2
3
CMR, 60 Hz
(141
10
6
1 V) 10 V 10
6
(500
10
6
1 V) 10 V 10
6
14
50
Nonlinearity
(10
5
10 V) 10 V 10
6
(10
5
10 V) 10 V 10
6
10
10
Total Resolution Error:
26
63
Total Error:
5,826
11,603
Output Current and Buffering
The AD629 is designed to drive loads of 2 k
to within 2 V of
the rails, but can deliver higher output currents at lower output
voltages (see Figure 15). If higher output current is required,
the AD629's output should be buffered with a precision op
amp such as the OP113 as shown in Figure 35. This op amp
can swing to within 1 V of either rail while driving a load as
small as 600
.
V
OUT
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
8
7
6
5
1
2
3
4
0.1 F
0.1 F
0.1 F
V
S
OP113
21.1k
Figure 35. Output Buffering Application
A Gain of 19 Differential Amplifier
While low level signals can be connected directly to the IN and
+IN inputs of the AD629, differential input signals can also be
connected as shown in Figure 36 to give a precise gain of 19.
However, large common-mode voltages are no longer permissible.
Cold junction compensation can be implemented using a tempera-
ture sensor such as the AD590.
V
OUT
REF()
IN
+IN
V
REF
NC
+V
S
REF(+)
AD629
380k
380k
380k
20k
NC = NO CONNECT
0.1 F
8
7
6
5
1
2
3
4
THERMOCOUPLE
21.1k
Figure 36. A Gain of 19 Thermocouple Amplifier
Error Budget Analysis Example 1
In the dc application below, the 10 A output current from a
device with a high common-mode voltage (such as a power sup-
ply or current-mode amplifier) is sensed across a 1
shunt
resistor (Figure 37). The common-mode voltage is 200 V, and
the resistor terminals are connected through a long pair of lead
wires located in a high-noise environment, for example, 50 Hz/
60 Hz 440 V ac power lines. The calculations in Table III
assume an induced noise level of 1 V at 60 Hz on the leads, in
addition to a full-scale dc differential voltage of 10 V. The error
budget table quantifies the contribution of each error source.
Note that the dominant error source in this example is due to
the dc common-mode voltage.
REV. A
AD629
11
Table IV. AD629 vs. INA117 AC Error Budget Example 2 (V
CM
= 100 V @ 500 Hz)
Error, ppm of FS
Error Source
AD629
INA117
AD629
INA117
ACCURACY, T
A
= 25
C
Initial Gain Error
(0.0005
10) 10 V 10
6
(0.0005
10) 10 V 10
6
500
500
Offset Voltage
(0.001 V
10 V) 10
6
(0.002 V
10 V) 10
6
100
200
Total Accuracy Error:
600
700
TEMPERATURE DRIFT (85
C)
Gain
10 ppm/
C 60C
10 ppm/
C 60C
600
600
Offset Voltage
(20
V/C 60C) 10
6
/10 V
(40
V/C 60C) 10
6
/10 V
120
240
Total Drift Error:
720
840
RESOLUTION
Noise, Typ, 0.0110 Hz,
V p-p
15
V 10 V 10
6
25
V 10 V 10
6
2
3
CMR @ 60 Hz
(141
10
6
1 V) 10 V 10
6
(500
10
6
1 V) 10 V 10
6
14
50
Nonlinearity
(10
5
10 V) 10 V 10
6
(10
5
10 V) 10 V 10
6
10
10
AC CMR @ 500 Hz
(141
10
6
200 V) 10 V 10
6
(500
10
6
200 V) 10 V 10
6
2,820
10,000
Total Resolution Error:
2,846
10,063
Total Error:
4,166
11,603
V
OUT
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
21.1k
380k
380k
380k
20k
NC = NO CONNECT
8
7
6
5
1
2
3
4
1
SHUNT
10 AMPS
200V
CM
DC
TO GROUND
OUTPUT
CURRENT
60Hz
POWER LINE
0.1 F
0.1 F
Figure 37. Error Budget Analysis Example 1. V
IN
= 10 V
Full-Scale, V
CM
= 200 V DC. R
SHUNT
= 1
, 1 V p-p 60 Hz
Power-Line Interference
Error Budget Analysis Example 2
This application is similar to the previous example except that
the sensed load current is from an amplifier with an ac common-
mode component of
100 V (frequency = 500 Hz) present on
the shunt (Figure 38). All other conditions are the same as
before. Note that the same kind of power line interference can
happen as detailed in Example 1. However, the ac common-
mode component of 200 V p-p coming from the shunt is much
larger than the interference of 1 V p-p, so that this interference
component can be neglected.
V
OUT
REF()
IN
+IN
V
S
NC
+V
S
REF(+)
AD629
21.1k
380k
380k
380k
20k
NC = NO CONNECT
8
7
6
5
1
2
3
4
1
SHUNT
10 AMPS
100V
AC CM
TO GROUND
OUTPUT
CURRENT
60Hz
POWER LINE
0.1 F
0.1 F
Figure 38. Error Budget Analysis Example 2. V
IN
= 10 V
Full-Scale, V
CM
=
100 V at 500 Hz, R
SHUNT
= 1
REV. A
12
C3717a63/00 (rev. A)
PRINTED IN U.S.A.
AD629
8-Lead Plastic DIP
(N-8)
SEATING
PLANE
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.022 (0.558)
0.014 (0.356)
0.160 (4.06)
0.115 (2.93)
0.070 (1.77)
0.045 (1.15)
0.130
(3.30)
MIN
8
1
4
5
PIN 1
0.280 (7.11)
0.240 (6.10)
0.100 (2.54)
BSC
0.430 (10.92)
0.348 (8.84)
0.195 (4.95)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.325 (8.25)
0.300 (7.62)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC
(SO-8)
0.0098 (0.25)
0.0075 (0.19)
0.0500 (1.27)
0.0160 (0.41)
8
0
0.0196 (0.50)
0.0099 (0.25)
45
8
5
4
1
0.1968 (5.00)
0.1890 (4.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
0.1574 (4.00)
0.1497 (3.80)
0.0500 (1.27)
BSC
0.0688 (1.75)
0.0532 (1.35)
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
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