REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD704
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
FEATURES
High DC Precision
75 V max Offset Voltage
1 V/ C max Offset Voltage Drift
150 pA max Input Bias Current
0.2 pA/ C typical I
B
Drift
Low Noise
0.5
V p-p typical Noise, 0.1 Hz to 10 Hz
Low Power
600 A max Supply Current per Amplifier
Chips & MIL-STD-883B Processing Available
Available in Tape and Reel in Accordance
with EIA-481A Standard
Single Version: AD705, Dual Version: AD706
PRIMARY APPLICATIONS
Industrial/Process Controls
Weigh Scales
ECG/EKG Instrumentation
Low Frequency Active Filters
PRODUCT DESCRIPTION
The AD704 is a quad, low power bipolar op amp that has the
low input bias current of a BiFET amplifier but which offers a
significantly lower I
B
drift over temperature. It utilizes Super-
beta bipolar input transistors to achieve picoampere input bias
current levels (similar to FET input amplifiers at room tempera-
ture), while its I
B
typically only increases by 5
at +125
C
(unlike a BiFET amp, for which I
B
doubles every 10
C resulting
in a 1000
increase at +125
C). Furthermore the AD704
achieves 75
V offset voltage and low noise characteristics of a
precision bipolar input op amp.
100
10
1
0.1
0.01
55
+25
+125
TEMPERATURE
C
TYPICAL I nA
B
TYPICAL JFET AMP
AD704T
Figure 1. Input Bias Current Over Temperature
CONNECTION DIAGRAMS
Quad Picoampere Input Current
Bipolar Op Amp
14-Pin Plastic DIP (N)
14-Pin Cerdip (Q) Packages
1
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2
3
OUTPUT
IN
IN
OUTPUT
OUTPUT
IN
IN
OUTPUT
AD704
(TOP VIEW)
IN
+
IN
+
IN
+
IN
+
+V
S
V
S
16-Pin SOIC
(R) Package
11
1
4
1
2
3
4
5
6
7
8
9
10
12
13
14
2
3
OUTPUT
IN
IN
OUTPUT
OUTPUT
IN
IN
OUTPUT
+V
S
V
S
AD704
(TOP VIEW)
15
16
NC = NO CONNECT
NC
NC
IN
+
IN
+
IN
+
IN
+
20-Terminal LCC
(E) Package
3
2
1
20
19
18
17
16
15
14
9
10
11
12
13
4
5
6
7
8
+IN4
NC
V
S
NC
+IN3
IN1
OUT1
NC
OUT4
IN4
+IN1
NC
+V
S
NC
+IN2
IN2
OUT2
NC
OUT3
IN3
AMP 1
AMP 2
AMP 4
AMP 3
NC = NO CONNECT
AD704
Since it has only 1/20 the input bias current of an AD OP07, the
AD704 does not require the commonly used "balancing"
resistor. Furthermore, the current noise is 1/5 that of the
AD OP07 which makes the AD704 usable with much higher
source impedances. At 1/6 the supply current (per amplifier) of
the AD OP07, the AD704 is better suited for today's higher
density circuit boards and battery powered applications.
The AD704 is an excellent choice for use in low frequency
active filters in 12- and 14-bit data acquisition systems, in
precision instrumentation, and as a high quality integrator. The
AD704 is internally compensated for unity gain and is available
in five performance grades. The AD704J and AD704K are rated
over the commercial temperature range of 0
C to +70
C. The
AD704A and AD704B are rated over the industrial temperature
of 40
C to +85
C. The AD704T is rated over the military
temperature range of 55
C to +125
C and is available
processed to MIL-STD-883B, Rev. C.
REV. A
2
AD704SPECIFICATIONS
(@ T
A
= +25 C, V
CM
= 0 V, and 15 V dc, unless otherwise noted)
Model
AD704J/A
AD704K/B
AD704T
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
INPUT OFFSET VOLTAGE
Initial Offset
50
150
30
75
30
100
V
Offset
T
MIN
T
MAX
100
250
50
150
80
150
V
vs. Temp, Average TC
0.2
1.5
0.2
1.0
1.0
V/
C
vs. Supply (PSRR)
V
S
=
2 to
18 V
100
132
112
132
112
132
dB
T
MIN
T
MAX
V
S
=
2.5 to
18 V
100
126
108
126
108
126
dB
Long Term Stability
0.3
0.3
0.3
V/month
INPUT BIAS CURRENT
1
V
CM
= 0 V
100
270
80
150
80
200
pA
V
CM
=
13.5 V
300
200
250
pA
vs. Temp, Average TC
0.3
0.2
1.0
pA/
C
T
MIN
T
MAX
V
CM
= 0 V
300
200
600
pA
T
MIN
T
MAX
V
CM
=
13.5 V
400
300
700
pA
INPUT OFFSET CURRENT
V
CM
= 0 V
80
250
30
100
50
150
pA
V
CM
=
13.5 V
300
150
200
pA
vs. Temp, Average TC
0.6
0.4
0.4
pA/
C
T
MIN
T
MAX
V
CM
= 0 V
100
300
80
200
80
400
pA
T
MIN
T
MAX
V
CM
=
13.5 V
100
400
80
300
100
500
pA
MATCHING CHARACTERISTICS
Offset Voltage
250
130
150
V
T
MIN
T
MAX
400
200
250
V
Input Bias Current
2
500
300
400
pA
T
MIN
T
MAX
600
400
600
pA
Common-Mode Rejection
3
94
110
104
dB
T
MIN
T
MAX
94
104
104
dB
Power Supply Rejection
4
94
110
110
dB
T
MIN
T
MAX
94
106
106
dB
Crosstalk
5
f = 10 Hz
R
LOAD
= 2 k
150
150
150
dB
FREQUENCY RESPONSE
UNITY GAIN
Crossover Frequency
0.8
0.8
0.8
MHz
Slew Rate, Unity Gain
G = 1
0.15
0.15
0.15
V/
s
Slew Rate
T
MIN
T
MAX
0.1
0.1
0.1
V/
s
INPUT IMPEDANCE
Differential
40 2
40 2
40 2
M
pF
Common-Mode
300 2
300 2
300 2
G
pF
INPUT VOLTAGE RANGE
Common-Mode Voltage
13.5
14
13.5
14
13.5
14
V
Common-Mode Rejection Ratio
V
CM
=
13.5 V
100
132
114
132
110
132
dB
T
MIN
T
MAX
98
128
108
128
108
128
dB
INPUT CURRENT NOISE
0.1 to 10 Hz
3
3
3
pA p-p
f = 10 Hz
50
50
50
fA/
Hz
INPUT VOLTAGE NOISE
0.1 to 10 Hz
0.5
0.5
2.0
0.5
2.0
V p-p
f = 10 Hz
17
17
17
nV/
Hz
f = 1 kHz
15
22
15
22
15
22
nV/
Hz
OPEN-LOOP GAIN
V
O
=
12 V
R
LOAD
= 10 k
200
2000
400
2000
400
2000
V/mV
T
MIN
T
MAX
150
1500
300
1500
300
1500
V/mV
V
O
=
10 V
R
LOAD
= 2 k
200
1000
300
1000
200
1000
V/mV
T
MIN
T
MAX
150
1000
200
1000
100
1000
V/mV
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
80
100
120
140
160
10
100
1k
10k
100k
FREQUENCY Hz
CROSSTALK dB
AMP4
AMP2
AMP3
Figure 2b. Crosstalk vs. Frequency
AD704
Model
AD704J/A
AD704K/B
AD704T
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
OUTPUT CHARACTERISTICS
Voltage Swing
R
LOAD
= 10 k
T
MIN
T
MAX
13
14
13
14
13
14
V
Current
Short Circuit
15
15
15
mA
CAPACITIVE LOAD
Drive Capability
Gain = + 1
10,000
10,000
10,000
pF
POWER SUPPLY
Rated Performance
15
15
15
V
Operating Range
2.0
18
2.0
18
2.0
18
V
Quiescent Current
1.5
2.4
1.5
2.4
1.5
2.4
mA
T
MIN
T
MAX
1.6
2.6
1.6
2.6
1.6
2.6
mA
TRANSISTOR COUNT
# of Transistors
180
180
180
NOTES
1
Bias current specifications are guaranteed maximum at either input.
2
Input bias current match is the maximum difference between corresponding inputs of all four amplifiers.
3
CMRR match is the difference of
V
OS
/
V
CM
between any two amplifiers, expressed in dB.
4
PSRR match is the difference between
V
OS
/
V
SUPPLY
for any two amplifiers, expressed in dB.
5
See Figure 2a for test circuit.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
REV. A
3
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
Internal Power Dissipation (+25
C) . . . . . . . . . . . See Note 2
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
S
Differential Input Voltage
3
. . . . . . . . . . . . . . . . . . . . . . .
0.7 V
Output Short Circuit Duration (Single Input) . . . . . Indefinite
Storage Temperature Range
(Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
C to +150
C
(N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
C to +125
C
Operating Temperature Range
AD704J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
C to +70
C
AD704A/B . . . . . . . . . . . . . . . . . . . . . . . . . 40
C to +85
C
AD704T . . . . . . . . . . . . . . . . . . . . . . . . . . 55
C to +125
C
Lead Temperature Range (Soldering 10 seconds) . . . . +300
C
NOTES
1
Stresses above those listed under "Absolute Maximum Ratings" may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Pin Plastic Package:
JA
= 150
C/Watt
14-Pin Cerdip Package:
JA
= 110
C/Watt
16-Pin SOIC Package:
JA
= 100
C/Watt
20-Terminal LCC Package:
JA
= 150
C/Watt
3
The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds
0.7 volts, external series protection resistors should
be added to limit the input current to less than 25 mA.
+V
S
V
S
1/4
AD704
ALL 4 AMPLIFIERS ARE CONNECTED AS SHOWN
OUTPUT
THE SIGNAL INPUT (SUCH THAT THE AMPLIFIER'S OUTPUT IS AT MAX
AMPLITUDE WITHOUT CLIPPING OR SLEW LIMITING) IS APPLIED TO ONE
AMPLIFIER AT A TIME. THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE
THEN MEASURED FOR CROSSTALK.
AD704
PIN 4
AD704
PIN 11
COM
0.1 F
1F
0.1 F
1F
INPUT
SIGNAL
*
*
9k
1k
1k
2.5k
Figure 2a. Crosstalk Test Circuit
AD704Typical Characteristics
REV. A
4
(@ +25 C, V
S
= 15 V, unless otherwise noted)
ORDERING GUIDE
Model
Temperature Range
Package Option*
AD704JN
0
C to +70
C
N-14
AD704JR
0
C to +70
C
R-16
AD704JR-/REEL
0
C to +70
C
Tape and Reel
AD704KN
0
C to +70
C
N-14
AD704AN
40
C to +85
C
N-14
AD704AQ
40
C to +85
C
Q-14
AD704AR
40
C to +85
C
R-16
AD704AR-REEL
40
C to +85
C
Tape and Reel
AD704BQ
40
C to +85
C
Q-14
AD704SE/883B
55
C to +125
C
E-20A
AD704TQ
55
C to +125
C
Q-14
AD704TQ/883B
55
C to +125
C
Q-14
Chips are also available.
*E = Leadless Ceramic Chip Carrier; N = Plastic DIP; Q = Cerdip;
R = Small Outline (SOIC).
50
40
30
20
10
0
80
40
0
+40
+80
INPUT OFFSET VOLTAGE
V
PERCENTAGE OF UNITS
Figure 3. Typical Distribution of
Input Offset Voltage
INPUT COMMON-MODE VOLTAGE LIMIT Volts
(REFERRED TO SUPPLY VOLTAGES)
0
5
10
15
20
+0.5
+1.0
+1.5
1.5
1.0
0.5
SUPPLY VOLTAGE Volts
+V
S
V
S
Figure 6. Input Common-Mode
Voltage Range vs. Supply Voltage
50
40
30
20
10
0
160
80
0
+80
+160
INPUT BIAS CURRENT pA
PERCENTAGE OF UNITS
Figure 4. Typical Distribution of
Input Bias Current
35
30
25
20
15
10
5
0
1M
OUTPUT VOLTAGE Volts p-p
FREQUENCY Hz
1k
10k
100k
Figure 7. Large Signal Frequency
Response
50
40
30
20
10
0
120
60
0
+60
+120
INPUT OFFSET CURRENT pA
PERCENTAGE OF UNITS
Figure 5. Typical Distribution of
Input Offset Current
100
10
1.0
0.1
1k
10k
100k
1M
10M
100M
SOURCE RESISTANCE
SOURCE RESISTANCE
MAY BE EITHER BALANCED
OR UNBALANCED
OFFSET VOLTAGE DRIFT
V/
C
Figure 8. Offset Voltage Drift vs.
Source Resistance
AD704
REV. A
5
120
100
80
60
40
20
0
15
10
5
0
5
10
15
COMMON MODE VOLTAGE Volts
INPUT BIAS CURRENT pA
NEGATIVE I
B
POSITIVE I
B
Figure 11. Input Bias Current vs.
Common-Mode Voltage
Figure 14. 0.1 Hz to 10 Hz Noise
Voltage
20
0.1
1
10
100
1k
10k
100k 1M
FREQUENCY Hz
180
160
140
120
100
80
60
40
PSR dB
+PSR
PSR
V =
15V
S
T = +25
C
A
Figure 17. Power Supply Rejection
vs. Frequency
4
3
2
1
0
0
1
2
3
4
5
CHANGE IN OFFSET VOLTAGE
V
WARM-UP TIME Minutes
Figure 10. Change in Input Off-
set
Voltage vs. Warm-Up Time
FREQUENCY Hz
1000
100
10
1
1
10
100
1000
100
10k
20M
V
OUT
CURRENT NOISE fA/ Hz
Figure 13. Input Noise Current
Spectral Density
+160
+140
+120
+100
+80
+60
+40
+20
0
0.1
1
10
100
1k
10k
100k
1M
FREQUENCY Hz
CMR dB
V =
15V
S
Figure 16. Common-Mode
Rejection vs. Frequency
50
40
30
20
10
0
0.8
0.4
0
+0.4
+0.8
PERCENTAGE OF UNITS
INPUT OFFSET VOLTAGE DRIFT
V/
C
Figure 9. Typical Distribution of
Offset Voltage Drift
FREQUENCY Hz
1000
100
10
1
1
10
100
1000
VOLTAGE NOISE nV/ Hz
Figure 12. Input Noise Voltage
Spectral Density
FIGURE 15
500
450
400
350
300
0
5
10
15
20
QUIESCENT CURRENT
A
SUPPLY VOLTAGE
Volts
+25
C
55
C
+125
C
Figure 15. Quiescent Supply
Current vs. Supply Voltage (per
Amplifier)
AD704
REV. A
6
1
10
100
100k
1M
10M
LOAD RESISTANCE k
OPEN-LOOP VOLTAGE GAIN
2
4
6 8
55 C
+25 C
+125 C
Figure 18. Open-Loop Gain vs.
Load Resistance Over Temperature
1000
100
10
1
0.1
0.01
0.001
1
10
100
1k
10k
100k
FREQUENCY Hz
CLOSED-LOOP OUTPUT IMPEDANCE Ohms
A = 1000
V
A = +1
V
I = +1mA
OUT
Figure 21. Closed-Loop Output
Impedance vs. Frequency
10
0%
5s
20mV
100
90
Figure 22c. Unity Gain Follower
Small Signal Pulse Response
R
F
= 0
, C
L
= 100 pF
20
0
20
40
60
80
100
120
140
0.01 0.1
1
10
100
1k 10k 100k 1M 10M
FREQUENCY Hz
OPEN-LOOP VOLTAGE GAIN dB
0
30
60
90
120
150
180
PHASE SHIFT Degrees
GAIN
PHASE
Figure 19. Open-Loop Gain and Phase
vs. Frequency
1/4
AD704
SQUARE
WAVE INPUT
0.1
F
0.1
F
R
F
V
OUT
C
L
V
S
V
IN
+V
S
R
2k
L
Figure 22a. Unity Gain Follower
(For Large Signal Applications,
Resistor R
F
Limits the Current
Through the Input Protection
Diodes)
10
0%
5s
20mV
100
90
Figure 22d. Unity Gain Follower
Small Signal Pulse Response
R
F
= 0
, C
L
= 1,000 pF
0
5
10
15
20
+0.5
+1.0
+1.5
1.5
1.0
0.5
+V
S
SUPPLY VOLTAGE
Volts
OUTPUT VOLTAGE SWING Volts
(REFERRED TO SUPPLY VOLTAGES)
V
S
R = 10k
L
Figure 20. Output Voltage Swing vs.
Supply Voltage
10
0%
50s
2V
100
90
Figure 22b. Unity Gain Follower
Large Signal Pulse Response
R
F
= 10 k
, C
L
= 1,000 pF
1/4
AD704
SQUARE
WAVE INPUT
0.1 F
0.1 F
V
OUT
C
L
R
L
2.5k
V
S
V
IN
+V
S
10k
10k
Figure 23a. Unity Gain Inverter
Connection
AD704
REV. A
7
__
R2
___
2R2
INSTRUMENTATION AMPLIFIER GAIN = 1 + + (FOR R1 = R3, R2 = R4 + R5)
ALL RESISTORS METAL FILM, 1%
1/4
AD704
1/4
AD704
1/4
AD704
1/4
AD704
OPTIONAL BALANCE RESISTOR
NETWORKS CAN BE REPLACED
WITH A SHORT
CAPACITORS C2 AND C4 ARE
SOUTHERN ELECTRONICS MPCC,
POLYCARBONATE,
5%, 50 VOLT
0.01
F
C6
R11
2M
OUTPUT
C3
1M
R9
C4
1M
R8
0.01
F
C5
C2
1M
R7
1M
R6
C1
0.1
F
+V
S
0.1
F
V
S
GAIN TRIM
(500k POT)
49.9k
R2
6.34k
R1
6.34k
R3
OPTIONAL
AC CMRR TRIM
2.4k
R5
47.5k
R4
DC
CMRR
TRIM
(5k POT)
C t
G
R
+V
IN
V
IN
R1
RG
=
_________
R8 C3C4
1
R8 = R9
Q =
C3__
4C4
2
R6 = R7
=
1
_________
R6 C1C2
Q =
C1__
4C2
1
R10
2M
Figure 24. Gain of 10 Instrumentation Amplifier with Post Filtering
The instrumentation amplifier with post filtering (Figure 24)
combines two applications which benefit greatly from the
AD704. This circuit achieves low power and dc precision over
temperature with a minimum of components.
The instrumentation amplifier circuit offers many performance
benefits including BiFET level input bias currents, low input
offset voltage drift and only 1.2 mA quiescent current. It will
operate for gains G
2, and at lower gains it will benefit from
the fact that there is no output amplifier offset and noise
contribution as encountered in a 3 op amp design. Good low
frequency CMRR is achieved even without the optional AC
CMRR trim (Figure 25). Table I provides resistance values for
3 common circuit gains. For other gains, use the following
equations:
R2 = R4 + R5 = 49.9 k
R1
=
R3
=
49.9 k
0.9 G
-
1
Max Value of R
G
=
99.8 k
0.06 G
C
t
1
2
( R3) 5
10
5
Table I. Resistance Values for Various Gains
Circuit Gain
R
G
(Max Value
Bandwidth
(G)
R1 & R3
of Trim Potentiometer)
(3 dB), Hz
10
6.34 k
166 k
50k
100
526
16.6 k
5k
1,000
56.2
1.66 k
0.5k
160
140
120
100
80
60
40
20
0
1
10
100
1k
10k
FREQUENCY Hz
COMMON MODE REJECTION dB
GAIN = 10, 0.2V p-p COMMON-MODE INPUT
TYPICAL MONOLITHIC IN AMP
CIRCUIT TRIMMED
USING CAPACITOR Ct
WITHOUT CAPACITOR C t
Figure 25. Common-Mode Rejection vs. Frequency with
and without Capacitor C
t
10
0%
50s
2V
100
90
Figure 23b. Unity Gain Inverter
Large Signal Pulse Response,
C
L
= 1,000 pF
10
0%
5S
20mV
100
90
Figure 23c. Unity Gain Inverter
Small Signal Pulse Response,
C
L
= 100 pF
10
0%
5S
20mV
100
90
Figure 23d. Unity Gain Inverter Small
Signal Pulse Response, C
L
= 1,000 pF
AD704
REV. A
8
C14762410/90
PRINTED IN U.S.A.
14-Pin Cerdip (Q) Package
16-Pin Plastic SO (R) Package
14-Pin Plastic DIP (N) Package
20-Terminal LCCC (E) Package
0.358 (9.09)
0.342 (8.69)
NO. 1 PIN
INDEX
0.040 (1.02)
x 45
REF
3 PLCS
0.020 (0.51)
x 45
REF
0.050
(1.27)
BSC
0.100 (2.54)
0.064 (1.63)
0.028 (0.71)
0.022 (0.56)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Table II. 1 Hz, 4-Pole Low-Pass Filter Recommended Component Values
Section 1
Section 2
Desired Low
Frequency
Frequency
C1
C2
C3
C4
Pass Response
(Hz)
Q
(Hz)
Q
( F)
( F)
( F)
( F)
Bessel
1.43
0.522
1.60
0.806
0.116
0.107
0.160
0.0616
Butterworth
1.00
0.541
1.00
1.31
0.172
0.147
0.416
0.0609
0.1 dB Chebychev
0.648
0.619
0.948
2.18
0.304
0.198
0.733
0.0385
0.2 dB Chebychev
0.603
0.646
0.941
2.44
0.341
0.204
0.823
0.0347
0.5 dB Chebychev
0.540
0.705
0.932
2.94
0.416
0.209
1.00
0.0290
1.0 dB Chebychev
0.492
0.785
0.925
3.56
0.508
0.206
1.23
0.0242
Specified Values are for a 3 dB point of 1.0 Hz. For other frequencies simply scale capacitors C1 through C4 directly; i.e., for 3 Hz Bessel response, C1 = 0.0387
F,
C2 = 0.0357
F, C3 = 0.0533
F, C4 = 0.0205
F.
The 1 Hz, 4-pole active filter offers dc precision with a mini-
mum of components and cost. The low current noise, I
OS
, and
I
B
allow the use of 1 M
resistors without sacrificing the
1
V/
C drift of the AD704. This means lower capacitor values
may be used, reducing cost and space. Furthermore, since the
AD704's I
B
is as low as its I
OS
, over most of the MIL tempera-
ture range, most applications do not require the use of the
normal balancing resistor (with its stability capacitor). Adding the
optional balancing resistor enhances performance at high
temperatures, as shown in Figure 26. Table II gives capacitor
values for several common low pass responses.
180
120
60
0
60
120
180
40
0
+40
+80
+120
OFFSET VOLTAGE
OF FILTER CIRCUIT (RTI)
V
WITHOUT OPTIONAL
BALANCE RESISTOR, R3
TEMPERATURE C
o
WITH OPTIONAL
BALANCE RESISTOR, R3
Figure 26. V
OS
vs. Temperature Performance of the 1 Hz
Filter Circuit
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