TADM04622 SONET/SDH 155/622 Mbits/s Interface
Product Brief
October 1999
Features
s
Transmission convergence and SONET/SDH ter-
minal/ADM functionality for linear and ring net-
works.
s
Versatile IC supports 155/622 Mbits/s SONET/
SDH interface solutions for packet over SONET
(POS), frame relay (FR), or asynchronous transfer
mode (ATM) applications.
s
Low-power 2.5 V/3.3 V operation.
s
40 C to +85 C temperature range.
SONET/SDH Interface
s
Termination of quad STS-3/STM-1 or STS-12/
STM-4.
s
Supports overhead processing for transport and
path overhead bytes.
s
Optional insertion and extraction of overhead bytes
via serial overhead interface.
s
STS pointer processing to align the receive frame
to the system frame.
s
STS-1 granularity cross connect between receive,
mate, STM, and data payloads.
s
Support for 1+1 and 1:1 linear networks; UPSR
and BLSR ring networks.
s
Full path termination and SPE extraction/insertion.
s
SONET/SDH compliant condition and alarm
reporting.
s
Handles all concatenation levels of STS-1 to
STS-12c (in multiples of 1: e.g., 2c, 3c, 4c, etc.).
s
Built-in diagnostic loopback modes.
s
Compliant with Bellcore,
ANSI
*, and ITU stan-
dards.
Data Processing
s
Provisionable data engine supports payload inser-
tion/extraction for PPP, ATM, or HDLC streams.
s
Extraction and insertion of DS3 frames containing
HDLC or ATM data streams for up to 16 channels.
s
Integrated UTOPIA Level 2 and Level 3 compatible
physical layer interface for packets or ATM cells.
*
ANSI
is a registered trademark of American National Standards
Institute, Inc.
s
Insertion and extraction of up to 16 separate data
channels.
s
Maintains counts for cell/packet traffic (e.g., total
number of cells, number of discarded cells).
s
Direct cell/packet over fiber interface device.
s
Compliant with ATM forum, ITU standards, and
IETF standards.
Interfaces
s
Enhanced UTOPIA interface for cell and packet
transfer (PLATO).
s
Built-in redundant STS/STM backplane interface
using 622 MHz LVDS technology.
s
Mate-to-mate backplane interface using 622 MHz
LVDS technology for 1+1, 1:1, BLSR, and UPSR
network support.
s
Optional 78 MHz bus (32-bit) for STS/STM inter-
face.
Microprocessor Interface
s
Up to 66 MHz synchronous.
s
16-bit address and 16-bit data interface.
s
Synchronous or asynchronous modes available.
Description
The TADM04622 SONET/SDH interface device pro-
vides a versatile solution for OC-3/OC-12 linear and
ring datacom/telecom applications. Constructed
using Lucent's state-of-the-art CMOS technology,
this device incorporates integrated SONET/SDH
framing, section/line/path termination, pointer pro-
cessing, cross connect, and data engine blocks.
The device provides complete encapsulation and de-
encapsulation for packet and ATM streams into and
out of SONET/SDH payloads.
Communication with the TADM device is accom-
plished through a generic microprocessor interface.
The device supports separate address and data
buses.
Product Brief
TADM04622 SONET/SDH 155/622 Mbits/s Interface
October 1999
Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No
rights under any patent accompany the sale of any such product(s) or information.
Copyright 1999 Lucent Technologies Inc.
All Rights Reserved
October 1999
PN00-008SONT (Replaces PN99-014SONT)
For additional information, contact your Microelectronics Group Account Manager or the following:
INTERNET:
http://www.lucent.com/micro
E-MAIL:
docmaster@micro.lucent.com
N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103
1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106)
ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256
Tel. (65) 778 8833, FAX (65) 777 7495
CHINA:
Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai
200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652
JAPAN:
Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan
Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700
EUROPE:
Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 7000 582 368, FAX (44) 1189 328 148
Technical Inquiries:
GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Ascot),
FRANCE: (33) 1 40 83 68 00 (Paris), SWEDEN: (46) 8 594 607 00 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki),
ITALY: (39) 02 6608131 (Milan), SPAIN: (34) 1 807 1441 (Madrid)
Description
(continued)
With the TADM device, construction of all types of interfaces for OC-3/OC-12 data equipment is simplified and cost
reduced allowing extremely competitive solutions to be constructed.
This device integrates the SONET/SDH network termination functions with a generic cell/packet delineation circuit.
It supports STS-12/STM-4 and quad STS-3/STM-1 interface rates. Up to 16 data channels transported within an
STS-N payload are processed and handed off over an enhanced UTOPIA interface. The concatenation levels sup-
ported by this device are STS-1, STS-2c, STS-3c, STS-4c, . . . , STS12c. The data formats processed by this
device are ATM cells or HDLC framed packets such as PPP or SDL (SDL is planned for future releases of the
device) framed packets. Future plans for the TADM04622 also call for a virtual concatenation feature allowing all
nontraditional concatenation modes like STS-5c, STS-7c, etc. Enabling service providers flexibility to adjust their
bandwidth on demand.
5-7393(F).a
Figure 1. Block Diagram
PACKET/CELL
OVERHEAD
PROCESSOR:
DELINEATION
DESCRAMBLING
DECAPSULATION
PROCESSOR
MONITOR
OVERHEAD
PROCESSOR
INSERT
TRANSPORT
OVERHEAD
I
N
TE
R
F
A
C
E BL
O
C
K
PO
I
N
T
E
R
PRO
C
ES
SO
R
CONNECTION
MEMORY
PTR
INTER
AND
DS3/
MPR
PACKET/CELL
FIFOs
CONTROL
DS3/
MPR
AND
SPE
MPR
PACKET/CELL
PROCESSOR:
ENCAPSULATION
SCRAMBLING
PAYLOAD
TERMINATION
TSI
STM INTERFACE
MATE
INTERFACE
SWITCHING
UTOPIA
INTERFACE
STM_B
STM_A
MPU INTERFACE
DIRECT CELL/PACKET OVER FIBER
DIRECT CELL/PACKET OVER FIBER
STM-4/STS-12
OR QUAD
STM-1/STS-3
STM-4/STS-12
OR QUAD
STM-1/STS-3
MISCELLANEOUS
GPIO/STMDCC
TO GO INTERFACE
TERMINATION
TXCLK
PATH
SWITCH
LINE
SWITCH
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