Document Outline

• Table of Contents
• Figures
• Tables
• 1.0 Introduction
  • 1.1 Conventions, Notations and Definitions
  • 1.2 Features
  • 1.3 Applications
  • 1.4 Functional Description
    • Figure 1 : Functional Block Diagram
    • 1.4.1 Port A and Port B Interfaces
      • 1.4.1.1 FAS466 DMA Mode
      • 1.4.1.2 Initiator Synchronous DMA Mode
    • 1.4.2 Data Expansion During Compression
    • 1.4.3 Multiple Records
    • 1.4.4 Byte Alignment
      • Figure 2 : Multiple Record Compression
      • Figure 3 : Port A Interface Input Padding
• 2.0 Compression Operation
  • 2.1 Compression Pass Through
  • 2.2 Compression
• 3.0 Decompression Operation
  • 3.1 Decompression Pass Through
  • 3.2 Decompression
  • 3.3 Decompression Output Disabled Mode
• 4.0 Microprocessor Interface and Register Access
  • 4.1 Microprocessor Interface
    • Table 1 : Microprocessor Interface Control Signals
    • 4.1.1 Interrupts
    • 4.1.2 Resets
    • 4.1.3 Port A Interface FIFO Access
  • 4.2 Register Access
  • 4.3 Pausing / Resume
• 5.0 Port A and Port B Configuration
  • Table 2 : Port A Interface Signals
  • Table 3 : Port B Interface Signals
• 6.0 Register Description
  • 6.1 Status 0 (STAT0)
  • 6.2 Status 1 (STAT1)
  • 6.3 Port A Configuration 0 (ACNF0)
  • 6.4 Port A Configuration 1 (ACNF1)
  • 6.5 Port B Configuration 0 (BCNF0)
  • 6.6 Port B Configuration 1 (BCNF1)
  • 6.7 Identification (ID0, ID1)
  • 6.8 Port A Polarity (APOL)
  • 6.9 Port B Polarity (BPOL)
  • 6.10 Port A Transfer Count (ATCL0, ATCL1, ATCH0, ATCH1)
  • 6.11 Record Count (RCL0, RCL1, RCH0, RCH1)
  • 6.12 Port B Compare Count (BCCL0, BCCL1, BCCH0, BCCH1)
  • 6.13 Port B Transfer Count (BTCL0, BTCL1, BTCH0, BTCH1)
  • 6.14 Port A FIFO Data Access (AFIF0, AFIF1)
  • 6.15 Compressed Bytes Processed (CBPL0, CBPL1, CBPH0, CBPH1)
  • 6.16 Port A FIFO Control (AFCT)
  • 6.17 Error Status (ERRS)
  • 6.18 Interrupt Status 0 (INTS0)
  • 6.19 Interrupt Status 1 (INTS1)
  • 6.20 Command (CMND)
  • 6.21 Record Length (RLL0, RLL1, RLH0, RLH1)
  • 6.22 Data Disabled Count (DDCL0, DDCL1, DDCH0, DDCH1)
  • 6.23 Error Mask (EMSK)
  • 6.24 Interrupt Mask 0 (IMSK0)
  • 6.25 Interrupt Mask 1 (IMSK1)
• 7.0 Signal Descriptions
  • 7.1 Microprocessor Interface
  • 7.2 Port A Interface
  • 7.3 Port B Interface
• 8.0 Pinout
  • Figure 4 : Pinout
• 9.0 Electrical Specifications
  • 9.1 Absolute Maximum Ratings
  • 9.2 Recommended Operating Conditions
  • 9.3 DC Specifications
• 10.0 Timing Specifications
  • Figure 5 : Clock Timing
  • Table 4 : Clock Timing
  • Figure 6 : Reset Timing
  • Table 5 : Reset Timing
  • Figure 7 : Processor Read Timing, MMODE = 1
  • Table 6 : Processor Read Timing, MMODE = 1
  • Figure 8 : Processor Write Timing, MMODE = 1
  • Table 7 : Processor Write Timing, MMODE = 1
  • Figure 9 : Processor Read Timing, MMODE = 0
  • Table 8 : Processor Read Timing, MMODE = 0
  • Figure 10 : Processor Write Timing, MMODE = 0
  • Table 9 : Processor Write Timing, MMODE = 0
  • Figure 11 : Port A, FAS466 DMA Slave Mode Read
  • Table 10 : Port A, FAS466 DMA Slave Mode Read
  • Figure 12 : Port A, FAS466 DMA Slave Mode Write
  • Table 11 : Port A, FAS466 DMA Slave Mode Write
  • Figure 13 : Port B, FAS466 DMA Master Mode Read
  • Table 12 : Port B, FAS466 DMA Master Mode Read
  • Figure 14 : Port B, FAS466 DMA Master Mode Write
  • Table 13 : Port B, FAS466 DMA Master Mode Write
  • Figure 15 : Port A, Initiator Synchronous DMA Mode In Timing
  • Table 14 : Port A, Initiator Synchronous DMA Mode In Timing
  • Figure 16 : Port A, Initiator Synchronous DMA Mode Out Timing
  • Table 15 : Port A, Initiator Synchronous DMA Mode Out Timing
  • Figure 17 : Port B, Initiator Synchronous DMA Mode Out Timing
  • Table 16 : Port B, Initiator Synchronous DMA Mode Out Timing
  • Figure 18 : Port B, Initiator Synchronous DMA Mode In Timing
  • Table 17 : Port B, Initiator Synchronous DMA Mode In Timing
• 11.0 Packaging
  • Figure 19 : AHA3580 TQFP Package Specifications
  • Table 18 : TQFP (Thin Quad Flat Pack) 14 � 14 mm Package Dimensions
• 12.0 Ordering Information
  • 12.1 Available Parts
  • 12.2 Part Numbering
• 13.0 AHA Related Technical Publications