This product is covered under multiple patents held or licensed by Comtech AHA
Corporation.
This product is covered by a Turbo Code Patent License from France Telecom -
TDF - Groupe des ecoles des telecommunications.
comtech aha corporation
comtech aha corporation
PRODUCT BRIEF
AHA4540 TPC EVB
TPC EVALUATION BOARD
INTRODUCTION
The AHA4540-EVB is an evaluation board that
can be integrated into a communications system for
evaluation of the AHA4540 Turbo Product Code
encoder/decoder device at real system speeds.
Alternatively, it can be connected to a Bit Error Rate
Tester (BERT) for evaluating the performance of the
AHA4540 with a user supplied communications
channel.
The evaluation board includes one AHA4540
device supporting full duplex encoding and
decoding of a serial data stream, I and Q symbol
data, or soft metrics using Turbo Product Codes.
The EVB supports standalone encoding or decoding
as well as full duplex simultaneous
encoding/decoding. The AHA4540 device is fully
programmable to cover a wide range of
configurations. All registers in the AHA4540
device are programmable and readable through an
RS-232 serial port connection to a PC.
Communication software is provided with the
evaluation board for configuration and control from
the host personal computer.
AHA4540 EVB also supports numerous self-
test modes that allow loop back tests at different
stages and BERT-like tests where the board
generates pseudo random test patterns.
FEATURES
P
PERFORMANCE:
148 MHz maximum clock input (S_UCLK,
S_CCLK)
148 Mbits/sec maximum serial data rate
Simultaneous independent TPC encoding and
decoding
Access to registers in the AHA4540 device
Up to 4 bit soft decision input to TPC decoder
On-board synchronization in the AHA4540
On-board AHA4540 includes CRC insertion and
detection
INTERFACE:
SMA connectors for all clock and data signals
on/off board
2 frequency synthesizers on board generate
payload side clocks at frequencies up to 60 MHz
User can supply payload and channel side bit
clocks up to 148 MHz max frequency
RS-232 control interface for board configuration
and monitoring
GENERAL:
PCB form factor (5.30" x 8.80")
On board LED status indicators
Requires 5V power supply @ 2.0 A
Requires Windows PC for configuration control
via RS-232 port
SMA connectors are used for inputs and outputs
for all high speed serial interfaces
comtech aha corporation
CONNECTORS
Data I/O
SMA connectors are used for Inputs and outputs
for all high speed serial clock and data interfaces.
The payload side SMA connectors may connect
directly to a BERT transmitter and receiver. The
channel side connections would normally be
through the parallel flat cable connectors. The
parallel connections for the three parallel ports other
than the USER_CDATA use 50 pin twisted pair flat
cables with every other conductor grounded.
Control Port
RS232 connection to the host PC is through a 9-
pin DC shell connector located on the back of the
board. Configuration and monitoring of the EVB
operation is done through this port. A pentium class
PC running Windows OS is required.
Power
5.0V Power is supplied by the user's power
supply. Maximum current required is 2.0 Amps.
FUNCTIONAL OVERVIEW
The AHA4540 simultaneously encodes and
decodes user provided data using Turbo Product
Codes (TPCs). User provided data is clocked into
the EVB serially using signals S-UCLK and
S_UDATA from coaxial SMA connectors, or with
parallel 8-bit transfers using USER_UDATA from
the parallel connector JP3 and ready/accept
handshake signals. In Figure 1, CPLD_1 contains
the multiplexor that selects either serial data with
clock, or parallel data from the USER_UDATA bus.
Control of this multiplexor is via the AHAESB
Windows software provided. The TPC encoder in
the AHA4540 device encodes the data, adds FEC
bits, then outputs the data to CPLD_3 where the
data gets serialized and transmitted to the channel
along with the clock, S_EDATA and S_ECLK, and
also driven out in 8-bit wide format to the
USER_EDATA bus on JP4.
Once the data is output from the evalutation
board on either the serial or parallel encoded data
interfaces, it is transmitted through an external
channel where the data is corrupted by the addition
of noise resulting in data bit errors. This corrupted
data is clocked into the evaluation board serially
using S_CCLK and S_CDATA or using the
USER_CDATA 16-bit wide parallel input bus on
JP5.
The S_CDATA signal is useful for wrapping
around hard decision channel data back into the
AHA4540 TPC decoder. For soft decision data the
16-bit parallel port must be used. The CDATA port
of the AHA4540 accepts up to 16-bits per clock
transfers of received channel data. This data may be
I,Q data or soft metrics. The chip can accept up to
four I,Q pairs or four soft metrics per transfer. In
serial streaming mode the received serial channel
data is deserialized into four soft metrics with the
lower 3 bits of each metric forced to zero in the
FPGA. The TPC decoder in the AHA4540 corrects
the data errors and outputs the corrected blocks
through CPLD_2 in both serialized clock and data
format, S_DDATA, S_DCLK, and parallel format
to the USER_DDATA bus on JP2.
comtech aha corporation
PB4540evb_1006
2005 Comtech AHA Corp.
comtech aha corporation
1126 Alturas Drive
fax: 208.892.5601
tel: 208.892.5600
e-mail: sales@aha.com
www.aha.com
Moscow, ID 83843-8331
A subsidiary of Comtech Telecommunications Corporation
Figure 1:
Block Diagram
USER INTERFACE SOFTWARE
Configuration of the board is through the
Windows Graphic User Interface software included
with the evaluation board. The software allows the
user to configure the encoder and decoder
operations in terms of type of TPC codes used,
synchronization word, framing, and other control
parameters. The software also allows the user to
monitor the evaluation board for error correcting
status information via the RS232 port connection.
LOOP BACK TEST MODES
Built in loop back modes are provided that
internally connect the encoded output data to the
decoder input interface.This loop back testing
allows on-board BERT testing with random data
pattern generation.
ABOUT AHA
Comtech AHA Corporation (AHA) develops
and markets superior integrated circuits, boards,
and intellectual property core technology for
communications systems architects worldwide.
AHA has been setting the standard in Forward Error
Correction and Lossless Data Compression
technology for many years and provides flexible,
cost-effective solutions for today's growing
bandwidth and reliability challenges. Comtech
AHA Corporation is a wholly owned subsidiary of
Comtech Telecommuncations Corp. (NASDAQ:
CMTL). For more information, visit www.aha.com.
ORDERING INFORMATION
BERT
TRX
(SMA)
AHA4540
Encoder
ED
PAR
I/O
PAR
I/O
BERT
REC
(SMA)
CPLD1
Deserializer
CPLD2
Serializer
UD
AHA4540
Decoder
CD
DD
8
UPI
8
16
Encoder
PLL
Decoder
PLL
CPLD4
Deserializer
FPGA
SERIAL
IN
(SMA)
PAR
I/O
PC I/O
RS232
AHA4540 - EVB
CPLD3
Serializer
SERIAL
OUT
(SMA)
8
CLK_SYNC
(SMA)
PART NUMBER
DESCRIPTION
AHA4540-EVB
AHA4540 Evaluation Board
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