ASAHI KASEI [AK2303LV]
MS0117-E-00 1 2001/09
AK2303LV
Dual PCM CODEC for PBX Analog Line Card
GENERAL DESCRIPTION
AK2303LV is a 3.3V dual PCM CODEC-Filter most
suitable for analog line card of PBX switch.
CODEC-Filter is compliant with G711/G712
recommendations.
It includes Selectable A-law/u-law function, Internal
Gain Adjustment from +6dB to 18dB by 1dB step
control. All of these functions are controlled by the
internal register accessed through the serial interface.
Additionally, channel mute and A-law/u-law selection is
controlled by the hard pin.
PCM interface of AK2303LV supports Long Frame,
Short Frame clock formats and GCI format. 4.096MHz,
2.048MHz bit clock input is available for PCM interface.
FEATURE
-
Dual PCM CODEC and Filtering systems for
PBX switch
-
Independent functions on each channel
Controlled by the internal register or hard pin
- Power Down Mode (Register setting)
- Mute (Hard pin, register setting)
- Gain Adjustment: +6 to -18dB (1dB step by
register setting)
-
Selectable PCM Data Interface Timing:
Long Frame / Short Frame/GCI
-
Selectable PCM Data Rate:
4.096MHz, 2.048MHz (Register setting)
-
OP Amp for External Gain Adjustment
-
A-law/u-law Select (Hard pin, Register setting)
-
Serial Interface for the internal register access
-
Power on Reset
-
Single Power Supply Voltage
- +3.3V 0.3V
-
Low Power Consumption
- 35mW typ
PACKAGE
- 28pinVSOP
9.8 x 7.6 mm (0.65mm pin pitch)
ASAHI KASEI
[AK2303LV]
2303-E-00 2 2001/09
CONTENTS
ITEMS
PAGE
- BLOCK DIAGRAM............................................. 3
- PIN ASSIGNMENT............................................. 4
- PIN CONDITION................................................ 5
- PIN FUNCTION................................................. 6
- CIRCUIT DESCRIPTION...................................... 8
- FUNCTIONAL DESCRIPTION.............................. 9
- PCM INTERFACE...................................... 9
LONGFRAME/SHORTFRAME................ 9
GCI.................................................... 12
- MUTE.................................................... 14
- GAIN ADJUSTMENT................................. 15
- RESET................................................... 16
- POWER DOWN........................................ 17
- SERIAL INTERFACE................................ 19
- MODE SETTING....................................... 23
- REGISTER....................................................... 24
- ABSOLUTE MAXIMUM RATINGS......................... 28
- RECOMMENDED OPERATING CONDITIONS........ 28
- ELECTRICAL CHARACTERISTICS....................... 28
- APPLICATION CIRCUIT EXAMPLE....................... 37
- PACKAGE INFORMATION.................................. 39
ASAHI KASEI
[AK2303LV]
2303-E-00 4 2001/09
PIN ASSIGNMENT
TEST
VFTN1
GST1
GSR1
VFR1
VR1
ALAWN
AVDD
DVDD
FS
BCLK
DX
DR
MUTE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VREF
MODE
VFTN0
GST0
GSR0
VFR0
AVSS
DVSS
VR0
LPC
CSN
DATA
SCLK
MUTE0
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ASAHI KASEI
[AK2303LV]
2303-E-00 5 2001/09
PIN CONDITION
Pin
#
Name I/O Pin
type
AC load
(MAX.)
DC load
(MIN.)
Outout status
(Power down
mode)
Remarks
1
TEST I (*2)
Tied to AVSS
2
VFTN1 I Analog
3
GST1 O Analog
50pF 10k
(*1)
Hi-Z
4
GSR1 O Analog
50pF 10k
(*1)
Hi-Z
5
VFR1 I Analog
6
VR1 O
Analog 50pF 10k
Hi-Z
7
ALAWN I CMOS
8
AVDD
9
DVDD
10
FS I
CMOS
11
BCLK I CMOS
12
DX O
CMOS 15pF
Hi-Z
13
DR I
CMOS
14
MUTE1 I CMOS
15
MUTE0 I CMOS
16
SCLK I CMOS
17
DATA I/O CMOS
15pF
Hi-Z
(Input)
18
CSN I CMOS
19
LPC O
Analog
0.22uF
20
VR0 O
Analog 50pF 10k
Hi-Z
21
DVSS
22
AVSS
23
VFR0 I Analog
24
GSR0 O
Analog
50pF
10k
(*1)
Hi-Z
25
GST0 O Analog
50pF 10k
(*1)
Hi-Z
26
VFTN0 I Analog
27
MODE I
(*2)
Tied to AVSS or
AVDD
28
VREF O Analog
More than 1.0uF
*1) DC load(MIN.) includes a feedback resistance of input/output op-amp.
*2) Please tie to AVSS or AVDD, in order not to have a noise impact to the adjacent analog pins.
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