[ASAHI KASEI] [AK4544A]
<MS0026-E-00> 2000/04
- 1 -
nBlock Diagram
Analog Section
ADC
DAC
Control Signals
LINE_IN
SYNC
SDATA_OUT
SDATA_IN
BIT_CLOCK
RESET#
CD
AUX
VIDEO
MIC2
MIC1
Phone
PC_BEEP
LINE_OUT
TRUE_LINE_LEVEL
MONO_OUT
AC'97
Registers
and
Control
Logic
AC
Link
Interface
Power Management
Clock Generator
3D Stereo Enhancement
Volume
and
Mute
Control
Volume
and
Mute
Control
Digital Section
Multiple Codec Support
Codec ID#
Voltage
Reference
EAPD
SEL_CMOS
PLL
Dataslot
Controller
Input
Multiplexer
Output
Mixer
General Description
The AK4544A is a 18bit high performance codec which support
variable sampling rate conversion compliant with Audio Codec ' 97
Rev 2.1 requirements.
The AK4544A provides two pairs of stereo outputs with independent
volume controls, a mono output, and multiple stereo and mono inputs,
along with flexible mixing, gain and mute functions to provide a
complete integrated audio solution for PCs. In addition, the AK4544A
has the POP feature suitable for 3D positioning and direct output from
DAC for AD monitoring or docking station application.
The AK4544A can function as a Primary AC' 97 or Secondary codec
depending on the codec ID configuration(Multiple codec extension),
making the AK4544A suitable for the docking station application and
multiple codec applications.
Sampling frequency is programmable through AC-link as 48k, 44.1k,
32k, 22.05k, 16k, 11.025k, and 8kHz. This setting is done independent
to ADC and DAC side while L/R channels are kept identical.
The AK4544A provides excellent audio performance, meeting or
exceeding PC99 requirements for a PCI audio solution. It has low
power consumption, and flexible power-down modes for use in laptops
as well as desktop PCs and aftermarket add-in boards.
Like the earlier pin-compatible AK4540, AK4541, AK4542, and
AK4543, the AK4544A is available in a compact 48-lead LQFP
package.
Reference : Audio Codec ' 97 Revision 2.1
Features
AC' 97 Rev. 2.1 Compliant
18bit Resolution A/D and D/A
Exceeds PC99 Performance Requirements:
AK4544A (@fs=48k)
A/D.................. 90dBA
D/A.................. 89dBA
A-A.................. 95dBA
Analog Inputs:
4 Stereo Inputs: LINE, CD, VIDEO, AUX
Speakerphone and PC BEEP Inputs
2 Independent MIC Inputs
Variable Sampling Rate Support
48k, 44.1k, 32k, 22.05k, 16k, 11.025k, 8k
Analog Output:
Stereo LINE Output with volume control
True Line Level with volume control
Mono Output with volume control
3D Stereo Enhancement
POP Function & DAC Feed Back Control
Multiple codec Capability
The AK4544A can work as a Primary or Secondary
codec depended on codec ID configuration.
EAPD(External Amplifier Powerdown) Support
Power Supplies: Analog 5.0V, Digital 5.0V or 3.3V
Low Power Consumption
230mW(Analog:5V/Digital:3.3V) at full operation
48 Pin LQFP Package
AC' 97
TM
Multimedia Audio CODEC with SRC
AK4544A
* AKM assumes no responsibility for the usage beyond the conditions in this data sheet.
[ASAHI KASEI] [AK4544A]
<MS0026-E-00> 2000/04
- 2 -
42
41
40
39
38
37
MONO_OUT
AVdd2
NC
LNLVL_OUT_L
LNLVL_OUT_R
AVss2
TEST2
43
TEST3
44
codec ID0#
45
codec ID1#
46
47
EAPD
1
48
SEL_CMOS
LINE_OUT_L
3Dcap
VRDA
VRAD
AFILTR
AFILTL
VrefOut
Vref
AVss1
AVdd1
LINE_OUT_R
DVdd1
2
XTL_IN
3
XTL_OUT
4
DVss1
5
SDATA_OUT
6
B
I
T_CLK
7
SDATA_IN
8
DVdd2
9
SYNC
10
RESET#
11
12
DVss2
PC_BEEP
19
20
21
22
23
24
LINE_IN_R
LINE_IN_L
MIC2
MIC1
CD_R
CD_GND
18
CD_L
17
VIDEO_R
16
VIDEO_L
15
AUX_R
14
AUX_L
13
PHONE
36
35
25
26
27
28
29
30
31
32
33
34
PLLfilter
[ASAHI KASEI] [AK4544A]
<MS0026-E-00> 2000/04
- 3 -
Pin/Function
No.
Signal Name
I/O
Description
1
DVdd1
-
Digital power supply; 3.3V or 5.0V(DVdd1 = DVdd2)
0.1uF + 4.7uF capacitors should be connected to digital ground.
2
XTL_IN
(MCLKI)
I
24.576MHz(512fs) Crystal is normally connected.
If crystal is not connected, external clock can be used.
3
XTL_OUT(open)
O
24.
576MHz(512fs) Crystal. If external clock is used, this pin should be open.
4
DVss1
-
Digital Ground; 0V. This pin should be directly connected to DVss2 on board.
5
SDATA_OUT
I
Serial 256-bit AC'97 data stream from digital controller
6
BIT_CLK
I/O
12.288MHz(256fs) serial data clock
Output at Primary codec. Input at Secondary codec.
7
DVss2
-
Digital Ground; 0V. This pin should be directly connected to DVss1 on board.
8
SDATA_IN
O
Serial 256-bit AC'97 data stream to digital controller
9
DVdd2
-
Digital power supply; 3.3V or 5.0V(DVdd1 = DVdd2)
0.1uF + 4.7uF capacitors should be connected to digital ground.
10
SYNC
I
AC'97 Sync Clock, 48kHz(1fs) fixed rate sampling rate
11
RESET#
I
AC'97 Master Hardware Reset
12
PC_BEEP
I
PC Speaker beep pass through
13
PHONE
I
From telephony subsystem speakerphone
14
AUX_L
I
Aux Left Channel
15
AUX_R
I
Aux Right Channel
16
VIDEO_L
I
Video Audio Left Channel
17
VIDEO_R
I
Video Audio Right Channel
18
CD_L
I
CD Audio Left Channel
19
CD_GND
I
CD Audio analog ground
CD_GND or analog ground should be connected through capacitor.
20
CD_R
I
CD Audio Right Channel
21
MIC1
I
Desktop Microphone Input
22
MIC2
I
Second Microphone Input
23
LINE_IN_L
I
Line In Left Channel
24
LINE_IN_R
I
Line In Right Channel
25
AVdd1
-
Power supply; 5.0V(AVdd1=AVdd2)
0.1uF + 4.7uF capacitors should be connected to AVss1(analog ground).
26
AVss1
-
Analog Ground; 0V
27
Vref
O
Reference Voltage Output;
0.1
F +4.7
F capacitors should be connected to Avss1(analog ground).
28
VrefOut
O
Reference Voltage Output (2.5V,1.25mA)
29
AFILTL
O
Anti-Aliasing Filter Cap; Connected to analog ground with 1nF capacitor.
30
AFILTR
O
Anti-Aliasing Filter Cap; Connected to analog ground with 1nF capacitor.
31
VRAD
O
Vref for ADC ; 0.1
F capacitor should be connected to analog ground.
32
PLLfilter
O
Loop filter for PLL is connected; 36k resistor and 33nF capacitor in series and
390pF capacitor.
33
VRDA
O
Vref for DAC; 0.1
F capacitor should be connected to analog ground.
34
3Dcap
O
3D Enhancement Cap; 27nF capacitor should be connected to analog ground.
35
LINE_OUT_L
O
Line Out Left Channel
36
LINE_OUT_R
O
Line Out Right Channel
37
MONO_OUT
O
To telephony subsystem speakerphone
38
AVdd2
-
Power supply; 5.0V(AVdd1=AVdd2)
0.1uF capacitor should be connected to AVss2(analog ground).
39
LNLVL_OUT_L
O
True Line Level Out Left Channel
40
NC
-
No Connection
41
LNLVL_OUT_R
O
True Line Level Out Right Channel
42
AVss2
-
Analog Ground
43
TEST2
I
Test pin (This pin should be open for normal operation):With internal pull-down.
44
TEST3
I
Test pin (This pin should be open for normal operation):With internal pull-down.
45
Codec ID0#
I
Codec ID configuration(ID select input for multiple codec extension) See Page21.
Negative logic input. With internal pull-up.
46
Codec ID1#
I
Codec ID configuration(ID select input for multiple codec extension) See Page21.
Negative logic input. With internal pull-up.
[ASAHI KASEI] [AK4544A]
<MS0026-E-00> 2000/04
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47
EAPD
O
EAPD(External amplified powerdown)
48
SEL_CMOS
I
CMOS/TTL selection for digital input levels. With internal pull-up. See Page 28.
CMOS: Leave open for 3.3V supply.
TTL : Tie to GND for 5V supply.
Absolute Maximum Rating
AVss1, AVss2, DVss1, DVss2 =0V (Note 1)
Parameter
Symbol
min
max
Units
Power Supplies (Note 2)
Analog(AVdd1 & AVdd2)
Digital(DVdd1 & DVdd2)
VA
VD
-0.3
-0.3
6.0
6.0
V
V
Input Current (any pins except for supplies)
IIN
-
10
mA
Analog Input Voltage
VINA
-0.3
VA+0.3
V
Digital Input Voltage
VIND
-0.3
VD+0.3
V
Ambient Temperature
Ta
-10
70
C
Storage Temperature
Ta
-65
150
C
Note 1: All voltages with respect to ground.
AGND(AVss1, AVss2) and DGND(DVss1, DVss2) should be same voltage.
Note 2: Supplying Digital Power, Analog Power should be supplied.
Warning: Operation at or beyond these limits may results in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Recommended Operating Condition
AGND, DGND=0V (Note 1)
Parameter
Symbol
min
typ
max
Units
Power Supplies
AK4544A
Analog
Digital
VA
VD
4.75
3.135
5.0
5.0 or 3.3
5.25
5.25
V
V
Note 1 : All voltages with respect to ground.
[ASAHI KASEI] [AK4544A]
<MS0026-E-00> 2000/04
- 5 -
AK4544A Analog Characteristics
Ta=25
C,AVdd=5.0V,DVdd=3.3V, fs=48kHz unless otherwise specified, Signal Frequency =1kHz
All volume setting for ADC/DAC performance measurement is 0dB.
Parameter
min
typ
max
Units
Audio-ADC
Resolution
18
Bits
S/N (A weight, fs=48kHz)
83
90
dB
S/N (A weight, fs=44.1kHz)
87
dB
S/(N+D) (fs=48KHz, -1dB analog input)
70
77
dBFS
Inter Channel Isolation
70
77
dB
Inter Channel Gain Mismatch
0.5
dB
Full Scale Input Voltage
0.88
1.0
1.12
Vrms
Power Supply Rejection
50
dB
Audio DAC: measured at AOUTL/AOUTR via MIXER path
Resolution
18
Bits
S/N (A weighted, fs=48kHz)
: mixer+DAC measured at AOUT
84
89
dB
S/N (A weighted, fs=44.1kHz)
: mixer+DAC measured at AOUT
86
dB
S/(N+D) (fs=48KHz, -1dB digital input)
72
80
dBFS
Inter Channel Isolation
70
80
dB
Inter Channel Gain Mismatch
1.0
dB
Full Scale Output Voltage
0.88
1.0
1.12
Vrms
Total Out-of-Band Noise (28.8kHz - 100kHz)
-70
dB
Power Supply Rejection
50
dB
MIC Amplifier / MUX
Gain : 20dB is selected
18
20
22
dB
Master volume (Mono, Stereo, True Line Level Out) : 1.5dB x 32 step
Step Size
-1.5
dB
Attenuation Control Range
-46.5
0
dB
Load Resistance
10
k
PC Beep : 3dB x 16 step
Step Size
-3.0
dB
Attenuation Control Range
-45
0
dB
Analog Mixer : 1.5dB x 32 step
Step Size
-1.5
dB
Gain Control Range
-34.5
+12
dB
Record Gain : 1.5dB x 16 step
Step Size
+1.5
dB
Gain Control Range
0
+22.5
dB
Mixer
Input Voltage (except for MIC)
1.0
Vrms
Input Voltage MIC : Gain = 0dB
MIC : Gain = 20dB
1
0.1
Vrms
Vrms
S/N(A weighed) : 0dB setting, 1 path is selected at Mixer
CD to AOUT:
Other analog input to AOUT
88
95
95
dB
dB
Input Impedance (Input gain=0dB,Rec_MUTE=off)
PC_BEEP only
Others(PHONE, LINE, CD, AUX, VIDEO)
Input Impedance (MIC1 and MIC2)
(10)
(10)
(10)
76
40
20
k
k
k
Output load Resistance
(LINE_OUT_L/R, MONO_OUT, LNLVL_OUT_L/R)
10
k
Vrefout
Drivability
1.25
mA
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