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Электронный компонент: AK5365

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ASAHI KASEI
[AK5365]
MS0164-E-01
2002/08
- 1 -
GENERAL DESCRIPTION
AK5365 is a high-performance 24-bit, 96kHz sampling ADC for consumer audio and digital recording
applications. Thanks to AKM's Enhanced Dual-Bit modulator architecture, this analog-to-digital converter
has an impressive dynamic range of 103dB with a high level of integration. The AK5365 has a 5-channel
stereo input selector, an input Programmable Gain Amplifier with an ALC function. All this integration with
high-performance makes the AK5365 well suited for CD and DVD recording systems.
FEATURES
1. 24bit Stereo ADC
5ch Stereo Inputs Selector
Input PGA from +12dB to 0dB, 0.5dB Step
Auto Level Control (ALC) Circuit
Digital HPF for offset cancellation (fc=1.0Hz@fs=48kHz)
Digital Attenuator
Soft Mute
Single-end Inputs
S/(N+D) : 94dB
DR, S/N : 103dB
Audio I/F Format : 24bit MSB justified, I
2
S
2. 3-wire Serial
P Interface / I
2
C-Bus
3. Master / Slave Mode
4. Master Clock : 256fs/384fs/512fs
5. Sampling Rate : 32kHz to 96kHz
6. Power Supply
AVDD: 4.75
5.25V (typ. 5.0V)
DVDD: 3.0
5.25V (typ. 3.3V)
7. Power Supply Current : 27mA
8. Ta = -40
85
C
9. Package : 44pin LQFP
24-Bit 96kHz
ADC with Selector/PGA/ALC
AK5365
ASAHI KASEI
[AK5365]
MS0164-E-01
2002/08
- 2 -
Block Diagram
LIN1
LIN2
LIN3
LIN4
LIN5
RIN1
RIN2
RIN3
RIN4
RIN5
ADC
HPF
Audio I/F
Controller
IPGAL
ROPIN
ROUT
IPGAR
Control Register
I/F
CSN
CAD1
CCLK
SCL
CDTI
SDA
LRCK
BICK
MCLK
SDTO
AVSS
AVDD
DVSS
DVDD
LOPIN
M/S
SEL2 SEL1 SEL0
PDN
LOUT
ALC
IPGA
IPGA
DATT
CTRL
(ALC)
(ALC)
SMUTE
Pre-Amp
Pre-Amp
VCOM
Block diagram
ASAHI KASEI
[AK5365]
MS0164-E-01
2002/08
- 3 -
Ordering Guide
AK5365VQ
-
40
+85
C
44pin LQFP (0.8mm pitch)
AKD5365
Evaluation Board for AK5365
Pin Layout
LIN5
RIN5
44 43
1
42 41 40 39 38 37 36 35 34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
2
3
4
5
6
7
8
9
10
11
AK5365VQ
Top View
TEST1
LIN4
TEST2
LIN3
TEST3
LIN2
TEST4
LIN1
LOPIN
LOUT
IPGAL
IPGAR
ROUT
ROPIN
AVDD
AVSS
VCOM
DVSS
DVDD
SDTO
BICK
LRCK
MCLK
PDN
ALC
SMUTE
SEL0
SEL1
SEL2
CDTI/SDA
CCLK/SCL
CSN/CAD1
TEST8
RIN4
TEST7
RIN3
TEST6
RIN2
TEST5
RIN1
M/S
CTRL
ASAHI KASEI
[AK5365]
MS0164-E-01
2002/08
- 4 -
PIN/FUNCTION
No.
Pin Name
I/O
Function
1
LIN5
I
Lch Analog Input 5 Pin
2
TEST1
I
Test 1 Pin (Connected to AVSS)
3
LIN4
I
Lch Analog Input 4 Pin
4
TEST2
I
Test 2 Pin (Connected to AVSS)
5
LIN3
I
Lch Analog Input 3 Pin
6
TEST3
I
Test 3 Pin (Connected to AVSS)
7
LIN2
I
Lch Analog Input 2 Pin
8
TEST4
I
Test 4 Pin (Connected to AVSS)
9
LIN1
I
Lch Analog Input 1 Pin
10
LOPIN
I
Lch Feed Back Resistor Input Pin
11
LOUT
O
Lch Feed Back Resistor Output Pin
12
IPGAL
I
Lch IPGA Input Pin
13
IPGAR
I
Rch IPGA Input Pin
14
ROUT
O
Rch Feed Back Resistor Output Pin
15
ROPIN
I
Rch Feed Back Resistor Input Pin
16
AVDD
-
Analog Power Supply Pin, 4.75
5.25V
17
AVSS
-
Analog Ground Pin
18
VCOM
O
Common Voltage Output Pin, AVDD/2
Bias voltage of ADC input.
19
DVSS
-
Digital Ground Pin
20
DVDD
-
Digital Power Supply Pin, 3.0
5.25V
21
SDTO
O
Audio Serial Data Output Pin
22
BICK
I/O
Audio Serial Data Clock Pin
Note: All digital input pins except pull-down pins should not be left floating.
Note: TEST1, TEST2, TEST3 and TEST4 pins should be connected to AVSS.
ASAHI KASEI
[AK5365]
MS0164-E-01
2002/08
- 5 -
No.
Pin Name
I/O
Function
23
LRCK
I/O
Output Channel Clock Pin
24
MCLK
I
Master Clock Input Pin
25
PDN
I
Power-Down Mode Pin
"H": Power up, "L": Power down reset and initializes the control register.
26
ALC
I
ALC Enable Pin (Internal Pull-down Pin, typ. 100k
)
"H" : ALC Enable, "L" : ALC Disable
27
SMUTE
I
Soft Mute Pin (Internal Pull-down Pin, typ. 100k
)
"H" : Soft Mute, "L" : Normal Operation
28
SEL0
I
Input Selector 0 Pin
29
SEL1
I
Input Selector 1 Pin
30
SEL2
I
Input Selector 2 Pin
CDTI
I
Control Data Input Pin in 3-wire Control (CTRL pin = "L")
31
SDA
I/O
Control Data Input / Output Pin in I
2
C Control (CTRL pin = "H")
CCLK
I
Control Data Clock Pin in 3-wire Control (CTRL pin = "L")
32
SCL
I
Control Data Clock Pin in I
2
C Control (CTRL pin = "H")
CSN
I
Chip Select Pin in 3-wire Control (CTRL pin = "L")
33
CAD1
I
Chip Address 1 Select Pin in I
2
C Control (CTRL pin = "H")
34
CTRL
I
Control Mode Pin
"H" : I
2
C Control & I
2
S Compatible, "L" : 3-wire Control
35
M/S
I
Master / Slave Mode Pin
"H" : Master Mode, "L" : Slave Mode
36
RIN1
I
Rch Analog Input 1 Pin
37
TEST5
I
Test 5 Pin (Connected to AVSS)
38
RIN2
I
Rch Analog Input 2 Pin
39
TEST6
I
Test 6 Pin (Connected to AVSS)
40
RIN3
I
Rch Analog Input 3 Pin
41
TEST7
I
Test 7 Pin (Connected to AVSS)
42
RIN4
I
Rch Analog Input 4 Pin
43
TEST8
I
Test 8 Pin (Connected to AVSS)
44
RIN5
I
Rch Analog Input 5 Pin
Note: All digital input pins except pull-down pins should not be left floating.
Note: TEST5, TEST6, TEST7 and TEST8 pins should be connected to AVSS.