ASAHI KASEI
[AK6480C/81]
DAS04E-00
2005/03
- 1 -
AK6480C/81C
8Kbit Serial CMOS EEPROM
Features
ADVANCED CMOS EEPROM TECHNOLOGY
READ/WRITE NON-VOLATILE MEMORY
- Wide VCC (1.8V to 5.5V) operation
- 8192 bits: 512
16 organization
ONE CHIP MICROCOMPUTER INTERFACE
- Interface with one chip microcomputer's serial communication port directly
LOW POWER CONSUMPTION
- 0.8
A Max. (Standby mode)
HIGH RELIABILITY
- Endurance
: 1000K cycles/Address
- Data Retention : 10 years
SPECIAL FEATURES
- 8 word Page Write Mode
- High speed operation ( f
MAX
=5MHz: VCC=4.5V to 5.5V )
- Automatic write cycle time-out with auto-ERASE (5ms Max.)
- Automatic address increment (READ)
- Ready/ Busy status signal
- Software and Hardware controlled write protection
IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package (SOP, SSOP, MSOP, SON)
Block diagram
CS
R/W AMPS
AND
AUTO ERASE
VPP
GENERATOR
VREF
VPP SW
DECODER
ADD.
BUFFERS
DATA
REGISTER
INSTRUCTION
DECODE,
CONTROL
AND
CLOCK
GENERATION
INSTRUCTION
REGISTER
EEPROM
8192bit
512
16
DI
SK
RESET
16
16
DO
RDY/BUSY
ASAHI KASEI
[AK6480C/81]
DAS04E-00
2005/03
- 2 -
General Description
The AK6480C/81C is a 8192bit, serial, read/write, non-volatile memory device fabricated using an
advanced CMOS EEPROM technology. The AK6480C/81C has 8192bits of memory organized
into 512 registers of 16 bits each. The AK6480C/81C can operate full function under wide
operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage
generation that is used for write operation.
The AK6480C/81C can connect to the serial communication port of popular one chip
microcomputer directly (3 line negative clock synchronous interface). At write operation,
AK6480C/81C takes in the write data from data input pin (DI) to a register synchronously with
rising edge of input pulse of serial clock pin ( SK ). And at read operation, AK6480C/81C takes
out the read data from a register to data output pin (DO) synchronously with falling edge of SK .
The AK6480C/81C has 5 instructions such as READ, WRITE, PAGE WRITE, WREN (write enable)
and WRDS (write disable). Each instruction is organized by op-code block (8bits), address block
(8bits) and data (8bits x 2). When input level of SK pin is high level and input level of chip
select ( CS ) pin is changed from high level to low level, AK6480C/81C can receive the
instructions.
Special features of the AK6480C/81C include : automatic write time-out with auto-ERASE,
Ready/ Busy status signal output and ultra-low standby power mode when deselected ( CS
=high).
Software and Hardware controlled write protection
The AK6480C/81C has 2 (hardware and software) write protection functions.
After power on or after execution of WRDS (write disable) instruction, execution of WRITE
instruction will be disabled. This write protection condition continues until WREN instruction is
executed or VCC is removed from the part.
Execution of READ instruction is independent of both WREN and WRDS instructions.
Reset pin should be low level when WRITE instruction is executed. When the Reset pin is high
level, the WRITE instruction is not executed.
Ready/ Busy status signal
During the automatic write time-out period ( Busy status), the AK6480C/81C can't accept the
other instructions. The AK6480C/81C has 2 functions to know the Busy status from exterior.
The RDY/ BUSY pin indicates the Busy status regardless of the CS pin status. The
RDY/ BUSY pin outputs the low level regardless of the CS pin status during Busy status.
Except the above status, this pin outputs high level.
Also the DO pin indicates the Busy status. When input level of SK pin is low level and input
level of CS pin is changed from high level to low level, the AK6480C/81C is in the status output
mode and the DO pin indicates the Ready/ Busy status. The Ready/ Busy status outputs on
DO pin until CS pin is changed from low level to high level, or first bit ("1") of op-code of next
instruction is given to the part. Except when the device is in the status output mode or outputs
data, the DO pin is in the high impedance state.
ASAHI KASEI
[AK6480C/81]
DAS04E-00
2005/03
- 3 -
Type of Products
Model
Temp.Range
VCC
Package
AK6480CF
-40C to 85C
1.8V to 5.5V
8pin Plastic SOP
AK6480CM
-40C to 85C
1.8V to 5.5V
8pin Plastic SSOP
AK6480CH
-40C to 85C
1.8V to 5.5V
8pin Plastic MSOP
AK6480CL
-40C to 85C
1.8V to 5.5V
8pin Plastic SON
AK6481CM
-40C to 85C
1.8V to 5.5V
8pin Plastic SSOP
AK6481CH
-40C to 85C
1.8V to 5.5V
8pin Plastic MSOP
Pin Arrangement
Pin Function
Pin name
Functions
CS Chip
Select
input
SK
Serial Clock input
DI Serial
Data
input
DO
Serial Data output
RESET RESET
input
RDY/BUSY RDY/BUSY
output
VCC Power
Supply
GND Ground
AK6480CH/81CH
8pin MSOP
RDY/BUSY
SK
CS
DI
DO
1
2
3
4
8
7
6
5 GND
RESET
VCC
RDY/BUSY
8
7
6
5
CS
SK
DI
DO
VCC
GND
1
2
3
4
RESET
AK6480CM/81CM
8pin SSOP
RDY/BUSY
SK
CS
DI
DO
GND
RESET
VCC
1
8
2
3
4
7
6
5
AK6480CL
8pin SON
AK6480CF
8pin SOP
SK
CS
RDY/BUSY
VCC
2
1
3
4
RESET
7
8
6
5 DI
DO
GND
ASAHI KASEI
[AK6480C/81]
DAS04E-00
2005/03
- 4 -
Pin Description
CS
(Chip Select)
When SK is high level and CS is changed from high level to low level, AK6480C/81C can
receive the instructions. CS should be kept low level while receiving op-code, address and
data and while outputting data. If CS is changed to high level during the above period,
AK6480C/81C stops the instruction execution. When SK is low and CS is changed from
high level to low level, AK6480C/81C will be in status output mode. The CS need not be low
level during the automatic write time-out period ( Busy status).
SK
(Serial Clock)
The SK clock pin is the synchronous clock input for input/output data. At write operation,
AK6480C/81C takes in the write data from data input pin (DI) synchronously with rising edge of
input pulse of serial clock pin ( SK ). And at read operation, AK6480C/81C takes out the read
data to data output pin (DO) synchronously with falling edge of SK . The SK clock is not
needed during the automatic write time-out period ( Busy status), the status output period and
when the device isn't selected ( CS = high level).
DI
(Data Input)
The op-code, address and write data is input to the DI pin.
DO
(Data Output)
The DO pin outputs the read data and status signal and will be high impedance except for this
timing.
RDY/ BUSY
(Ready/ Busy status)
This pin outputs the internal programming status. When the AK6480C/81C is in the automatic
write time-out period, this pin outputs the low level ( Busy status), and outputs the high level
except for this timing.
RESET
(Reset)
The AK6480C/81C stops executing the write instruction when the RESET pin is high level. The
RESET pin should be low level while the write instruction input period and the page write
instruction input period and the automatic write time-out period. If the RESET pin is high level
while the automatic write time-out period, the AK6480C/81C stops execution of internal
programming and the device returns to ready status. In this case the word data of the specified
address will be incomplete. When inputting the new instruction after RESET, the CS pin
should be set to high level. The read, write enable and write disable instructions are not affected
by RESET pin status.
VCC
(Power Supply)
GND
(Ground)
ASAHI KASEI
[AK6480C/81]
DAS04E-00
2005/03
- 5 -
Functional Description
The AK6480C/81C has 5 instructions such as READ, WRITE, Page Write, WREN (write enable)
and WRDS (write disable). Each instruction is organized by op-code block (8bits), address block
(8bits) and data (8bits x 2). When input level of SK pin is high level and input level of chip
select ( CS ) pin is changed from high level to low level, AK6480C/81C can receive the
instructions.
When the instructions are executed consecutively, the CS pin should be brought to high level for
a minimum of 250ns(tCS) between consecutive instruction cycle.
Instruction Set For AK6480C
Instruction Op-Code
Address
Data
WRITE
1 0 1 0 0 1 0 A8
A7 A6 A5 A4 A3 A2 A1 A0
D15 D0
Page Write
1 0 1 1 0 1 0 A8
A7 A6 A5 A4 A3 A2 A1 A0
D15 D0
READ
1 0 1 0 1 0 0 A8
A7 A6 A5 A4 A3 A2 A1 A0
D15 D0
WREN
1 0 1 0 0 0 1 1
X
X
X
X
X
X
X
X
WRDS
1 0 1 0 0 0 0 0
X
X
X
X
X
X
X
X
(WRAL)
1 0 1 0 1 1 1 1
X
X
X
X
X
X
X
X
D15 D0
X: don't care
Instruction Set For AK6481C
Instruction Op-Code
Address
Data
WRITE
1 0 1 0 0 1 0 A0
A1 A2 A3 A4 A5 A6 A7 A8
D0 D15
Page Write
1 0 1 1 0 1 0 A0
A1 A2 A3 A4 A5 A6 A7 A8
D0 D15
READ
1 0 1 0 1 0 0 A0
A1 A2 A3 A4 A5 A6 A7 A8
D0 D15
WREN
1 0 1 0 0 0 1 1
X
X
X
X
X
X
X
X
WRDS
1 0 1 0 0 0 0 0
X
X
X
X
X
X
X
X
(WRAL)
1 0 1 0 1 1 1 1
X
X
X
X
X
X
X
X
D0 D15
X: don't care
(Note) The WRAL instruction is used for factory function test only. User can't use this
instruction.
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