ASAHI KASEI

[AKD4101A-B]

2005/10

GENERAL DESCRIPTION

The AKD4101A-B is an evaluation board for the AK4101A, 192kHz DIT. The AKD4101A-B has the
interface with AKM's A/D converter evaluation boards and AKM's DIR evaluation boards. Therefore, it is
easy to evaluate the AK4101A. The AKD4101A-B also has the digital audio interface and can achieve the
interface with digital audio systems via optical link, BNC unbalance or XLR balance connector.

Ordering guide

AKD4101A-B --- Evaluation board for AK4101A

(A cable for connecting with printer port of IBM-AT compatible PC and a control
software are packed with this. The control software does not operate on Windows
NT.)

FUNCTION

Digital interface
Compatible with 2 types of interface

- Direct interface with AKM's ADC, DIR evaluation boards by 10pin header
- Optical/BNC/XLR output

Serial control data I/F

- 1 input/output port (10-pin port)

AK4101A

C,U,V

Serial Data in

(For DIT)

Control

GND

Opt

Figure 1. AKD4101A-B Block Diagram

*Circuit diagram and PCB layout are attached at the end of this manual.

AK4101A Evaluation Board Rev.0

AKD4101A-B

ASAHI KASEI

[AKD4101A-B]

2005/10

Evaluation Board Manual

Operating sequence

(1) Set up the power supply lines.

[+ 5V] (Red) = 5V
[GND] (Black) = 0V

(2)

Set up the evaluation mode and jumper pins. (Refer to the following section.)

(3)

Connect cables. (Refer to the following section.)

(4)

Power on.

The AK4101A should be reset once bringing PDN(SW2) "L" upon power-up.

Evaluation modes

(1) Evaluation for DIT

Serial Data in(10pin port) � AK4101A � S/PDIF out(optical, XLR or BNC)

S/PDIF

Optical, XLR or
BNC connector

PORT5

(10pin Header)

MCLK

BICK

LRCK

DAUX

AK4101A

(DIT)

AKD4101A-B

ADC

MCLK

BICK

LRCK

DAUX

MCLK, BICK, LRCK and DAUX are input via 10pin header (PORT5: DIT). The AKD4101A-B can be
connected with the AKM's ADC evaluation board via 10-line cable.

a. Set-up of a Bi-phase output signal

Connector JP19

(TXP)

Optical (PORT4)

OPT

XLR (J3)

XLR

BNC (J4)

BNC

Table 1. Set-up of TXP

a-1. Set-up of TXP/TXN

JP21 (TXP) Sub

JP22 (TXN) Sub

TXP1/TXN1

4-5 pin (short)

TXP2/TXN2

3-6 pin (short)

TXP3/TXN3

2-7 pin (short)

TXP4/TXN4

1-8 pin (short)

Table 2. Set-up of TXP/TXN

ASAHI KASEI

[AKD4101A-B]

2005/10

b. Set-up of clock input and output

The used signals are MCLK, LRCK, BICK and SDTI (DAUX).
The signal level outputted and inputted from PORT5 is 5V.

Clock PORT

MCLK PORT5

BICK PORT5

LRCK PORT5

SDTI

(DAUX)

PORT5

Table 3. Clock input/output

CKS1 pin

(SW3_5)

CKS0 pin

(Sub_JP20)

CKS1 bit

CKS0 bit

MCLK fs

(max)

0 0

128fs

28k-192

kHz

Default

0 1

256fs

28k-108

kHz

1 0

384fs

28k-54

kHz

1 1

512fs

28k-54

kHz

Table 4. Master Clock Frequency Select

b-1. Set-up of input/output of BICK and LRCK

Please set up SW 3_8 (DIT_I/O) according to the setup of audio format of AK4101A (Refer to Table 6).

Audio format

SW3_8 (DIT_I/O)

Slave mode

Default

Master mode

Table 5. Set-up of DIT_I/O

Set-up of audio data format

It sets up by SW 1_2, SW 1_3 and SW1_4 in synchronous mode. Please set up DIF2-0 bit in asynchronous
mode.

DIF2 pin
(SW1_4)

DIF1 pin
(SW1_3)

DIF0 pin
(SW1_2)

LRCK BICK

Mode

DIF2 bit

DIF1 bit

DIF0 bit

SDTI

I/O

0 0 0 0 16bit,

Right

justified

H/L

64fs

1 0 0 1 18bit,

Right

justified

H/L

64fs

20bit, Right justified

H/L

64fs

3 0 1 1 24bit,

Right

justified

H/L

64fs

24bit, Left justified

H/L

64fs

Default

5 1 0 1

24bit,

S L/H

64fs

24bit, Left justified

H/L

64-128fs

7 1 1 1

24bit,

L/H O 64-128fs O

Table 6. Audio format

ASAHI KASEI

[AKD4101A-B]

2005/10

B, C, U, V Inputs (synchronous mode)

At synchronous mode (ANS=1), C(channel status), U(user data) and V(validity) are input via 10pin header
(PORT3: BCUV). BLS is output at normal mode (TRANS=0), and is input at audio routing mode (TRANS=1). In
case of audio routing mode, BLS, C, U an V can be directly input from the AKD4114 via 10-line flat cable. The pin
layout of PORT3 is shown in

Figure 2

PORT3

BCUV

Figure 2. PORT3 pin layout

Serial control

The AK4101A can be controlled by pins at synchronous mode (ANS=1) and by internal register at asynchronous
mode (ANS=0). Synchronous/Asynchronous mode is set as

Table 7

Mode

SW1-6 (ANS)

JP18 (SDA/CDTO)

Sub_JP20 (ANS)

Synchronous ON

FS3=1: Short "CDTO/CM0=H" side.
FS3=0: Short "CM0=L" side.

Open.

Asynchronous

OFF

Short "CDTO/CM0=H" side.

Short.

Default

Table 7. Synchronous/Asynchronous mode

At asynchronous mode (ANS=0), the AK4101A can be controlled via printer port (parallel port) of IBM-AT
compatible PC. Connect PORT6 (uP-I/F) with PC by 10-line flat cable packed with the AKD4101A-B. Take care of
the direction of connector. There is a mark at pin#1. The pin layout of PORT6 is shown in Figure 3.

PORT6

uP I/F

L
K

Figure 3. PORT6 pin layout

Control software is packed with the AKD4101A-B. The software manual is included in this eva-board manual.

ASAHI KASEI

[AKD4101A-B]

2005/10

Toggle switch set-up

SW2

PDN

Reset switch for AK4101A. Set to "H" during normal operation. Bring to "L" once after
the power is supplied.

DIP switch (SW1) set-up: -off- means "L"

No.

Switch Name

Function

Default

1 IPS0

Don't care

OFF

DIF0

Set-up of DIF0 pin. (synchronous mode)

OFF

DIF1

Set-up of DIF1 pin. (synchronous mode)

OFF

DIF2

Set-up of DIF2 pin. (synchronous mode)

5 IPS1/IIC

Don't care

OFF

6 ANS

Set-up of ANS pin.
"OFF": a

synchronous mode, "ON": synchronous mode

OFF

7 TEST

Don't

care

OFF

8 ACKS

Don't

care

OFF

DIP switch (SW3) set-up: -off- means "L"

No.

Switch Name

Function

Default

1 FS1

OFF

2 FS2

OFF

3 FS0

Sampling frequency select at synchronous mode (ANS=1).
(See the datasheet.)

OFF

4 PSEL

Don't

care

OFF

CKS1

Set-up of CKS1 pin. (synchronous mode)

OFF

TRANS

Set-up of TRANS pin.
"OFF": normal mode, "ON": audio routing mode

OFF

DIR_I/O

Don't care

OFF

8 DIT_I/O

Set-up of the transmission direction of 74AC245
"OFF": When inputting from PORT5, "ON": When outputting from
PORT5

OFF

Электронный компонент: AKD4101A-B