GENERAL DESCRIPTION
The ALD1701 is a monolithic CMOS micropower high slew rate operational
amplifier intended for a broad range of analog applications using
1V to
6V dual power supply systems, as well as +2V to +12V battery operated
systems. All device characteristics are specified for +5V single supply or
2.5V dual supply systems. Supply current is 250
A maximum at 5V
supply voltage. It is manufactured with Advanced Linear Devices' en-
hanced ACMOS silicon gate CMOS process.
The ALD1701 is designed to offer a trade-off of performance parameters
providing a wide range of desired specifications. It offers the popular
industry standard pin configuration of
A741 and ICL7611 types.
The ALD1701 has been developed specifically for the +5V single supply or
1V to
6V dual supply user. Several important characteristics of the
device make application easier to implement at those voltages.
First, the operational amplifier can operate with rail to rail input and output
voltages. This means the signal input voltage and output voltage can be
equal to the positive and negative supply voltages. This feature allows
numerous analog serial stages and flexibility in input signal bias levels.
Secondly, the device was designed to accommodate mixed applications
where digital and analog circuits may operate off the same power supply
or battery. Thirdly, the output stage can typically drive up to 50pF capacitive
and 10K
resistive loads.
These features, combined with extremely low input currents, high open
loop voltage gain of 100V/mV, useful bandwidth of 700KHz, a slew rate of
0.7V/
s, low power dissipation of 0.5mW, low offset voltage and tempera-
ture drift, make the ALD1701 a versatile, micropower operational amplifier.
The ALD1701, designed and fabricated with silicon gate CMOS techno-
logy, offers 1pA typical input bias current. On chip offset voltage trimming
allows the device to be used without nulling in most applications.
FEATURES
All parameters specified for +5V single
supply or
2.5V dual supply systems
Rail to rail input and output voltage ranges
No frequency compensation required --
unity gain stable
Extremely low input bias currents --
1.0pA typical (30pA max.)
Ideal for high source impedance
applications
Dual power supply
1.0V to
6.0V operation
Single power supply +2V to +12V operation
High voltage gain -- typically 100V/mV
@
2.5V(100dB)
Drive as low as 10K
load
Output short circuit protected
Unity gain bandwidth of 0.7MHz
Slew rate of 0.7V/
s
Low power dissipation
MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
ALD1701A/ALD1701B
ALD1701/ALD1701G
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
APPLICATIONS
Voltage amplifier
Voltage follower/buffer
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
* N/C Pin is internally connected. Do not connect externally.
1
2
2
3
4
8
7
6
5
TOP VIEW
DA, PA, SA PACKAGE
N/C
-IN
+IN
N/C
OUT
N/C
V-
V+
Operating Temperature Range
-55
C to +125
C
0
C to +70
C
0
C to +70
C
8-Pin
8-Pin
8-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD1701A DA
ALD1701A SA
ALD1701A PA
ALD1701B DA
ALD1701B SA
ALD1701B PA
ALD1701 DA
ALD1701 SA
ALD1701 PA
ALD1701G DA
ALD1701G SA
ALD1701G PA
* Contact factory for industrial temperature range
ORDERING INFORMATION
1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ALD1701A/ALD1701B
Advanced Linear Devices
2
ALD1701/ALD1701G
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
+
13.2V
Differential input voltage range
-0.3V to V
+
+0.3V
Power dissipation
600 mW
Operating temperature range
PA, SA package
0
C to +70
C
DA package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
Supply
V
S
1.0
6.0
1.0
6.0
1.0
6.0
1.0
6.0 Dual Supply
Voltage
V+
2.0
12.0
2.0
12.0
2.0
12.0
2.0
12.0
V
Single Supply
Input Offset
V
OS
0.9
2.0
4.5
10.0
mV
R
S
100K
Voltage
1.7
2.8
5.3
11.0
mV
0
C
T
A
+70
C
Input Offset
I
OS
1.0
25
1.0
25
1.0
25
1.0
30
pA
T
A
= 25
C
Current
240
240
240
450
pA
0
C
T
A
+70
C
Input Bias
I
B
1.0
30
1.0
30
1.0
30
1.0
50
pA
T
A
= 25
C
Current
300
300
300
600
pA
0
C
T
A
+70
C
Input Voltage
V
IR
-0.3
5.3
-0.3
5.3
-0.3
5.3
-0.3
5.3
V
V
+
= +5V
Range
-2.8
2.8
-2.8
2.8
-2.8
2.8
-2.8
2.8
V
V
S
=
2.5V
Input
R
IN
10
12
10
12
10
12
10
12
Resistance
Input Offset
TCV
OS
7
7
7
7
V/
C
R
S
100K
Voltage Drift
Power Supply
PSRR
70
80
65
80
65
80
60
80
dB
R
S
100K
Rejection Ratio
70
80
65
80
65
80
60
80
dB
0
C
T
A
+70
C
Common Mode
CMRR
70
83
65
83
65
83
60
83
dB
R
S
100K
Rejection Ratio
70
83
65
83
65
83
60
83
dB
0
C
T
A
+70
C
Large Signal
A
V
40
100
32
100
32
100
20
80
V/ mV
R
L
= 100K
Voltage Gain
1000
1000
1000
1000
V/ mV
R
L
1M
20
20
20
10
V/ mV
R
L
= 100K
0
C
T
A
+70
C
Output
VO low
0.001 0.01
0.001 0.01
0.001 0.01
0.001 0.01
V
RL =1M
V+ = +5V
Voltage
VO high 4.99 4.999
4.99
4.999
4.99 4.999
4.99 4.999
V
0
C
TA
+70
C
Range
VO low
-2.48 -2.40
-2.48 -2.40
-2.48 -2.40
-2.48 -2.40
V
RL =100K
VO high 2.40
2.48
2.40 2.48
2.40
2.48 2.40 2.48
V
0
C
TA
+70
C
Output Short
I
SC
1
1
1
1
mA
Circuit Current
Supply Current
I
S
120 250
120 250
120 250
120
300
A
V
IN
= 0V
No Load
Power
P
D
1.25
1.25
1.25
1.50
mW
V
S
=
2.5V
Dissipation
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1701A
1701B
1701
1701G
Test
Parameter
Symbol Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
ALD1701A/ALD1701B
Advanced Linear Devices
3
ALD1701/ALD1701G
1701B DA
1701 DA
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
V
S
=
2.5V -55
C
T
A
+125
C unless otherwise specified
Input Offset
V
OS
3.0
6.5
mV
R
S
100K
Voltage
Input Offset
I
OS
8.0
8.0
nA
Current
Input Bias
I
B
10.0
10.0
nA
Current
Power Supply
PSRR
60
75
60
75
dB
R
S
100K
Rejection Ratio
Common Mode
CMRR
60
83
60
83
dB
R
S
100K
Rejection Ratio
Large Signal
A
V
15
50
15
50
V/ mV
R
L
= 100K
Voltage Gain
Output Voltage
V
O
low
-2.47
-2.40
-2.47 -2.40 V
Range
V
O
high
2.35
2.45
2.35
2.45
V
R
L
= 100K
Input
C
IN
1
1
1
1
pF
Capacitance
Bandwidth
B
W
400
700
400
700
400
700
700
KHz
Slew Rate
S
R
0.33 0.7
0.33
0.7
0.33
0.7
0.7
V/
s
A
V
= +1
R
L
= 100K
Rise time
t
r
0.2
0.2
0.2
0.2
s
R
L
= 100K
Overshoot
20
20
20
20
%
R
L
=100K
Factor
C
L
= 50pF
Settling Time
t
s
10.0
10.0
10.0
10.0
s
0.1%
A
V
= -1R
L
=100K
C
L
= 50pF
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1701A
1701B
1701
1701G
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
Power Supply
PSRR
83
83
83
83
dB
R
S
100K
Rejection Ratio
Common Mode
CMRR
83
83
83
83
dB
R
S
100K
Rejection Ratio
Large Signal
A
V
250
250
250
250
V/mV
R
L
=100K
Voltage Gain
Output Voltage
V
O
low
-4.98
-4.90
-4.98 -4.90
-4.98 -4.90
-4.98 -4.90
V
R
L
=100K
Range
V
O
high
4.90
4.98
4.90
4.98
4.90 4.98
4.90
4.98
V
Bandwidth
B
W
1.0
1.0
1.0
1.0
MHz
Slew Rate
S
R
1.0
1.0
1.0
1.0
V/
s
A
V
= +1
C
L
= 50pF
T
A
= 25
C V
S
=
5.0V unless otherwise specified
1701A
1701B
1701
1701G
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
ALD1701A/ALD1701B
Advanced Linear Devices
4
ALD1701/ALD1701G
Design & Operating Notes:
1. The ALD1701 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS opera-
tional amplifier. The ALD1701 is internally compensated for unity
gain stability using a novel scheme that does not use a nulling
resistor. This scheme produces a clean single pole roll off in the gain
characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency.
2. The ALD1701 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail to rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain compa-
tibility with other operational amplifiers, this switching point has been
selected to be about 1.5V below the positive supply voltage. Since
offset voltage trimming on the ALD1701 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excur-
sions above this switching point. The user should however, be
aware that this switching does take place if the operational amplifier
is connected as a unity gain buffer, and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
12
would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing
is limited by the drain to source on-resistance of the output transis-
tors as determined by the bias circuitry, and the value of the load
resistor. When connected in the voltage follower configuration, the
oscillation resistant feature, combined with the rail to rail input and
output feature, makes an effective analog signal buffer for medium
to high source impedance sensors, transducers, and other circuit
networks.
5. The ALD1701 operational amplifier has been designed to provide full
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with any input voltages applied, and
to limit input voltages not to exceed 0.3V of the power supply voltage
levels.
6. The ALD1701, with its micropower operation, offers numerous
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall reli-
ability due to lower self heating, and lower input bias current. It
requires practically no warm up time as the chip junction heats up to
only 0.1
C above ambient temperature under most operating condi-
tions.
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (
C)
1000
100
10
0.1
1.0
INPUT BIAS CURRENT (pA)
100
-25
0
75
125
50
25
-50
10000
V
S
=
2.5V
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
COMMON MODE INPUT
VOLTAGE RANGE (V)
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
T
A
= 25
C
SUPPLY CURRENT (
A)
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
500
400
200
300
0
100
0
1
2
3
4
5
6
T
A
= -55
C
-25
C
+25
C
+70
C
+125
C
INPUTS GROUNDED
OUTPUT UNLOADED
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
10M
LOAD RESISTANCE (
)
10K
100K
1M
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
V
S
=
2.5V
T
A
= 25
C
ALD1701A/ALD1701B
Advanced Linear Devices
5
ALD1701/ALD1701G
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
0
1
2
3
4
7
6
5
6
5
4
3
2
1
OUTPUT VOLTAGE SWING (V)
25
C
T
A
+125
C
R
L
= 100K
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
COMMON MODE INPUT VOLTAGE (V)
-2
-1
0
+1
+3
+2
15
10
5
-5
-10
0
-15
INPUT OFFSET VOLTAGE (mV)
V
S
=
2.5V
T
A
= 25
C
LARGE - SIGNAL TRANSIENT
RESPONSE
2V/div
500mV/div
5
s/div
V
S
=
1.0V
T
A
= 25
C
R
L
= 100K
C
L
= 50pF
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
2V/div
5
s/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 100K
C
L
= 50pF
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
SUPPLY VOLTAGE (V)
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
0
2
4
6
8
55
C
T
A
+125
C
R
L
= 100K
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
AMBIENT TEMPERATURE (
C)
INPUT OFFSET VOLTAGE (mV)
-50
-25
0
+25
+50
+75
+100 +125
+4
+5
+3
+1
+2
0
-2
-1
-4
-3
-5
V
S
=
2.5V
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF FREQUENCY
FREQUENCY (Hz)
1
10
100
1K
10K
1M
10M
100K
120
100
80
60
40
20
0
-20
OPEN LOOP VOLTAGE
GAIN (dB)
90
0
45
180
135
PHASE SHIFT IN DEGREES
V
S
=
2.5V
T
A
= 25
C
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
20mV/div
2
s/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 100K
C
L
= 50pF
PDF 
ZIP