GENERAL DESCRIPTION
The ALD1706 is a monolithic CMOS ultra micropower high slew-rate, high
performance operational amplifier intended for a broad range of analog
applications using
1V to
6V dual power supply systems, as well as +2V
to +12V battery operated systems. All device characteristics are specified
for +5V single supply or
2.5V dual supply systems. Supply current is 40
A
maximum at 5V supply voltage. It is manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process.
The ALD1706 is designed to offer high performance for a wide range of
applications requiring very low power dissipation. It offers the popular
industry standard single operational amplifier pin configuration.
The ALD1706 has been developed specifically for the +5V single battery
or
1V to
6V dual battery user. Several important characteristics of the
device make application easier to implement at those voltages. First, the
operational amplifier can operate with rail to rail input and output voltages.
This means the signal input voltage and output voltage can be close to or
equal to the positive and negative supply voltages. This feature allows
numerous analog serial stages and flexibility in input signal bias levels.
Secondly, the device was designed to accommodate mixed applications
where digital and analog circuits may operate off the same power supply
or battery. Thirdly, the output stage can typically drive up to 25pF capacitive
and 20K
resistive loads. These features, combined with extremely low
input currents, high open loop voltage gain of 100V/mV, useful bandwidth
of 400KHz, a slew rate of 0.17V/
s, low offset voltage and temperature drift,
make the ALD1706 a versatile, micropower operational amplifier.
The ALD1706, designed and fabricated with silicon gate CMOS techno-
logy, offers 0.1 pA typical input bias current. On chip offset voltage trimming
allows the device to be used without nulling in most applications.
FEATURES
20
A supply current
All parameters specified for +5V single
supply or
2.5V dual supply systems
Rail to rail input and output voltage ranges
No frequency compensation required --
unity gain stable
Extremely low input bias currents -- 0.1pA
typical (30pA max.)
Ideal for high source impedance applications
Dual power supply
1.0V to
6.0V operation
Single power supply +2V to +12V operation
High voltage gain typically 100V/mV
@
2.5V (100dB)
Drive as low as a 20K
load
Output short circuit protected
Unity gain bandwidth of 0.4MHz
Slew rate of 0.17V/
s
ALD1706A/ALD1706B
ALD1706/ALD1706G
ULTRA MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
APPLICATIONS
Voltage amplifier
Voltage follower/buffer
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable
instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
* N/C Pin is connected internally. Do not connect externally.
1
2
3
4
8
7
6
5
TOP VIEW
DA, PA, SA PACKAGE
N/C
-IN
+IN
N/C
OUT
N/C
V+
V-
ORDERING INFORMATION
Operating Temperature Range
-55
C to +125
C
0
C to +70
C
0
C to +70
C
8-Pin
8-Pin
8-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD1706A DA
ALD1706A SA
ALD1706A PA
ALD1706B DA
ALD1706B SA
ALD1706B PA
ALD1706 DA
ALD1706 SA
ALD1706 PA
ALD1706G PA
* Contact factory for industrial temperature range
1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ALD1706A/ALD1706B
Advanced Linear Devices
2
ALD1706/ALD1706G
Supply
V
S
1.0
6.0
1.0
6.0
1.0
6.0
1.0
6.0
V
Dual Supply
Voltage
V
+
2.0
12.0
2.0
12.0
2.0
12.0
2.0
12.0
V
Single Supply
Input Offset
V
OS
0.9
2.0
4.5
10.0
mV
R
S
100K
Voltage
1.7
2.8
5.3
11.0
mV
0
C
T
A
+70
C
Input Offset
I
OS
0.1
25
0.1
25
0.1
25
0.1
30
pA
T
A
= 25
C
Current
240
240
240
450
pA
0
C
T
A
+70
C
Input Bias
I
B
0.1
30
0.1
30
0.1
30
0.1
50
pA
T
A
= 25
C
Current
300
300
300
600
pA
0
C
T
A
+70
C
Input Voltage
V
IR
-0.3
5.3
-0.3
5.3
-0.3
5.3
-0.3
5.3
V
V
+
= +5V
Range
-2.8
2.8
-2.8
2.8
-2.8
2.8
-2.8
2.8
V
V
S
=
2.5V
Input
Resistance
R
IN
10
12
10
12
10
12
10
12
Input Offset
Voltage Drift
TCV
OS
7
7
7
10
V/
C
R
S
100K
Power Supply
PSRR
70
80
65
80
65
80
60
80
dB
R
S
100K
Rejection Ratio
70
80
65
80
65
80
60
80
dB
0
C
T
A
+70
C
Common Mode
CMRR
70
83
65
83
65
83
60
83
dB
R
S
100K
Rejection Ratio
70
83
65
83
65
83
60
83
dB
0
C
T
A
+70
C
Large Signal
A
V
32
100
32
100
32
100
20
80
V/ mV
R
L
= 1M
Voltage Gain
20
20
20
10
V/ mV
R
L
= 1M
0
C
T
A
+70
C
Output
V
O
low
0.001 0.01
0.001 0.01
0.001
0.01
0.001 0.01
V
RL =1M
Voltage
V
O
high 4.99 4.999
4.99
4.999
4.99 4.999
4.99 4.999
V
0
C
T
A
+70
C
Range
V
O
low
-2.40 -2.30
-2.40 -2.30
-2.40 -2.30
-2.40 -2.30
V
R
L
=100K
V
O
high 2.30 2.40
2.30
2.40
2.30
2.40
2.30
2.40
V
0
C
T
A
+70
C
Output Short
Circuit Current
I
SC
200
200
200
200
A
Supply Current
I
S
20 40
20
40
20
40
20
50
A
V
IN
= 0V
No Load
Power
Dissipation
P
D
200
200
200
250
W
V
S
=
2.5V
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
+
13.2V
Differential input voltage range
-0.3V to V
+
+0.3V
Power dissipation
600 mW
Operating temperature range
PA, SA package
0
C to +70
C
DA package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1706A
1706B
1706
1706G
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
ALD1706A/ALD1706B
Advanced Linear Devices
3
ALD1706/ALD1706G
Input Offset
Voltage
V
OS
3.0
6.5
mV
R
S
100K
Input Offset
Current
I
OS
8.0
8.0
nA
Input Bias
Current
I
B
10.0
10.0
nA
Power Supply
Rejection Ratio
PSRR
60
75
60
75
dB
R
S
1M
Common Mode
Rejection Ratio
CMRR
60
83
60
83
dB
R
S
1M
Large Signal
Voltage Gain
A
V
15
50
15
50
V/ mV
R
L
= 1M
Output Voltage
V
O
low
-2.40
-2.30
-2.40 -2.30
V
Range
V
O
high
2.30
2.40
2.30
2.40
V
R
L
= 1M
1706B DA
1706 DA
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Conditions
V
S
=
2.5V -55
C
T
A
+125
C unless otherwise specified
Power Supply
Rejectio Ratio
PSRR
70
70
70
70
dB
R
S
1M
Common Mode
Rejection Ratio
CMRR
70
70
70
70
dB
R
S
1M
Large Signal
Voltage Gain
A
V
50
50
50
50
V/ mV
R
L
=1M
Output
Voltage
V
O
low
-0.95
-0.9
-0.95 -0.9
-0.95
-0.9
-0.95
-0.9
V
R
L
=1M
Range
V
O
high
0.9
0.95
0.9 0.95
0.9 0.95
0.9
0.95
V
Bandwidth
B
W
0.3
0.3
0.3
0.3
MHz
Slew Rate
S
R
0.17
0.17
0.17
0.17
V/
s
A
V
= +1
C
L
= 25pF
T
A
= 25
C V
S
=
1.0V unless otherwise specified
1706A
1706B
1706
1706G
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Condition
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1706A
1706B
1706
1706G
Test
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Condition
Input
Capacitance
C
IN
1
1
1
1
pF
Bandwidth
B
W
400
400
400
400
KHz
Slew Rate
S
R
0.17
0.17
0.17
0.17
V/
s
A
V
= +1
R
L
= 1M
Rise time
t
r
1.0
1.0
1.0
1.0
s
R
L
= 1M
Overshoot
20
20
20
20
%
R
L
=1M
Factor
C
L
= 25pF
Settling Time
t
s
10.0
10.0
10.0
10.0
s
0.1%
A
V
= -1 R
L
=1M
C
L
=25pF
ALD1706A/ALD1706B
Advanced Linear Devices
4
ALD1706/ALD1706G
Design & Operating Notes:
1. The ALD1706 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme
to achieve large voltage gain, high output driving capability, and
better frequency stability. In a conventional CMOS operational
amplifier design, compensation is achieved with a pole splitting
capacitor together with a nulling resistor. This method is, however,
very bias dependent and thus cannot accommodate the large
range of supply voltage operation as is required from a stand
alone CMOS operational amplifier. The ALD1706 is internally
compensated for unity gain stability using a novel scheme that
does not use a nulling resistor. This scheme produces a clean
single pole roll off in the gain characteristics while providing for
more than 70 degrees of phase margin at the unity gain frequency.
2. The ALD1706 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail-to-rail
input common mode voltage range. This means that with the
ranges of common mode input voltage close to the power supplies,
one of the two differential stages is switched off internally. To
maintain compatibility with other operational amplifiers, this
switching point has been selected to be about 1.5V below the
positive supply voltage. Since offset voltage trimming on the
ALD1706 is made when the input voltage is symmetrical to the
supply voltages, this internal switching does not affect a large
variety of applications such as an inverting amplifier or non-
inverting amplifier with a gain larger than 2.5 (5V operation),
where the common mode voltage does not make excursions
above this switching point. The user should however, be aware
that this switching does take place if the operational amplifier is
connected as a unity gain buffer and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than
1pA at room temperature. This low input bias current assures that
the analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
12
would not be a problem as the source impedance
would limit the node impedance. However, for applications where
source impedance is very high, it may be necessary to limit noise
and hum pickup through proper shielding.
4. The output stage consists of class AB complementary output
drivers, capable of driving a low resistance load. The output
voltage swing is limited by the drain to source on-resistance of the
output transistors as determined by the bias circuitry, and the
value of the load resistor. When connected in the voltage follower
configuration, the oscillation resistant feature, combined with the
rail to rail input and output feature, makes an effective analog
signal buffer for medium to high source impedance sensors,
transducers, and other circuit networks.
5. The ALD1706 operational amplifier has been designed to provide
full static discharge protection. Internally, the design has been
carefully implemented to minimize latch up. However, care must
be exercised when handling the device to avoid strong static fields
that may degrade a diode junction, causing increased input
leakage currents. In using the operational amplifier, the user is
advised to power up the circuit before, or simultaneously with, any
input voltages applied and to limit input voltages to not exceed
0.3V of the power supply voltage levels.
6. The ALD1706, with its micropower operation, offers numerous
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall
reliability due to lower self heating, and lower input bias current.
It requires practically no warm up time as the chip junction heats
less than 0.1
C above ambient temperature under most operating
conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (
C)
1000
100
10
0.1
1.0
INPUT BIAS CURRENT (pA)
100
-25
0
75
125
50
25
-50
10000
V
S
=
2.5V
OPEN LOOP VOLTAGE GAIN AS AFUNCTION
OF LOAD RESISTANCE
10M
LOAD RESISTANCE (
)
10K
100K
1M
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
V
S
=
2.5V
T
A
= 25
C
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
100
80
40
60
0
20
SUPPLY CURRENT (
A)
0
1
2
3
4
5
6
T
A
= -55
C
-25
C +25
C
+70
C
+125
C
INPUTS GROUNDED
OUTPUT UNLOADED
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
COMMON MODE INPUT
VOLTAGE RANGE (V)
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
T
A
= 25
C
ALD1706A/ALD1706B
Advanced Linear Devices
5
ALD1706/ALD1706G
TYPICAL PERFORMANCE CHARACTERISTICS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
SUPPLY VOLTAGE (V)
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
0
2
4
6
8
55
C
T
A
+125
C
R
L
= 100K
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
0
1
2
3
4
7
6
5
6
5
4
3
2
1
OUTPUT VOLTAGE SWING (V)
25
C
T
A
+125
C
R
L
= 100K
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
AMBIENT TEMPERATURE (
C)
INPUT OFFSET VOLTAGE (mV)
-50
-25
0
+25
+50
+75
+100 +125
+4
+5
+3
+1
+2
0
-2
-1
-4
-3
-5
V
S
=
2.5V
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
COMMON MODE INPUT VOLTAGE (V)
-2
-1
0
+1
+3
+2
15
10
5
-5
-10
0
-15
INPUT OFFSET VOLTAGE (mV)
V
S
=
2.5V
T
A
= 25
C
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
50mV/div
10
s/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 100K
C
L
= 25pF
LARGE - SIGNAL TRANSIENT
RESPONSE
V
S
=
1.0V
T
A
= 25
C
R
L
= 100K
C
L
= 25pF
2V/div
500mV/div
10
s/div
LARGE - SIGNAL TRANSIENT
RESPONSE
2V/div
10
s/div
5V/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 100K
C
L
= 25pF
OPEN LOOP VOLTAGE GAIN AS
A FUNCTION OF FREQUENCY
FREQUENCY (Hz)
1
10
100
1K
10K
1M
10M
100K
120
100
80
60
40
20
0
-20
OPEN LOOP VOLTAGE
GAIN (dB)
V
S
=
2.5V
T
A
= 25
C
90
0
45
180
135
PHASE SHIFT IN DEGREES
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