* N/C Pin is connected internally. Do not connect externally.
GENERAL DESCRIPTION
The ALD1712 is a monolithic precision operational amplifier intended
primarily for a wide range of analog applications in +5V single power supply
and
5V dual power supply systems as well as +6V to 12V battery operated
systems. All device characteristics are specified for +5V single supply or
2.5V dual supply systems. It is manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process and is available as
a standard cell in ALD's ASIC "Function-Specific" library.
The device has an input stage that operates to +300mV above and -300mV
below the supply voltages with no adverse effects and/or phase reversals.
The ALD1712 has been developed specifically with the 5V single supply or
2.5V dual supply user in mind. Several important characteristics of the
device make many applications easy to implement for these supply
voltages. First, the operational amplifier can operate with rail-to-rail input
and output voltages. This feature allows numerous analog serial stages to
be implemented without losing operating voltage margin. Secondly, the
device was designed to accommodate mixed applications where digital
and analog circuits may work off the same 5V power supply. Thirdly, the
output stage can drive up to 400pF capacitive, and 1K
resistive loads in
non-inverting unity gain connection, and up to 4000pF at a gain of 5. These
features, coupled with extremely low input currents, high voltage gain,
useful bandwidth of 1.5MHz, slew rate of 2.1V/
s, low power dissipation,
low offset voltage and temperature drift, make the ALD1712 a truly
versatile, user friendly, operational amplifier.
On-chip offset voltage trimming allows the device to be used without nulling
in most applications. The device offers typical offset drift of less than 5
V/
C which eliminates many trim or temperature compensation circuits. For
precision applications, the 1712 is designed to settle to 0.01% in 8
s. The
unique characteristics at input and output are modeled in an available
macromodel.
FEATURES
Linear mode operation with input voltages
300mV beyond supply rails
Symmetrical complementary output drive
Output voltages to within 2mV of power
supply rails
High load capacitance capability --
4000pF typical
No frequency compensation required --
unity gain stable
Extremely low input bias currents --
0.01pA typical
Dual power supply
2.5V to
6.0V
Single power supply +5V to +12V
High voltage gain typically 85V/mV
@
2.5V and 250V/mV @
5.0V
Drive as low as 1K
load with 5mA
drive current
Output short circuit protected
Unity gain bandwidth of 1.5MHz
Slew rate of 2.1V/
s
APPLICATIONS
Voltage amplifier
Voltage follower/buffer
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
Coaxial cable driver
PIN CONFIGURATION
RAIL-TO-RAIL PRECISION OPERATIONAL AMPLIFIER
ALD1712A/ALD1712B
ALD1712
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
1
2
2
3
4
8
7
6
5
TOP VIEW
DA, PA, SA PACKAGE
N/C
-IN
+IN
N/C
OUT
N/C
V-
V
S
ORDERING INFORMATION
Operating Temperature Range
-55
C to +125
C
0
C to +70
C
0
C to +70
C
8-Pin
8-Pin
8-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD 1712A DA
ALD 1712 ASA
ALD 1712A PA
ALD 1712B DA
ALD 1712 BSA
ALD 1712B PA
ALD 1712 DA
ALD 1712 SA
ALD 1712 PA
* Contact factory for industrial temperature range
1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ALD1712A/ALD1712B
Advanced Linear Devices
2
ALD1712
Supply
V
S
2.0
6.0
2.0
6.0
2.0
6.0
Voltage
V
+
4.0
12.0
4.0
12.0
4.0
12.0
V
Single Supply
Input Offset
V
OS
0.05
0.15
0.1
0.25
0.25
0.5
mV
R
S
100K
Voltage
0.35
0.55
1.0
mV
0
C
T
A
+70
C
Input Offset
I
OS
0.01
10
0.01
10
0.01
10
pA
T
A
= 25
C
Current
280
280
280
pA
0
C
T
A
+70
C
Input Bias
I
B
0.01
10
0.01
10
0.01
10
pA
T
A
= 25
C
Current
280
280
280
pA
0
C
T
A
+70
C
Input Voltage
V
IR
-0.3
5.3
-0.3
5.3
-0.3
5.3
V
V
+
= +5; notes 2,5
Range
-2.8
+2.8
-2.8
+2.8
-2.8
+2.8
V
V
S
=
2.5V
Input
R
IN
10
13
10
13
10
13
Resistance
Input Offset
TCV
OS
5
5
5
V/
C
R
S
100K
Voltage Drift
Power Supply
PSRR
65
85
65
85
63
85
dB
R
S
100K
Rejection Ratio
65
85
65
85
63
85
dB
0
C
T
A
+70
C
Common Mode
CMRR
65
83
65
83
63
83
dB
R
S
100K
Rejection Ratio
65
83
65
83
63
83
dB
0
C
T
A
+70
C
Large Signal
A
V
50
85
50
85
50
85
V/mV
R
L
= 10K
Voltage Gain
400
400
400
V/mV
R
L
1M
20
20
20
V/mV
R
L
= 10K
0
C
T
A
+70
C
Output
V
O
low
0.002
0.01
0.002
0.01
0.002
0.01
V
R
L
= 1M
V
+
= +5V
Voltage
V
O
high
4.99
4.998
4.99 4.998
4.99 4.998
V
0
C
T
A
+70
C
Range
V
O
low
-2.44 -2.35
-2.44 -2.35
-2.44 -2.35
V
R
L
= 10K
V
O
high
2.35
2.44
2.35
2.44
2.35
2.44
V
0
C
T
A
+70
C
Output Short
I
SC
8
8
8
mA
Circuit Current
Supply
I
S
0.8
1.5
0.8
1.5
0.8
1.5
mA
V
IN
= 0V
Current
No Load
Power
P
D
4.0
7.5
4.0
7.5
4.0
7.5
mW
V
S
=
2.5V
Dissipation
Input
C
IN
1
1
1
pF
Capacitance
Bandwidth
B
W
1.0
1.5
1.0
1.5
1.0
1.5
MHz
Slew Rate
S
R
1.4
2.1
1.4
2.1
1.4
2.1
V/
s
A
V
= +1
R
L
= 10K
Rise time
t
r
0.2
0.2
0.2
s
R
L
= 10K
Overshoot
10
10
10
%
R
L
= 10K
Factor
C
L
= 100pF
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1712A 1712B 1712
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
13.2V
Differential input voltage range
-0.3V to V+
+0.3V
Power dissipation
600 mW
Operating temperature range
PA,SA package
0
C to +70
C
DA package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
ALD1712A/ALD1712B
Advanced Linear Devices
3
ALD1712
Maximum Load
C
L
400
400
400
pF
Gain = 1
Capacitance
4000
4000
4000
pF
Gain = 5
Input Noise
Voltage
e
n
26
26
26
nV/
Hz f =1KHz
Input Current
Noise
i
n
0.6
0.6
0.6
fA/
Hz
f =10Hz
Settling
t
s
8.0
8.0
8.0
s
0.01%
Time
3.0
3.0
3.0
s
0.1% A
V
= -1
R
L
= 5K
C
L
= 50pF
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
C V
S
=
2.5V unless otherwise specified
1712A
1712B
1712
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
V
S
=
2.5V -55
C
T
A
+125
C unless otherwise specified
1712A DA
1712B DA
1712 DA
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Input Offset
V
OS
0.5
1.0
0.8
1.5
1.2
2.5
mV
R
S
100K
Voltage
Input Offset
I
OS
4.0
4.0
4.0
nA
Current
Input Bias
I
B
4.0
4.0
4.0
nA
Current
Power Supply
PSRR
60
83
60
83
60
83
dB
R
S
100K
Rejection Ratio
Common Mode
CMRR
60
83
60
83
60
83
dB
R
S
100K
Rejection Ratio
Large Signal
AV
10
25
10
25
10
25
V/mV
R
L
= 10K
Voltage Gain
Output Voltage
V
O
low
0.1
0.2
0.1
0.2
0.1
0.2
V
R
L
10K
Range
V
O
high
4.8
4.9
4.8
4.9
4.8
4.9
V
R
L
10K
T
A
= 25
C V
S
=
5.0V unless otherwise specified
1712A
1712B
1712
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Power Supply
PSRR
83
83
83
dB
R
S
100K
Rejection Ratio
Common Mode
CMRR
83
83
83
dB
R
S
100K
Rejection Ratio
Large Signal
A
V
250
250
250
V/mV
R
L
= 10K
Voltage Gain
Output Voltage
V
O
low
-4.90
-4.80
-4.90
-4.80
-4.90
-4.80
V
R
L
= 10K
Range
V
O
high
4.80
4.93
4.80
4.93
4.80 4.93
Bandwidth
B
W
1.7
1.7
1.7
MHz
Slew Rate
S
R
2.8
2.8
2.8
V/
s
A
V
=+1
C
L
=50pF
ALD1712A/ALD1712B
Advanced Linear Devices
4
ALD1712
Design & Operating Notes:
1. The ALD1712 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD1712 is internally compensated for unity gain
stability using a novel scheme that does not use a nulling resistor. This
scheme produces a clean single pole roll off in the gain characteristics
while providing for more than 70 degrees of phase margin at the unity
gain frequency. A unity gain buffer using the ALD1712 will typically
drive 400pF of external load capacitance without stability problems. In
the inverting unity gain configuration, it can drive up to 800pF of load
capacitance. Compared to other CMOS operational amplifiers, the
ALD1712 has shown itself to be more resistant to parasitic oscilla-
tions.
2. The ALD1712 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail to rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain compat-
ibility with other operational amplifiers, this switching point has been
selected to be about 1.5V above the negative supply voltage. Since
offset voltage trimming on the 1712 is made when the input voltage is
symmetrical to the supply voltages, this internal switching does not
affect a large variety of applications such as an inverting amplifier or
non-inverting amplifier with a gain larger than 2.5 (5V operation),
where the common mode voltage does not make excursions below
this switching point. The user should however, be aware that this
switching does take place if the operational amplifier is connected as
a unity gain buffer and should make provision in his design to allow for
input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
12
would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
5. The ALD1712 operational amplifier has been designed to provide full
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with, any input voltages applied and
to limit input voltages to not exceed 0.3V of the power supply voltage
levels.
TYPICAL PERFORMANCE CHARACTERISTICS
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
COMMON MODE INPUT
VOLTAGE RANGE (V)
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
T
A
= 25
C
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
SUPPLY VOLTAGE (V)
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
0
2
4
6
R
L
= 10K
R
L
= 5K
}
-55
C
}
+25
C
}
+125
C
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
5
4
2
3
0
1
SUPPLY CURRENT (mA)
0
1
2
3
4
5
6
-25
C
+25
C
+80
C
+125
C
INPUTS GROUNDED
OUTPUT UNLOADED
T
A
= -55
C
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
AMBIENT TEMPERATURE (
C)
100
10
1.0
0.01
0.1
INPUT BIAS CURRENT (pA)
100
-25
0
75
125
50
25
-50
1000
V
S
=
2.5V
ALD1712A/ALD1712B
Advanced Linear Devices
5
ALD1712
TYPICAL PERFORMANCE CHARACTERISTICS
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF FREQUENCY
FREQUENCY (Hz)
1
10
100
1K
10K
1M
10M
100K
120
100
80
60
40
20
0
-20
OPEN LOOP VOLTAGE
GAIN (db)
V
S
=
2.5V
T
A
= 25
C
90
0
45
180
135
PHASE SHIFT IN DEGREES
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
LOAD RESISTANCE (
)
1K
10K
1000K
100K
1000
100
10
1
OPEN LOOP VOLTAGE
GAIN (V/mV)
V
S
=
2.5V
T
A
= 25
C
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
1V/div
2
s/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 10K
C
L
= 50pF
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
20mV/div
V
S
=
2.5V
T
A
= 25
C
R
L
= 10K
C
L
= 50pF
2
s/div
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
COMMON MODE INPUT VOLTAGE (V)
-2
-1
0
+1
+2
+3
6
4
2
0
-2
-4
-6
INPUT OFFSET VOLTAGE (mV)
V
S
=
2.5V
T
A
= 25
C
VOLTAGE NOISE DENSITY AS A
FUNCTION OF FREQUENCY
FREQUENCY (Hz)
10
100
1K
10K
100K
150
125
100
75
50
25
0
1000K
VOLTAGE NOISE DENSITY
(nV/
Hz)
V
S
=
2.5V
T
A
= 25
C
RL = 10K
OUTPUT VOLTAGE SWING AS A
FUNCTION OF SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE SWING (V)
3
0
1
2
3
4
5
6
7
R
L
= 2K
6
5
4
2
7
25
C
T
A
125
C
R
L
= 10K
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
AMBIENT TEMPERATURE (
C)
INPUT OFFSET VOLTAGE (mV)
-50
-25
0
+25
+50
+75
+100 +125
+4
+5
+3
+1
+2
0
-2
-1
-4
-3
-5
V
S
=
2.5V
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