ALD1722E/ALD1722
Advanced Linear Devices
1
EPADTM OPERATIONAL AMPLIFIER
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD1722E/ALD1722
GENERAL DESCRIPTION
The ALD1722E/ALD1722 is a monolithic rail-to-rail precision CMOS
operational amplifier with integrated user programmable EPAD (Electri-
cally Programmable Analog Device) based offset voltage adjustment. The
ALD1722E/ALD1722 is a direct replacement of the ALD1702 operational
amplifier, with the added feature of user-programmable offset voltage
trimming resulting in significantly enhanced total system performance and
user flexibility. EPAD technology is an exclusive ALD design which has
been refined for analog applications where precision voltage trimming is
necessary to achieve a desired performance. It utilizes CMOS FETs as
in-circuit elements for trimming of offset voltage bias characteristics with
the aid of a personal computer under software control. Once pro-
grammed, the set parameters are stored indefinitely within the device even
after power-down. EPAD offers the circuit designer a convenient and cost-
effective trimming solution for achieving the very highest amplifier/system
performance.
The ALD1722E/ALD1722 operational amplifier features rail-to-rail input
and output voltage ranges, tolerance to over-voltage input spikes of
300mV beyond supply rails, high capacitive loading up to 4000pF, ex-
tremely low input currents of 0.01pA typical, high open loop voltage gain,
useful bandwidth of 1.5 MHz, slew rate of 2.1 V/
s, and low supply current
of 0.8mA.
BENEFITS
Eliminates manual and elaborate
system trimming procedures
Remote controlled automated trimming
In-System Programming capability
No external components
No internal chopper clocking noise
No chopper dynamic power dissipation
Simple and cost effective
Small package size
Extremely small total functional
volume size
Low system implementation cost
Low power
* Contact factory for industrial temperature range
Operating Temperature Range*
-55
C to +125
C
0
C to +70
C
0
C to +70
C
8-Pin
8-Pin
8-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD1722E DA
ALD1722E SA
ALD1722E PA
ALD1722 DA
ALD1722 SA
ALD1722 PA
ORDERING INFORMATION
PIN CONFIGURATION
1
2
2
3
4
8
7
6
5
TOP VIEW
DA, PA, SA PACKAGE
VE1
-IN
+IN
VE2
OUT
N/C
V-
V+
APPLICATIONS
Sensor interface circuits
Transducer biasing circuits
Capacitive and charge integration circuits
Biochemical probe interface
Signal conditioning
Portable instruments
High source impedance electrode
amplifiers
Precision Sample and Hold amplifiers
Precision current to voltage converter
Error correction circuits
Sensor compensation circuits
Precision gain amplifiers
Periodic In-system calibration
System output level shifter
KEY FEATURES
EPAD ( Electrically Programmable Analog Device)
User programmable V
OS
trimmer
Computer-assisted trimming
Rail-to-rail input/output
Compatible with standard EPAD Programmer
High precision through in-situ circuit precision trimming
Reduce or eliminate V
OS
, PSRR, CMRR and TCV
OS
errors
System level "calibration" capability
In-System Programming capable
Electrically programmable to compensate for external
component tolerances
Achieve 0.01pA input bias current and 25
V
input offset voltage simultaneously
Compatible with industry standard pinout
2
Advanced Linear Devices
ALD1722E/ALD1722
FUNCTIONAL DESCRIPTION
The ALD1722E/ALD1722 uses EPADs as in-circuit ele-
ments for trimming of offset voltage bias characteristics.
Each ALD1722E/ALD1722 has a pair of EPAD-based cir-
cuits connected such that one circuit is used to adjust V
OS
in one direction and the other is used to adjust V
OS
in the
other direction.
Functional Description of ALD1722E
While each of the EPAD devices is a monotonically adjust-
able programmable device, the V
OS
of the ALD1722E can
be adjusted many times in both directions. Once pro-
grammed, the set V
OS
levels are stored permanently, even
when the device power is removed.
The ALD1722E provides the user with an operational ampli-
fier that can be trimmed with user application-specific pro-
gramming or in-system programming conditions. User appli-
cation-specific circuit programming refers to the situation
where the Total Input Offset Voltage of the ALD1722E can
be trimmed with the actual intended operating conditions.
The ALD1722E is pre-programmed at the factory under
standard operating conditions for minimum equivalent input
offset voltage. It also has a guaranteed offset voltage
program range, which is ideal for applications that require
electrical offset voltage programming.
For example, an application circuit may have +6V and -2.5V
power supplies, and the operational amplifier input is biased
at +0.7V, and the average operating temperature is at 55
C.
The circuit can be wired up to these conditions within an
environmental chamber, and the ALD1722E can be inserted
into a test socket connected to this circuit while it is being
electrically trimmed. Any error in V
OS
due to these bias
conditions can be automatically zeroed out. The Total V
OS
error is now limited only by the adjustable range and the
stability of V
OS
, and the input noise voltage of the operational
amplifier. Therefore, this Total V
OS
error now includes V
OS
as V
OS
is traditionally specified; plus the V
OS
error contribu-
tions from PSRR, CMRR, TCV
OS
, and noise. Typically this
total V
OS
error term (V
OST
) is approximately
25
V for the
ALD1722E.
The V
OS
contribution due to PSRR, CMRR, TCV
OS
and
external components can be large for operational amplifiers
without trimming. Therefore the ALD1722E with EPAD trim-
ming is able to provide much improved system performance
by reducing these other sources of error to provide signifi-
cantly reduced V
OST.
In-System Programming refers to the condition where the
EPAD adjustment is made after the ALD1722E has been
inserted into a circuit board. In this case, the circuit design
must provide for the ALD1722E to operate in normal mode
and in programming mode. One of the benefits of in-system
programming is that not only is the ALD1722E offset voltage
from operating bias conditions accounted for, any residual
errors introduced by other circuit components, such as
resistor or sensor induced voltage errors, can also be cor-
rected. In this way, the "in-system" circuit output can be
adjusted to a desired level eliminating other trimming com-
ponents.
USER PROGRAMMABLE Vos FEATURE
Each ALD1722E/ALD1722 has two pins named VE1 and
VE2 which are internally connected to an internal offset bias
circuit. VE1/VE2 have initial typical values of 1.6 Volt. The
voltage on these pins can be programmed using the ALD
E100 EPAD Programmer and the appropriate Adapter Mod-
ule. The useful programming range of VE1 and VE2 is 1.6
Volt to 3.5 Volts. VE1 and VE2 pins are programming pins,
used during programming mode. The Programming pin is
used during electrical programming to inject charge into the
internal EPADs. Increases of VE1 decrease the offset volt-
age while increases of VE2 increase the offset voltage of the
operational amplifier. The injected charge is permanently
stored and determines the offset voltage of the operational
amplifier. After programming, VE1 and VE2 terminals must
be left open to settle on a voltage determined by internal bias
currents.
During programming, the voltages on VE1 or VE2 are
increased incrementally to set the offset voltage of the
operational amplifier to the desired V
OS
. Note that desired
V
OS
can be any value within the offset voltage program-
mable ranges, and can be either zero, a positive value or a
negative value. This V
OS
value can also be reprogrammed
to a different value at a later time, provided that the useful
VE1 or VE2 programming voltage range has not been
exceeded. VE1 or VE2 pins can also serve as capacitively
coupled input pins.
Internally, VE1 and VE2 are programmed and connected
differentially. Temperature drift effects between the two
internal offset bias circuits cancel each other and introduce
less net temperature drift coefficient change than offset
voltage trimming techniques such as offset adjustment with
an external trimmer potentiometer.
While programming, V+, VE1 and VE2 pins may be alter-
nately pulsed with 12V (approximately) pulses generated by
the EPAD Programmer. In-system programming requires
the ALD1722E/ALD1722 application circuit to accommo-
date these programming pulses. This can be accomplished
by adding resistors at certain appropriate circuit nodes. For
more information, see Application Note AN1700.
Functional Description of ALD1722
The ALD1722 is pre-programmed at the factory under stan-
dard operating conditions for minimum equivalent input off-
set voltage. The ALD1722 offers similar programmable
features as the ALD1722E, but with more limited offset
voltage program range. It is intended for standard opera-
tional amplifier applications where little or no electrical pro-
gramming by the user is necessary.
ALD1722E/ALD1722
Advanced Linear Devices
3
Supply voltage, V
+
13.2V
Differential input voltage range
-0.3V to V+
+0.3V
Power dissipation
600 mW
Operating temperature range
PA,SA package
0
C to +70
C
DA package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
ABSOLUTE MAXIMUM RATINGS
* NOTES 1 through 9, see section titled "Definitions and Design Notes".
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
o
C
V
S
=
2.5V unless otherwise specified
1722E
1722
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Supply Voltage
VS
2.0
5.0
2.0
5.0
V
V+
4.0
10.0
4.0
10.0
V
Single Supply
Initial Input Offset Voltage
1
VOS i
25
50
40
90
V
RS
100K
Offset Voltage Program Range
2
VOS
5
8
0.5
3
mV
Programmed Input Offset
VOS
25
50
40
90
V
At user specified
Voltage Error
3
target offset voltage
Total Input Offset Voltage
4
VOST
25
50
40
90
V
At user specified
target offset voltage
Input Offset Current
5
IOS
0.01
10
0.01
10
pA
TA = 25
C
280
280
pA
0
C
TA
+70
C
Input Bias Current
5
IB
0.01
10
0.01
10
pA
TA = 25
C
280
280
pA
0
C
TA
+70
C
Input Voltage Range
6
VIR
-0.3
5.3
-0.3
5.3
V
V+ = +5V; notes 2,5
-2.8
+2.8
-2.8
+2.8
V
VS =
2.5V
Input Resistance
RIN
1014
1014
Input Offset Voltage Drift
7
TCVOS
5
7
V/
C
RS
100K
Initial Power Supply
PSRR i
85
85
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRR i
97
97
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
50
250
50
250
V/mV
RL =10K
500
500
V/mV
RL
1M
VO low
0.002
0.01
0.002
0.01
V
RL =1M
V+ = 5V
VO high
4.99
4.998
4.99
4.998
V
0
C
TA
+70
C
Output Voltage Range
VO low
-2.44
-2.35
-2.44
-2.35
V
RL =10K
VO high
2.35
2.44
2.35
2.44
V
0
C
TA
+70
C
Output Short Circuit Current
ISC
8
8
mA
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