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Электронный компонент: ALD2724DB

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DUAL EPAD PRECISION HIGH SLEW RATE CMOS OPERATIONAL AMPLIFIER
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD2724E/ALD2724
GENERAL DESCRIPTION
The ALD2724E/ALD2724 is a dual monolithic operational amplifier with
MOSFET input that has rail-to-rail input and output voltage ranges. The
input voltage range and output voltage range are very close to the positive
and negative power supply voltages. Typically the input voltage can be
beyond positive power supply voltage V+ or the negative power supply
voltage V- by up to 300mV. The output voltage swings to within 60mV of
either positive or negative power supply voltages at rated load.
With high impedance load, the output voltage of the ALD2724E/ALD2724
approaches within 1mV of the power supply rails. This device is designed
as an alternative to the popular J-FET input operational amplifier in
applications where lower operating voltages, such as 9V battery or
3.25V
to
5V power supplies are being used. The ALD2724E/ALD2724 offers
high slew rate of 5.0V/
s.
The rail-to-rail input and output feature of the ALD2724E/ALD2724 ex-
pands signal voltage range for a given operating supply voltage and allows
numerous analog serial stages to be implemented without losing operat-
ing voltage margin. The output stage is designed to drive up to 10mA into
400pF capacitive and 1.5K
resistive loads at unity gain and up to 4000pF
at a gain of 5. Short circuit protection to either ground or the power supply
rails is at approximately 15mA clamp current. Due to complementary
output stage design, the output can source and sink 10mA into a load with
symmetrical drive and is ideally suited for applications where push-pull
voltage drive is desired.
For each of the operational amplifier, the offset voltage is trimmed on-chip
to eliminate the need for external nulling in many applications. For
precision applications, the output is designed to settle to 0.1% in 2
s. In
large signal buffer applications, the operational amplifier can function as
KEY FEATURES
Factory pre-trimmed V
OS
V
OS =
25
V @ I
OS =
0.01pA
5 V /
s slew rate
EPAD ( Electrically Programmable Analog Device)
Rail-to-rail input/output
Each amplifier V
OS
can be user trimmed to
a different Vos level (optional)
System level "calibration" capable
APPLICATIONS
Sensor interface circuits
Transducer biasing circuits
Capacitive and charge integration circuits
Biochemical probe interface
Signal conditioning
Portable instruments
High source impedance electrode
amplifiers
Precision Sample and Hold amplifiers
Precision current to voltage converter
Error correction circuits
Sensor compensation circuits
Precision gain amplifiers
Periodic In-system calibration
System output level shifter
PIN CONFIGURATION
* Contact factory for industrial temperature range
BENEFITS
Ready to use off the shelf standard part
Custom automated trimming optional
Remote controlled automated trimming
In-System Programming capable
No external components
No internal clocking noise source
Simple and cost effective
Small package size
Extremely small total functional
volume size
Low system implementation cost
2002 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ORDERING INFORMATION
Operating Temperature Range
-55
C to +125
C
0
C to +70
C
0
C to +70
C
14-Pin
14-Pin
14-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD2724E DB
ALD2724E SB
ALD2724E PB
ALD2724 DB
ALD2724 SB
ALD2724 PB
VE
2A
VE
1A
OUT
A
V+
OUT
B
VE
1B
VE
2B
+IN
A
N/C
V-
+IN
B
1
2
3
4
5
6
7
8
9
10
11
12
13
14
-IN
A
N/C
-IN
B
TOP VIEW
DB, PB, SB PACKAGE
2
Advanced Linear Devices
ALD2724E/ALD2724
GENERAL DESCRIPTION (cont'd)
an ultra-high input impedance voltage follower/buffer that
allows input and output voltage swings from positive to
negative supply voltages. This feature is intended to greatly
simplify systems design and eliminate higher voltage power
supplies in many applications.
Each ALD2724E/ALD2724 operational amplifier features
individual, user-programmable offset voltage trimming re-
sulting in significantly enhanced total system performance
and user flexibility. EPAD technology is an exclusive ALD
design which has been refined for analog applications where
precision voltage trimming is necessary to achieve a desired
performance. It utilizes CMOS FETs as in-circuit elements
for trimming of offset voltage bias characteristics with the aid
of a personal computer under software control. Once
programmed, the set parameters are stored indefinitely.
EPAD offers the circuit designer a convenient and cost-
effective trimming solution for achieving the very highest
amplifier/system performance.
FUNCTIONAL DESCRIPTION
The ALD2724E/ALD2724 utilizes EPADs as in-circuit ele-
ments for trimming of offset voltage bias characteristics.
Each ALD2724E/ALD2724 operational amplifier has a pair of
EPAD-based circuits connected such that one circuit is used
to adjust V
OS
in one direction and the other circuit is used
to adjust V
OS
in the other direction. While each of the basic
EPAD device is a monotonically adjustable (offset voltage
trimming) programmable device, the V
OS
of the ALD2724E
can be adjusted many times in both directions. Once pro-
grammed, the set V
OS
levels are stored permanently, even
when the device power is removed.
Functional Description of ALD2724E/ALD2724
The ALD2724E is pre-programmed at the factory under
standard operating conditions for minimum equivalent input
offset voltage. It also has a guaranteed offset voltage pro-
gram range, which is ideal for applications that require
electrical offset voltage programming.
The ALD2724E is an operational amplifier that can be
trimmed stand-alone, with user application-specific pro-
gramming or in-system programming conditions. User appli-
cation-specific circuit programming refers to a situation
where the Total Input Offset Voltage of the ALD2724E can be
trimmed with the actual intended operating conditions.
Take the example of an application circuit that uses + 5V and
-5V power supplies, an operational amplifier input biased at
+1V, and an average operating temperature at +85
C; the
circuit can be wired up to these conditions within an environ-
mental chamber with the ALD2724E inserted into a test
socket while it is being electrically trimmed. Any error in V
OS
due to these bias conditions can be automatically zeroed out.
The Total V
OS
error, V
OST
, is now limited only by the
adjustable range and the stability of V
OS
, and the input noise
voltage of the operational amplifier. This Total Input Offset
Voltage now includes V
OS
, as V
OS
is traditionally specified;
plus the V
OS
error contributions from PSRR, CMRR,
TCV
OS
, and noise. Typically, V
OST
ranges approximately
25
V for the ALD2724E.
In-System Programming refers to the condition where the
EPAD adjustment is made after the ALD2724E has been
inserted into a circuit board. In this case, the circuit design
must provide for the ALD2724E to operate in both normal
mode and in programming mode. One of the benefits of in-
system programming is that not only the ALD2724E offset
voltage from operating bias conditions has been accounted
for, any residual errors introduced by other circuit compo-
nents, such as resistor or sensor induced voltage errors, can
also be programmed and corrected. In this way, the "in-
system" circuit output can be adjusted to a desired level
eliminating need for another trimming function.
The ALD2724 is pre-programmed at the factory under
standard operating conditions for minimum equivalent input
offset voltage. The ALD2724 offers similar programmable
features as the ALD2724E, but with more limited offset
voltage program range. It is intended for standard
operational amplifier applications where little or no electrical
programming by the user is necessary.
USER PROGRAMMABLE V
OS
FEATURE
Each ALD2724E/ALD2724 has four additional pins,
compared to a conventional dual operational amplifier which
has eight pins. These four additional pins are named VE1A,
VE2A for op amp A and VE1B, VE2B for op amp B. Each of
these pins VE1A, VE2A, VE1B, VE2B (represented by
VExx) are connected to a separate, internal offset bias
circuit. VExx pins have initial internal bias voltage values of
approximately 1 to 2 Volts. The voltage on these pins can be
programmed using the ALD E100 EPAD Programmer and
the appropriate Adapter Module. The useful programming
range of voltages on VExx pins are 1 Volt to 4 Volts.
VExx pins are programming pins, used during electrical
programming mode to inject charge into the internal EPADs.
Increasing voltage on VE1A/VE1B decreases the offset
voltage whereas increasing voltage on VE2A/VE2B in-
creases the offset voltage of op amp A and op amp B,
respectively.
During programming, voltages on VExx pins are increased
incrementally to program the offset voltage of the opera-
tional amplifier to the desired V
OS
. Note that desired V
OS
can be any value within the offset voltage programmable
ranges, and can be either equal zero, a positive value or a
negative value. This V
OS
value can also be reprogrammed
to a different value at a later time, provided that the useful
VE1x or VE2x programming voltage range has not been
exceeded. The injected charge is then permanently stored.
After programming, VExx pins must be left open in order for
these voltages to remain at the programmed levels.
Internally, VE1 and VE2 are programmed and connected
differentially. Temperature drift effects between the two
internal offset bias circuits cancel each other and introduce
less net temperature drift coefficient change than offset
voltage trimming techniques such as offset adjustment with
an external trimmer potentiometer.
While programming, V+, VE1 and VE2 pins may be alter-
nately pulsed with 12V (approximately) pulses generated by
the EPAD Programmer. In-system programming requires
the ALD2722E application circuit to accommodate these
programming pulses. If needed, this requirement can be
accomplished by adding resistors at certain appropriate
circuit nodes.
ALD2724E/ALD2724
Advanced Linear Devices
3
Supply voltage, V
+
13.2V
Differential input voltage range
-0.3V to V+
+0.3V
Power dissipation
600 mW
Operating temperature range
PB,SB package
0
C to +70
C
DB package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
ABSOLUTE MAXIMUM RATINGS
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
o
C
V
S
=
5.0V unless otherwise specified
2724E
2724
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Supply Voltage
VS
3.25
5.25
3.25
5.25
V
V+
6.5
10.5
6.5
10.5
V
Single Supply
Input Offset Voltage
1
VOS i
25
100
40
150
V
RS
100K
Offset Voltage Program Range
2
VOS
5
7
0.5
2
mV
Programmed Input Offset
VOS
25
100
40
150
V
At user specified
Voltage Error
3
target offset voltage
Total Input Offset Voltage
4
VOST
25
100
40
150
V
At user specified
target offset voltage
Input Offset Current
5
IOS
0.01
10
0.01
10
pA
TA = 25
C
240
240
pA
0
C
TA
+70
C
Input Bias Current
5
IB
0.01
10
0.01
10
pA
TA = 25
C
240
240
pA
0
C
TA
+70
C
Input Voltage Range
6
VIR
-0.3
5.3
-0.3
5.3
V
V+ = +5V
-2.8
+2.8
-2.8
+2.8
V
VS =
2.5V
Input Resistance
RIN
10
14
10
14
Input Offset Voltage Drift
7
TCVOS
5
5
V/
C
RS
100K
Initial Power Supply
PSRR i
85
85
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRR i
90
90
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
150
150
V/mV
RL =10K
V/mV
0
C
TA
+70
C
VO low
-4.998
-4.99
-4.998
-4.99
V
RL =1M
V =5V
Output Voltage Range
VO high
4.99
4.998
4.99
4.998
V
0
C
TA
+70
C
VO low
-4.96
-4.90
-4.96
-4.90
V
RL =10K
VO high
4.90
4.95
4.90
4.95
V
0
C
TA
+70
C
Output Short Circuit Current
ISC
15
15
mA
* NOTES 1 through 9, see section titled "Definitions and Design Notes".
4
Advanced Linear Devices
ALD2724E/ALD2724
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
o
C
V
S
=
5.0V unless otherwise specified
2724E
2724
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Supply Current
IS
5.0
6.5
5.0
6.5
mA
VIN = 0V
No Load
Power Dissipation
PD
65
65
mW
VS =
2.5V
Input Capacitance
CIN
1
1
pF
Maximum Load Capacitance
CL
400
400
pF
Gain = 1
4000
4000
pF
Gain = 5
Equivalent Input Noise Voltage
en
26
26
nV/
Hz
f = 1KHz
Equivalent Input Noise Current
in
0.6
0.6
fA/
Hz
f =10Hz
Bandwidth
BW
2.1
2.1
MHz
Slew Rate
SR
5.0
5.0
V/
s
AV
= +1
RL = 2K
Rise time
tr
0.1
0.1
s
RL = 2K
Overshoot Factor
15
15
%
RL=2K
CL=100pF
Settling Time
tS
2
2
s
0.1% AV = -1
RL= 5K
CL = 50pF
Channel Separation
CS
140
140
dB
AV = 100
* NOTES 1 through 9, see section titled "Definitions and Design Notes".
T
A
= 25
o
C
V
S
=
5.0V unless otherwise specified
2724E
2724
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Average Long Term Input Offset
VOS
0.02
0.02
V/
Voltage Stability
9
time
1000 hrs
Initial VE Voltage
VE1 i, VE2 i
1.4
2.5
V
Programmable Change of
VE1,
VE2
1.5
2.0
0.5
V
VE Range
Programmed VE Voltage Error
e(VE1-VE2)
0.1
0.1
%
VE Pin Leakage Current
ieb
-5
-5
A
ALD2724E/ALD2724
Advanced Linear Devices
5
V
S
=
5.0V -55
C
T
A
+125
C unless otherwise specified
2724E
2724
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Initial Input offset Voltage
VOS i
0.7
0.7
mV
RS
100K
Input Offset Current
IOS
2.0
2.0
nA
Input Bias Current
IB
2.0
2.0
nA
Initial Power Supply
PSRR i
85
85
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRR i
97
97
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
10
25
10
25
V/mV
RL = 10K
Output Voltage Range
VO low
-4.9
-4.8
-4.9
-4.8
V
VO high
4.8
4.9
4.8
4.9
V
RL = 10K