DUAL EPADTM ULTRA MICROPOWER OPERATIONAL AMPLIFIER
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD2726E/ALD2726
GENERAL DESCRIPTION
The ALD2726E/ALD2726 is a dual monolithic rail-to-rail precision CMOS
operational amplifier with integrated user programmable EPAD (Electri-
cally Programmable Analog Device) based offset voltage adjustment. The
ALD2726E/ALD2726 is a dual version of the ALD1726E/ALD1726 opera-
tional amplifier. Each ALD2726E/ALD2726 operational amplifier features
individual, user-programmable offset voltage trimming resulting in signifi-
cantly enhanced total system performance and user flexibility. EPAD
technology is an exclusive ALD design which has been refined for analog
applications where precision voltage trimming is necessary to achieve a
desired performance. It utilizes CMOS FETs as in-circuit elements for
trimming of offset voltage bias characteristics with the aid of a personal
computer under software control. Once programmed, the set parameters
are stored indefinitely. EPAD offers the circuit designer a convenient and
cost-effective trimming solution for achieving the very highest amplifier/
system performance.
The ALD2726E/ALD2726 dual operational amplifier features rail-to-rail
input and output voltage ranges, tolerance to overvoltage input spikes of
300mV beyond supply rails, capacitive loading up to 25pF, extremely low
input currents of 0.01pA typical, high open loop voltage gain, useful
bandwidth of 700KHz, slew rate of 0.7V/
s, and low typical supply current
of 50
A for both amplifiers.
KEY FEATURES
EPAD ( Electrically Programmable Analog Device)
User programmable V
OS
trimmer
Computer-assisted trimming
Rail-to-rail input/output
Compatible with standard EPAD Programmer
Each amplifier V
OS
can be trimmed to a different Vos level
High precision through in-system circuit trimming
Reduces or eliminates V
OS
, PSRR, CMRR and TCV
OS
errors
System level "calibration" capability
Application Specific Programming mode
In-System Programming mode
Electrically programmable to compensate for
external component tolerances
0.01pA input bias current and 35
V
input offset voltage
1V to
5V operation
APPLICATIONS
Sensor interface circuits
Transducer biasing circuits
Capacitive and charge integration circuits
Biochemical probe interface
Signal conditioning
Portable instruments
High source impedance electrode
amplifiers
Precision Sample and Hold amplifiers
Precision current to voltage converter
Error correction circuits
Sensor compensation circuits
Precision gain amplifiers
Periodic In-system calibration
System output level shifter
PIN CONFIGURATION
ORDERING INFORMATION
Operating Temperature Range
-55
C to +125
C
0
C to +70
C
0
C to +70
C
14-Pin
14-Pin
14-Pin
CERDIP
Small Outline
Plastic Dip
Package
Package (SOIC)
Package
ALD2726E DB
ALD2726E SB
ALD2726E PB
ALD2726 DB
ALD2726 SB
ALD2726 PB
* Contact factory for industrial temperature range
BENEFITS
Eliminates manual and elaborate
system trimming procedures
Remote controlled automated trimming
In-System Programming capability
No external components
No internal clocking noise source
Simple and cost effective
Small package size
Extremely small total functional
volume size
Low system implementation cost
Micropower
1
2
3
4
5
6
7
11
12
13
14
8
9
10
TOP VIEW
DB, PB, SB PACKAGE
VE 2A
VE 1A
V-
N/C
VE 2B
VE 1B
OUT B
OUT A
+IN A
-IN A
+IN B
-IN B
N/C
V+
1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
2
Advanced Linear Devices
ALD2726E/ALD2726
Functional Description of ALD2726
The ALD2726 is pre-programmed at the factory under
standard operating conditions for minimum equivalent input
offset voltage. The ALD2726 offers similar programmable
features as the ALD2726E, but with more limited offset
voltage program range. It is intended for standard
operational amplifier applications where little or no electrical
programming by the user is necessary.
USER PROGRAMMABLE V
OS
FEATURE
Each ALD2726E/ALD2726 has four additional pins,
compared to a conventional dual operational amplifier which
has eight pins. These four additional pins are named VE1A,
VE2A for op amp A and VE1B, VE2B for op amp B. Each of
these pins VE1A, VE2A, VE1B, VE2B (represented by VExx)
are connected to a separate, internal offset bias circuit. VExx
pins have initial internal bias voltage values of approximately
1 to 2 Volts. The voltage on these pins can be programmed
using the ALD E100 EPAD Programmer and the appropriate
Adapter Module. The useful programming range of voltages
on VExx pins are 1 Volt to 3 Volts.
VExx pins are programming pins, used during electrical
programming mode to inject charge into the internal EPADs.
Increasing voltage on VE1A/VE1B increases the offset volt-
age whereas increasing voltage on VE2A/VE2B decreases
the offset voltage of op amp A and op amp B, respectively.
The injected charge is then permanently stored. After pro-
gramming, VExx pins must be left open in order for these
voltages to remain at the programmed levels.
During programming, voltages on VExx pins are increased
incrementally to program the offset voltage of the operational
amplifier to the desired V
OS
. Note that desired V
OS
can be
any value within the offset voltage programmable ranges,
and can be either equal zero, a positive value or a negative
value. This V
OS
value can also be reprogrammed to a
different value at a later time, provided that the useful VE1x
or VE2x programming voltage range has not been
exceeded. VExx pins can also serve as capacitively coupled
input pins.
Internally, VE1 and VE2 are programmed and connected
differentially. Temperature drift effects between the two
internal offset bias circuits cancel each other and introduce
less net temperature drift coefficient change than offset
voltage trimming techniques such as offset adjustment with
an external trimmer potentiometer.
While programming, V+, VE1 and VE2 pins may be alter-
nately pulsed with 12V (approximately) pulses generated by
the EPAD Programmer. In-system programming requires
the ALD2721E application circuit to accommodate these
programming pulses. This can be accomplished by adding
resistors at certain appropriate circuit nodes. For more
information, see Application Note AN1700.
FUNCTIONAL DESCRIPTION
The ALD2726E/ALD2726 utilizes EPADs as in-circuit
elements for trimming of offset voltage bias characteristics.
Each ALD2726E/ALD2726 operational amplifier has a pair of
EPAD-based circuits connected such that one circuit is used to
adjust V
OS
in one direction and the other circuit is used to
adjust V
OS
in the other direction. While each of the basic
EPAD devices is monotonically adjustable, the V
OS
of the
ALD2721E can be adjusted many times in both directions.
Once programmed, the set V
OS
levels are stored permanently,
even when the device is removed.
Functional Description of ALD2726E
The ALD2726E is pre-programmed at the factory under
standard operating conditions for minimum equivalent input
offset voltage. It also has a guaranteed offset voltage program
range, which is ideal for applications that require electrical
offset voltage programming.
The ALD2726E is an operational amplifier that can be trimmed
stand-alone, with user application-specific programming or in-
system programming conditions. User application-specific
circuit programming refers to a situation where the Total Input
Offset Voltage of the ALD2726E can be trimmed with the actual
intended operating conditions.
Take the example of an application circuit that uses + 1V and
-1V power supplies, an operational amplifier input biased at
+1V, and an average operating temperature at +85
C; the
circuit can be wired up to these conditions within an environ-
mental chamber with the ALD2726E inserted into a test socket
while it is being electrically trimmed. Any error in V
OS
due to
these bias conditions can be automatically zeroed out. The
Total V
OS
error is now limited only by the adjustable range and
the stability of V
OS
, and the input noise voltage of the
operational amplifier. This Total Input Offset Voltage, V
OST,
now includes V
OS
, as V
OS
is traditionally specified; plus the
V
OS
error contributions from PSRR, CMRR, TCV
OS
, and
noise. Typically, V
OST
ranges approximately
35
V for the
ALD2726E.
In-System Programming refers to the condition where the
EPAD adjustment is made after the ALD2726E has been
inserted into a circuit board. In this case, the circuit design must
provide for the ALD2726E to operate in both normal mode and
in programming mode. One of the benefits of in-system
programming is that not only the ALD276E offset voltage from
operating bias conditions has been accounted for, any residual
errors introduced by other circuit components, such as resistor
or sensor induced voltage errors, can also be programmed and
corrected. In this way, the "in-system" circuit output can be
adjusted to a desired level eliminating need for another
trimming function.
ALD2726E/ALD2726
Advanced Linear Devices
3
Supply voltage, V
+
13.2V
Differential input voltage range
-0.3V to V+
+0.3V
Power dissipation
600 mW
Operating temperature range
PB,SB package
0
C to +70
C
DB package
-55
C to +125
C
Storage temperature range
-65
C to +150
C
Lead temperature, 10 seconds
+260
C
ABSOLUTE MAXIMUM RATINGS
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
o
C
V
S
=
2.5V unless otherwise specified
2726E
2726
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Supply Voltage
VS
1.0
5.0
1.0
5.0
V
V+
2.0
10.0
2.0
10.0
V
Single Supply
Initial Input Offset Voltage
1
VOS i
35
100
50
150
V
RS
100K
Offset Voltage Program Range
2
VOS
7
15
0.7
4
mV
Programmed Input Offset
VOS
50
100
50
150
V
At user specified
Voltage Error
3
target offset voltage
Total Input Offset Voltage
4
VOST
50
100
50
150
V
At user specified
target offset voltage
Input Offset Current
5
IOS
0.01
10
0.01
10
pA
TA = 25
C
240
240
pA
0
C
TA
+70
C
Input Bias Current
5
IB
0.01
10
0.01
10
pA
TA = 25
C
240
240
pA
0
C
TA
+70
C
Input Voltage Range
6
VIR
-0.3
5.3
-0.3
5.3
V
V+ = +5V
-2.8
+2.8
-2.8
+2.8
V
VS =
2.5V
Input Resistance
RIN
10
14
10
14
Input Offset Voltage Drift
7
TCVOS
7
7
V/
C
RS
100K
Initial Power Supply
PSRR i
90
90
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRR i
90
90
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
15
100
15
100
V/mV
RL =100K
10
10
V/mV
0
C
TA
+70
C
VO low
0.001
0.01
0.001
0.01
V
RL =1M
V =5V
Output Voltage Range
VO high
4.99
4.999
4.99
4.999
V
0
C
TA
+70
C
VO low
-2.48
-2.40
-2.48
-2.40
V
RL =100K
VO high
2.40
2.48
2.40
2.48
V
0
C
TA
+70
C
Output Short Circuit Current
ISC
200
200
A
* NOTES 1 through 9, see section titled "Definitions and Design Notes".
4
Advanced Linear Devices
ALD2726E/ALD2726
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
o
C
V
S
=
2.5V unless otherwise specified
2726E
2726
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Supply Current
IS
50
80
50
80
A
VIN = 0V
No Load
Power Dissipation
PD
400
400
W
VS =
2.5V
Input Capacitance
CIN
1
1
pF
Maximum Load Capacitance
CL
25
25
pF
Equivalent Input Noise Voltage
en
55
55
nV/
Hz
f = 1KHz
Equivalent Input Noise Current
in
0.6
0.6
fA/
Hz
f =10Hz
Bandwidth
BW
200
200
KHz
Slew Rate
SR
0.1
0.1
V/
s
AV
= +1
RL = 100K
Rise time
tr
1.0
1.0
s
RL = 100K
Overshoot Factor
20
20
%
RL=100K
CL=25pF
Settling Time
tS
10
10
s
0.1% AV = -1
RL= 100K
CL = 25pF
Channel Separation
CS
140
140
dB
AV =100
* NOTES 1 through 9, see section titled "Definitions and Design Notes".
T
A
= 25
o
C
V
S
=
2.5V unless otherwise specified
2726E
2726
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Average Long Term Input Offset
VOS
0.02
0.02
V/
Voltage Stability
9
time
1000 hrs
Initial VE Voltage
VE1 i, VE2 i
1.5
1.8
V
Programmable Change of
VE1,
VE2
0.5
1.0
0.5
V
VE Range
Programmed VE Voltage Error
e(VE1-VE2)
0.1
0.1
%
VE Pin Leakage Current
ieb
-5
-5
A
ALD2726E/ALD2726
Advanced Linear Devices
5
T
A
= 25
o
C
V
S
=
1.0V unless otherwise specified
2726E
2726
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Initial Power Supply
PSRR i
80
80
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRRi
80
80
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
50
50
V/mV
RL = 1M
Output Voltage Range
VO low
-0.95
-0.9
-0.95
-0.9
V
RL = 1M
VO high
0.9
0.95
0.9
0.95
Bandwidth
BW
0.2
0.2
MHz
Slew Rate
SR
0.1
0.1
V/
s
AV = +1, CL = 25pF
V
S
=
2.5V -55
C
T
A
+125
C unless otherwise specified
2726E
2726
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
Initial Input offset Voltage
VOS i
0.7
0.7
mV
RS
100K
Input Offset Current
IOS
2.0
2.0
nA
Input Bias Current
IB
2.0
2.0
nA
Initial Power Supply
PSRR i
85
85
dB
RS
100K
Rejection Ratio
8
Initial Common Mode
CMRR i
83
83
dB
RS
100K
Rejection Ratio
8
Large Signal Voltage Gain
AV
10
50
10
50
V/mV
RL = 1M
Output Voltage Range
VO low
-2.40
-2.25
-2.40
-2.25
V
VO high
2.25
2.40
2.25
2.40
V
RL = 1M
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