ChipFind - документация

Электронный компонент: P2042A-08TR

Скачать:  PDF   ZIP

August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
Alliance Semiconductor
2575 Augustine Drive
Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a low EMI spread spectrum clock of the
input frequency.
Input frequency range: 30MHz to 110MHz.
Optimized for 32.5MHz, 54MHz, 65MHz and
108MHz pixel clock frequencies.
Internal loop filter minimizes external components
and board space.
Eight selectable high spread ranges up to 1.9%.
SSON# control pin for spread spectrum enable and
disable options.
Low cycle-to-cycle jitter.
3.3V 0.3V operating range.
Low power CMOS design.
Supports most mobile graphic accelerator and LCD
timing controller specifications.
Available in 8-pin SOIC and TSSOP Packages.

Product Description
The P2042A is a versatile spread spectrum frequency
modulator designed specifically for digital flat panel
applications. The P2042A reduces electromagnetic
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream clock and data
dependent signals. The P2042A allows significant system
cost savings by reducing the number of circuit board
layers ferrite beads, shielding and other passive
components that are traditionally required to pass EMI
regulations.

The P2042A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.

The P2042A modulates the output of a single PLL in
order to "spread" the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal's bandwidth is called `spread
spectrum clock generation'.

Applications
The P2042A is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.

Block Diagram
















VSS
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
VCO
Output
Divider
PLL
VDD
SSON#
SR0 CP1 CP0
ModOUT
CLKIN

August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
2 of 8
CP0
1
2
3
4
5
6
7
8
P2042A
CLKIN
CP1
VSS
SSON#
ModOUT
SR0
VDD
Pin Configuration










Pin Description
Pin#
Pin
Name
Type
Description
1
CLKIN
I
External reference frequency input. Connect to externally generated reference signal.
2 CP0 I
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
3 CP1 I
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
4
VSS
P
Ground to entire chip. Connect to system ground.
5 SSON# I
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
6
ModOUT
O
Spread spectrum clock output.
7
SR0
I
Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
8
VDD
P
Power supply for the entire chip


Modulation Selection
Spreading Range (%)
CP0
CP1
SR0
32.5MHz
54MHz
65MHz
81MHz
108MHz
Modulation Rate
(KHz)
0 0 0 0.56
1.05
1.00 0.98 0.80
0 0 1 1.94
1.68
1.56 1.48 1.22
0 1 0 1.36
1.05
1.00 0.92 0.67
0 1 1 1.92
1.68
1.56 1.48 1.06
1 0 0 1.24
0.81
0.66 0.40 0.27
1 0 1 1.91
1.29
1.02 0.74 0.43
1 1 0 0.91
0.45
0.34 0.05 0.15
1 1 1 1.47
0.71
0.54 0.36 0.21
(FIN /40) * 62.49
KHz



August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
3 of 8

Spread Spectrum Selection
The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).

For example, P2042A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat
panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage
deviation of 1.00% from F
IN
. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation
rate of 101.54KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction
method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic
accelerator manufacturers.

Application Schematic for Mobile LCD Graphics Controllers



























Modulated 65MHz signal with
1.00% deviation and
modulation rate of 101.54KHz.
This signal is connected back to
the spread spectrum input pin
(SSIN) of the graphics
accelerator.
1
2
3
4
CLKIN
CP0
CP1
VSS
SR0
5
6
7
8
SSON#
ModOUT
VDD
65MHz from graphics accelerator
+3.3V
0.1F
P2042A
Digital control for the SS enable
or disable

August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
4 of 8

Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
V
DD
, V
IN
Voltage on any pin with respect to Ground
-0.5 to +7.0
V
T
STG
Storage temperature
-65 to +125
C
T
A
Operating temperature
-40 to +85
C
T
s
Max. Soldering Temperature (10 sec)
260
C
T
J
Junction
Temperature
150
C
T
DV
Static Discharge Voltage
(As per JEDEC STD22- A114-B)
2 KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.


DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
V
IL
Input low voltage
VSS - 0.3
-
0.8
V
V
IH
Input high voltage
2.0
-
VDD + 0.3
V
I
IL
Input low current
(pull-up resistor on inputs CP0, CP1 and SR0)
- - -35
A
I
IH
Input high current (pull-down resistor on input SSON#)
-
-
35
A
V
OL
Output low voltage (V
DD
= 3.3 V, I
OL
= 20 mA)
-
-
0.4
V
V
OH
Output high voltage (V
DD
= 3.3 V, I
OL
= 20 mA)
2.5
-
-
V
I
DD
Static supply current standby mode
-
0.6
-
mA
I
CC
Dynamic supply current (3.3V and 10pF loading)
9
16
22
mA
V
DD
Operating
voltage
3.0 3.3 3.6 V
t
ON
Power-up time (first locked cycle after power up)
-
0.18
-
mS
Z
OUT
Clock output impedance
-
50
-


AC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
f
IN
Input
frequency
30
65
110
MHz
f
OUT
Output
frequency
30
65
110
MHz
t
LH
*
Output rise time (measured at 0.8V to 2.0V)
0.7
0.9
1.1
nS
t
HL
*
Output fall time (measured at 2.0V to 0.8V)
0.6
0.8
1.0
nS
t
JC
Jitter (cycle to cycle)
-
-
360
pS
t
D
Output duty cycle
45
50
55
%

*t
LH
and t
HL
are measured into a capacitive load of 15pF


August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
5 of 8

Package Information

8-lead SOIC Package

D
E
H
D
A1
A2
A
L
C
B
e

Dimensions
Inches
Millimeters
Symbol
Min
Max
Min
Max
A1 0.004 0.010 0.10
0.25
A 0.053
0.069 1.35 1.75
A2 0.049 0.059 1.25
1.50
B 0.012
0.020 0.31 0.51
C 0.007
0.010 0.18 0.25
D
0.193 BSC
4.90 BSC
E
0.154 BSC
3.91 BSC
e
0.050 BSC
1.27 BSC
H
0.236 BSC
6.00 BSC
L 0.016
0.050 0.41 1.27
0 8 0 8







August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
6 of 8
E
H
A
A1
A2
D
B
C
L
e

8-lead TSSOP Package



















Dimensions
Inches
Millimeters
Symbol
Min
Max
Min
Max
A
0.043
1.10
A1
0.002
0.006
0.05
0.15
A2
0.033
0.037
0.85
0.95
B
0.008
0.012
0.19
0.30
c
0.004
0.008
0.09
0.20
D
0.114
0.122
2.90
3.10
E
0.169
0.177
4.30
4.50
e
0.026 BSC
0.65 BSC
H
0.252 BSC
6.40 BSC
L
0.020
0.028
0.50
0.70
0 8 0 8






August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
7 of 8

Ordering Information
Part Number
Marking
Package Type
Qty/reel
Temperature
P2042A-08ST
P2042A
8-Pin SOIC, TUBE
Commercial
P2042A-08SR P2042A 8-Pin
SOIC, TAPE & REEL
2500
Commercial
P2042A-08TT P2042A 8-Pin
TSSOP,
TUBE
Commercial
P2042A-08TR
P2042A
8-Pin TSSOP, TAPE & REEL
2500
Commercial
P2042AF-08ST
P2042AF
8-Pin SOIC, TUBE, Pb Free
Commercial
P2042AF-08SR
P2042AF
8-Pin SOIC, TAPE & REEL, Pb Free
2500
Commercial
P2042AF-08TT
P2042AF
8-Pin TSSOP, TUBE, Pb Free
Commercial
P2042AF-08TR
P2042AF
8-Pin TSSOP, TAPE & REEL, Pb Free
2500
Commercial
P2042AG-08ST
P2042AG
8-Pin SOIC, TUBE, Green
Commercial
P2042AG-08SR
P2042AG
8-Pin SOIC, TAPE & REEL, Green
2500
Commercial
P2042AG-08TT
P2042AG
8-Pin TSSOP, TUBE, Green
Commercial
P2042AG-08TR
P2042AG
8-Pin TSSOP, TAPE & REEL, Green
2500
Commercial

Device Ordering Information
P 2 0 4 2 A F - 0 8 X X





















Licensed under U.S Patent Nos 5,488,627 and 5,631,921
SR - SOIC, T/R
TT TSSOP, TUBE
TR - TSSOP, T/R
ST SOIC, TUBE
DEVICE NUMBER
Flow:
P = Commercial Temperature Range (0C to 70C)
I = Industrial Temperature Range (-40C to 85C)
Pin Count
Deviation (%) and Spread option Identifier
F =Lead Free and and RoHS compliant part
G = Green

August 2005
P2042A
rev 1.3
Notice: The information in this document is subject to change without notice.
LCD Panel EMI Reduction IC
8 of 8
































Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003

Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective
companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance
assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's
best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time,
without notice. If the product described herein is under development, significant changes to these specifications are possible.
The information in this product data sheet is intended to be general descriptive information for potential customers and users,
and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume
any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or
implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a
particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's
Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively
according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under
any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third
parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction
or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such
life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all
claims arising from such use.
Alliance Semiconductor Corporation
2575 Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Fax: 408-855-4999
www.alsc.com
Copyright Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: P2042A
Document Version: v1.3