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Электронный компонент: AAM29LV800BB-120DG5C

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SUPPLEMENT
Publication# 21356
Rev: B Amendment/+1
Issue Date: March 1998
Am29LV800B Known Good Die
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only, Boot Sector Flash Memory--Die Revision 1
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
-- 2.7 to 3.6 V for read, program, and erase
operations
-- Ideal for battery-powered applications
s
Manufactured on 0.35
m process technology
s
High performance
-- 90 or 120 ns access time
s
Low power consumption (typical values at 5
MHz)
-- 200 nA Automatic Sleep mode current
-- 200 nA standby mode current
-- 7 mA read current
-- 15 mA program/erase current
s
Flexible sector architecture
-- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
-- One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
-- Supports full chip erase
-- Sector Protection features:
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Unlock Bypass Program Command
-- Reduces overall programming time when
issuing multiple program command sequences
s
Top or bottom boot block configurations
available
s
Embedded Algorithms
-- Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
-- Embedded Program algorithm automatically
writes and verifies data at specified addresses
s
Minimum 1,000,000 write cycle guarantee per
sector
s
Compatibility with JEDEC standards
-- Pinout and software compatible with single-
power supply Flash
-- Superior inadvertent write protection
s
Data# Polling and toggle bits
-- Provides a software method of detecting
program or erase operation completion
s
Ready/Busy# pin (RY/BY#)
-- Provides a hardware method of detecting
program or erase cycle completion
s
Erase Suspend/Erase Resume
-- Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
s
Hardware reset pin (RESET#)
-- Hardware method to reset the device to reading
array data
2
Am29LV800B Known Good Die
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29LV800B in Known Good Die (KGD) form is
an 8 Mbit, 3.0 volt-only Flash memory. AMD defines
KGD as standard product in die form, tested for func-
tionality and speed. AMD KGD products have the same
reliability and quality as AMD products in packaged
form.
Am29LV800B Features
The Am29LV800B is an 8 Mbit, 3.0 volt-only Flash
memory organized as 1,048,576 bytes or 524,288
words. The word-wide data (x16) appears on DQ15
DQ0; the byte-wide (x8) data appears on DQ7DQ0.
To eliminate bus contention the device has separate
chip enable (CE#), write enable (WE#) and output
enable (OE#) controls.
The device requires only a single 3.0 volt power
supply
for both read and write functions. Internally
generated and regulated voltages are provided for the
program and erase operations. No V
PP
is required for
program or erase operations. The device can also be
programmed in standard EPROM programmers.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard. Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the Embedded
Program
algorithm--an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin. The Unlock Bypass mode facili-
tates faster programming times by requiring only two
write cycles to program data instead of four.
Device e rasure occurs by executing the erase
command sequence. This initiates the Embedded
Erase
algorithm--an internal algorithm that automati-
cally preprograms the array (if it is not already pro-
grammed) before executing the erase operation.
During erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle) status bits. After a program or erase cycle has
been completed, the device is ready to read array data
or accept another command.
The sector erase architecture allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of
memory. This can be achieved in-system or via pro-
gramming equipment.
The Erase Suspend feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The hardware RESET# pin terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the automatic sleep mode.
The system can also place the device into the standby
mode
. Power consumption is greatly reduced in both
these modes.
AMD's Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron
injection.
ELECTRICAL SPECIFICATIONS
Refer to the Am29LV800B data sheet, publication
number 21490, for full electrical specifications on the
Am29LV800B in KGD form.
Am29LV800B Known Good Die
3
S U P P L E M E N T
PRODUCT SELECTOR GUIDE
DIE PHOTOGRAPH
Family Part Number
Am29LV800B KGD
Speed Option (V
CC
= 2.7 3.6 V)
-90
-120
Max Access Time, t
ACC
(ns)
90
120
Max CE# Access, t
CE
(ns)
90
120
Max OE# Access, t
OE
(ns)
35
50
Orientation relative
to top left corner of
Gel-Pak
Orientation relative
to leading edge of
tape and reel
4
Am29LV800B Known Good Die
S U P P L E M E N T
DIE PAD LOCATIONS
2
1
44 43 42 41 40 39 38
37
35
34
13 14 15 16 17 18 19 20 21 22 23
27 28 29 30
AMD logo location
31 32
33
10
11
12
9
8
7
6
5
4
3
36
24 25 26
Am29LV800B Known Good Die
5
S U P P L E M E N T
PAD DESCRIPTION
Note: The coordinates above are relative to the center of pad 1 and can be used to operate wire bonding equipment.
Pad
Signal
Pad Center (mils)
Pad Center (millimeters)
X
Y
X
Y
1
V
CC
0.00
0.00
0.0000
0.0000
2
DQ4
12.74
0.00
0.3235
0.0000
3
DQ12
18.96
0.00
0.4817
0.0000
4
DQ5
25.11
0.00
0.6377
0.0000
5
DQ13
31.33
0.00
0.7959
0.0000
6
DQ6
37.48
0.00
0.9519
0.0000
7
DQ14
43.71
0.00
1.1101
0.0000
8
DQ7
49.85
0.00
1.2661
0.0000
9
DQ15/A1
56.08
0.00
1.4243
0.0000
10
V
SS
66.01
1.69
1.6767
0.0430
11
BYTE#
66.01
12.30
1.6767
0.3123
12
A16
66.01
22.92
1.6767
0.5822
13
A15
65.65
266.81
1.6674
6.7770
14
A14
59.50
266.81
1.5114
6.7770
15
A13
53.80
266.81
1.3664
6.7770
16
A12
47.65
266.81
1.2104
6.7770
17
A11
41.95
266.81
1.0654
6.7770
18
A10
35.80
266.81
0.9094
6.7770
19
A9
30.09
266.55
0.7644
6.7704
20
A8
23.85
266.81
0.6059
6.7770
21
WE#
18.15
266.81
0.4609
6.7770
22
RESET#
8.06
270.78
0.2047
6.8778
23
RY/BY#
10.07
270.78
0.2558
6.8778
24
A18
20.14
266.81
0.5116
6.7770
25
A17
25.85
266.81
0.6566
6.7770
26
A7
31.99
266.81
0.8126
6.7770
27
A6
37.70
266.81
0.9576
6.7770
28
A5
43.84
266.81
1.1136
6.7770
29
A4
49.55
266.81
1.2586
6.7770
30
A3
55.69
266.81
1.4146
6.7770
31
A2
61.40
266.81
1.5596
6.7770
32
A1
67.54
266.81
1.7156
6.7770
33
A0
67.91
23.08
1.7249
0.5862
34
CE#
67.91
12.45
1.7249
0.3163
35
V
SS
67.91
1.91
1.7249
0.0484
36
OE#
58.00
2.27
1.4732
0.0576
37
DQ0
50.02
0.00
1.2705
0.0000
38
DQ8
43.79
0.00
1.1123
0.0000
39
DQ1
37.65
0.00
0.9563
0.0000
40
DQ9
31.42
0.00
0.7981
0.0000
41
DQ2
25.28
0.00
0.6421
0.0000
42
DQ10
19.05
0.00
0.4839
0.0000
43
DQ3
12.91
0.00
0.3279
0.0000
44
DQ11
6.68
0.00
0.1697
0.0000