Copyright 2000 Advanced Micro Devices, Inc. All rights reserved
.
Publication# 21915 Rev: B Amendment/0
Issue Date: May 2000
Am186
TM
CC
High-Performance, 80C186-Compatible
16-Bit Embedded Communications Controller
DISTINCTIVE CHARACTERISTICS
n
E86TM family of x86 embedded processors
offers improved time-to-market
Software migration (backwards- and upwards-
compatible)
World-class development tools, applications, and
system software
n
Serial Communications Peripherals
Four High-level Data Link Control (HDLC) channels
Four independent Time Slot Assigners (TSAs)
Physical interface for HDLC channels can be raw
DCE, PCM Highway, or GCI (IOM-2)
USB peripheral controller
High-Speed UART with autobaud
UART
Synchronous serial interface (SSI)
SmartDMATM channels (8) to support USB/HDLC
n
System Peripherals
Three programmable 16-bit timers
Hardware watchdog timer
General-purpose DMA (4 channels)
Programmable I/O (48 PIO signals)
Interrupt Controller (36 maskable interrupts)
n
Memory and Peripheral Interface
Integrated DRAM controller
Glueless interface to RAM/ROM/Flash memory
(55-ns Flash memory required for zero-wait-state
operation at 50 MHz)
Fourteen chip selects (8 peripherals, 6 memory)
External bus mastering support
Multiplexed and nonmultiplexed address/data bus
Programmable bus sizing
8-bit boot option
n
Available in the following package
160-pin plastic quad flat pack (PQFP)
25-, 40-, and 50-MHz operating frequencies
Low-voltage operation, V
CC
= 3.3 V 0.3 V
Commercial and industrial temperature rating
5-V-tolerant I/O (3.3-V output levels)
GENERAL DESCRIPTION
T h e A m 1 8 6 TM C C e m b e d d e d c o m m u n i c a t i o n s
controller is the first member in the AMD Comm86TM
product family. The Am186CC controller is a cost-
effective, high-performance microcontroller solution for
communications applications. This highly integrated
microcontroller enables customers to save system
c o s t s a n d i n c r e a s e p e r f o r m a n c e o v e r 8 - b i t
microcontrollers and other 16-bit microcontrollers.
The Am186CC communications controller offers the
advantages of the x86 development environment's
widely available native development tools, applications,
and system software. Additionally, the controller uses
the industry-standard 186 instruction set that is part of
the AMD E86TM family, which continually offers
instruction-set-compatible upgrades. Built into the
A m 1 8 6 C C c o n t r o l l e r i s a w i d e r a n g e o f
c o m m u n i c a t i o n s f e a t u r e s r e q u i r e d i n m a n y
communications applications, including High-level
Data Link Control (HDLC) and the Universal Serial Bus
(USB).
AMD offers complete solutions with the Am186CC
controller. A customer development platform board is
available. Reference designs under development
include a low-end router with Integrated Services
Digital Network (ISDN), Ethernet, USB, Plain Old
Telephone Service (POTS), and an ISDN Terminal
Adapter featuring USB. AMD and its FusionE86
SM
Partners offer boards, schematics, drivers, protocol
stacks, and routing software for these reference
designs to enable fast time to market.
2
Am186TMCC Communications Controller Data Sheet
ORDERING INFORMATION
25 = 25 MHz
40 = 40 MHz
50 = 50 MHz
TEMPERATURE RANGE
SPEED OPTION
DEVICE NUMBER/DESCRIPTION
LEAD FORMING
\W=Trimmed and Formed
Valid combinations list configurations planned to be
supported in volume for this device. Consult the
local AMD sales office to confirm availability of
specific valid combinations and to check on newly
released combinations.
Valid Combinations
PACKAGE TYPE
K=160-Pin Plastic Quad Flat Pack (PQFP)
Am186CC high-performance 80C186-compatible
16-bit embedded communications controller
50
K
C
\W
Valid Combinations
Am186CC25
Am186CC40
Am186CC50
KC\W
Am186CC25
Am186CC40
KI\W
Am186CC
C= Am186CC Commercial (T
C
=0
C to +100
C)
I = Am186CC Industrial (T
A
=40
C to +85
C)
where: T
C
= case temperature
where: T
A
= ambient temperature
Am186TMCC Communications Controller Data Sheet
3
TABLE OF CONTENTS
Distinctive Characteristics ............................................................................................................ 1
General Description ..................................................................................................................... 1
Ordering Information .................................................................................................................... 2
Logic Diagram by Interface .......................................................................................................... 6
Logic Diagram by Default Pin Function ....................................................................................... 7
Pin Connection Diagram--160-Pin PQFP Package .................................................................... 8
Pin and Signal Tables .................................................................................................................. 9
Signal Descriptions ............................................................................................................... 13
Architectural Overview ............................................................................................................... 28
Detailed Description .............................................................................................................. 28
Am186 Embedded CPU ........................................................................................................ 29
Memory Organization ............................................................................................................ 29
I/O Space .............................................................................................................................. 29
Serial Communications Support ............................................................................................ 30
Universal Serial Bus ......................................................................................................... 30
Four HDLC Channels and Four TSAs .............................................................................. 31
General Circuit Interface .................................................................................................. 31
Eight SmartDMATM Channels ........................................................................................... 31
Two Asynchronous Serial Ports ....................................................................................... 31
Synchronous Serial Port................................................................................................... 32
System Peripherals ............................................................................................................... 32
Interrupt Controller ........................................................................................................... 32
Four General-Purpose DMA Channels ............................................................................ 32
48 Programmable I/O Signals .......................................................................................... 32
Three Programmable Timers ........................................................................................... 32
Hardware Watchdog Timer .............................................................................................. 33
Memory and Peripheral Interface .......................................................................................... 33
System Interfaces............................................................................................................. 33
DRAM Support ................................................................................................................. 34
Chip Selects ..................................................................................................................... 34
Clock Control ......................................................................................................................... 35
In-Circuit Emulator Support ................................................................................................... 37
Applications ............................................................................................................................... 37
Clock Generation and Control ................................................................................................... 40
Features ................................................................................................................................ 40
System Clock ........................................................................................................................ 40
USB Clock ............................................................................................................................. 40
Clock Sharing by System and USB ....................................................................................... 41
Crystal-Driven Clock Source ................................................................................................. 42
External Clock Source ........................................................................................................... 43
Static Operation .................................................................................................................... 43
PLL Bypass Mode ................................................................................................................. 43
UART Baud Clock ................................................................................................................. 43
Power Supply Operation ............................................................................................................ 44
Power Supply Connections ................................................................................................... 44
Input/Output Circuitry ............................................................................................................ 44
PIO Supply Current Limit ...................................................................................................... 44
Absolute Maximum Ratings ....................................................................................................... 45
Operating Ranges ...................................................................................................................... 45
Driver Characteristics--Universal Serial Bus ............................................................................ 45
DC Characteristics over Commercial and Industrial Operating Ranges .................................... 46
Capacitance ............................................................................................................................... 46
4
Am186TMCC Communications Controller Data Sheet
Maximum Load Derating ............................................................................................................ 47
Power Supply Current ................................................................................................................ 47
Thermal Characteristics ............................................................................................................. 48
PQFP Package ..................................................................................................................... 48
Commercial and Industrial Switching Characteristics and Waveforms ...................................... 49
Switching Characteristics over Commercial and Industrial Operating Ranges ......................................58
Appendix A--Pin Tables ............................................................................................................ A-1
Pin List Table Column Definitions ...................................................................................... A-11
Appendix B--Physical Dimensions: PQR160, Plastic Quad Flat Pack (PQFP) ........................ B-1
Appendix C--Customer Support ...............................................................................................C-1
Related AMD Products--E86TM Family Devices ..................................................................C-1
Related Documents ..............................................................................................................C-2
Am186CC/CH/CU Microcontroller Customer Development Platform ..................................C-2
Third-Party Development Support Products .................................................................................C-2
Customer Service .................................................................................................................C-2
Hotline and World Wide Web Support............................................................................. C-2
Corporate Applications Hotline........................................................................................ C-2
World Wide Web Home Page ......................................................................................... C-3
Documentation and Literature ......................................................................................... C-3
Literature Ordering .......................................................................................................... C-3
Index ................................................................................................................................... Index-1
LIST OF FIGURES
Figure 1.
Am186CC Controller Block Diagram ..................................................................... 28
Figure 2.
Two-Component Address Example ...................................................................... 30
Figure 3.
Am186CC Controller Address Bus -- Default Operation ...................................... 35
Figure 4.
Am186CC Controller--Address Bus Disable In Effect .......................................... 36
Figure 5.
ISDN Terminal Adapter System Application ......................................................... 38
Figure 6.
ISDN to Ethernet Low-End Router System Application ........................................ 38
Figure 7.
32-Channel Linecard System Application ............................................................. 39
Figure 8.
System and USB Clock Generation ...................................................................... 41
Figure 9.
Suggested System Clock Frequencies, Clock Modes, and Crystal Frequencies . 42
Figure 10.
External Interface to Support Clocks--Fundamental Mode Crystal ...................... 42
Figure 11.
External Interface to Support Clocks--External Clock Source ............................. 43
Figure 12.
UART and High-Speed UART Clocks ................................................................... 43
Figure 13.
Typical I
cc
Versus Frequency ................................................................................ 47
Figure 14.
Thermal Resistance(
C/Watt) ............................................................................... 48
Figure 15.
Thermal Characteristics Equations ....................................................................... 48
Figure 16.
Key to Switching Waveforms ................................................................................ 49
Figure 17.
Read Cycle Waveforms ........................................................................................ 60
Figure 18.
Write Cycle Waveforms ......................................................................................... 63
Figure 19.
Software Halt Cycle Waveforms ........................................................................... 64
Figure 20.
Peripheral Timing Waveforms ............................................................................... 65
Figure 21.
Reset Waveforms .................................................................................................. 66
Figure 22.
Signals Related to Reset (System PLL in 1x or 2x Mode) .................................... 67
Figure 23.
Signals Related to Reset (System PLL in 4x Mode) ............................................. 67
Figure 24.
Synchronous Ready Waveforms ........................................................................... 68
Figure 25.
Asynchronous Ready Waveforms ......................................................................... 69
Figure 26.
Entering Bus Hold Waveforms .............................................................................. 70
Figure 27.
Exiting Bus Hold Waveforms ................................................................................. 70
Figure 28.
System Clock Timing Waveforms--Active Mode (PLL 1x Mode) ......................... 72
Figure 29.
USB Clock Timing Waveforms .............................................................................. 72
Figure 30.
GCI Bus Waveforms ............................................................................................. 73
Am186TMCC Communications Controller Data Sheet
5
Figure 31.
PCM Highway Waveforms (Timing Slave) ............................................................ 75
Figure 32.
PCM Highway Waveforms (Timing Master) .......................................................... 76
Figure 33.
DCE Transmit Waveforms .................................................................................... 77
Figure 34.
DCE Receive Waveforms ..................................................................................... 77
Figure 35.
USB Data Signal Rise and Fall Times .................................................................. 78
Figure 36.
USB Receiver Jitter Tolerance .............................................................................. 78
Figure 37.
Synchronous Serial Interface Waveforms ............................................................. 79
Figure 38.
DRAM Read Cycle without Wait-States Waveform ............................................... 80
Figure 39.
DRAM Read Cycle with Wait-States Waveform .................................................... 81
Figure 40.
DRAM Write Cycle without Wait-States Waveform ............................................... 81
Figure 41.
DRAM Write Cycle with Wait-States Waveform .................................................... 82
Figure 42.
DRAM Refresh Cycle Waveform ........................................................................... 82
LIST OF TABLES
Table 1.
PQFP Pin Assignments--Sorted by Pin Number .................................................. 10
Table 2.
PQFP Pin Assignments--Sorted by Signal Name ................................................ 11
Table 3.
Signal Description Table Definitions ...................................................................... 13
Table 4.
Signal Descriptions ............................................................................................... 14
Table 5.
Segment Register Selection Rules ....................................................................... 30
Table 6.
Crystal Parameters ................................................................................................ 42
Table 7.
Typical Power Consumption Calculation................................................................ 47
Table 8.
Thermal Characteristics (
C/Watt) ........................................................................ 48
Table 9.
Alphabetical Key to Switching Parameter Symbols .............................................. 50
Table 10.
Numerical Key to Switching Parameter Symbols .................................................. 54
Table 11.
Read Cycle Timing ................................................................................................ 58
Table 12.
Write Cycle Timing ................................................................................................ 61
Table 13.
Software Halt Cycle Timing ................................................................................... 64
Table 14.
Peripheral Timing .................................................................................................. 65
Table 15.
Reset Timing ......................................................................................................... 66
Table 16.
External Ready Cycle Timing ................................................................................ 68
Table 17.
Bus Hold Timing .................................................................................................... 69
Table 18.
System Clocks Timing ........................................................................................... 71
Table 19.
USB Clocks Timing ............................................................................................... 72
Table 20.
GCI Bus Timing ..................................................................................................... 73
Table 21.
PCM Highway Timing (Timing Slave) ................................................................... 74
Table 22.
PCM Highway Timing (Timing Master) ................................................................. 76
Table 23.
DCE Interface Timing ............................................................................................ 77
Table 24.
USB Timing ........................................................................................................... 78
Table 25.
SSI Timing ............................................................................................................. 79
Table 26.
DRAM Timing ........................................................................................................ 80
Table 27.
Power-On Reset (POR) Pin Defaults ................................................................... A-2
Table 28.
Multiplexed Signal Trade-offs ............................................................................... A-5
Table 29.
PIOs Sorted by PIO Number ................................................................................ A-8
Table 30.
PIOs Sorted by Signal Name ............................................................................... A-9
Table 31.
Reset Configuration Pins (Pinstraps) ................................................................. A-10
Table 32.
CPU PLL Modes ................................................................................................. A-10
Table 33.
USB PLL Modes.................................................................................................. A-10
Table 34.
Pin List Table Definitions..................................................................................... A-11
Table 35.
Pin List Summary ............................................................................................... A-12
PDF 
ZIP