Copyright 2000 Advanced Micro Devices, Inc. All rights reserved
Publication# 22024
Rev: B Amendment/0
Issue Date: May 2000
Am186
TM
CH
High-Performance, 80C186-Compatible
16-Bit Embedded HDLC Microcontroller
DISTINCTIVE CHARACTERISTICS
s
E86TM family of x86 embedded processors
offers improved time-to-market
Software migration (backwards- and upwards-
compatible)
World-class development tools, applications, and
system software
s
Serial Communications Peripherals
Two High-level Data Link Control (HDLC) channels
Two independent Time Slot Assigners (TSAs)
Physical interface for HDLC channels can be raw
DCE or PCM Highway
High-Speed UART with autobaud
UART
Synchronous serial interface (SSI)
SmartDMATM channels (4) to support HDLC
s
System Peripherals
Three programmable 16-bit timers
Hardware watchdog timer
General-purpose DMA (4 channels)
Programmable I/O (48 PIO signals)
Interrupt Controller (36 maskable interrupts)
s
Memory and Peripheral Interface
Integrated DRAM controller
Glueless interface to RAM/ROM/Flash memory
(55-ns Flash memory required for zero-wait-state
operation at 50 MHz)
Fourteen chip selects (8 peripherals, 6 memory)
External bus mastering support
Multiplexed and nonmultiplexed address/data bus
Programmable bus sizing
8-bit boot option
s
Available in the following package:
160-pin plastic quad flat pack (PQFP)
25-, 40-, and 50-MHz operating frequencies
Low-voltage operation, V
CC
= 3.3 V 0.3 V
Commercial and industrial temperature rating
5-V-tolerant I/O (3.3-V output levels)
GENERAL DESCRIPTION
The Am186TMCH HDLC microcontroller is a member of
AMD's Comm86TM family of communications-specific
microcontrollers. The microcontroller is a derivative of
the Am186CC communications controller and is pin-
compatible with that device.
The Am186CH HDLC microcontroller is a cost-
effective, high-performance microcontroller solution for
communications applications. This highly integrated
microcontroller enables customers to save system
c o s t s a n d i n c r e a s e p e r f o r m a n c e o v e r 8 - b i t
microcontrollers and other 16-bit microcontrollers.
The microcontroller offers the advantages of the x86
development environment's widely available native
development tools, applications, and system software.
Additionally, the microcontroller uses the industry-
standard 186 instruction set that is part of the AMD
E86TM family, which continually offers instruction-set-
compatible upgrades. Built into the Am186CH HDLC
microcontroller is a wide range of communications
f e a t u r e s r e q u i r e d i n m a n y c o m m u n i c a t i o n s
applications, including High-level Data Link Control
(HDLC).
Comprehensive development support is available from
AMD and its FusionE86
SM
par tners. A customer
development platform board is available. AMD and its
FusionE86 partners also offer boards, schematics,
drivers, protocol stacks, and routing software to enable
fast time to market.
2
Am186TMCH HDLC Microcontroller Data Sheet
ORDERING INFORMATION
25 = 25 MHz
40 = 40 MHz
50 = 50 MHz
TEMPERATURE RANGE
SPEED OPTION
DEVICE NUMBER/DESCRIPTION
LEAD FORMING
\W=Trimmed and Formed
Valid combinations list configurations planned to be
supported in volume for this device. Consult the
local AMD sales office to confirm availability of
specific valid combinations and to check on newly
released combinations.
Valid Combinations
PACKAGE TYPE
K=160-Pin Plastic Quad Flat Pack (PQFP)
Am186CH high-performance 80C186-compatible
16-bit embedded HDLC microcontroller
50
K
C
\W
Valid Combinations
Am186CH25
Am186CH40
Am186CH50
KC\W
Am186CH25
Am186CH40
KI\W
Am186CH
C= Am186CH Commercial (T
C
=0
C to +100
C)
I = Am186CH Industrial (T
A
=40
C to +85
C)
where: T
C
= case temperature
where: T
A
= ambient temperature
Am186TMCH HDLC Microcontroller Data Sheet
3
TABLE OF CONTENTS
Distinctive Characteristics ............................................................................................................ 1
General Description ..................................................................................................................... 1
Ordering Information .................................................................................................................... 2
Table of Contents ........................................................................................................................ 3
List of Figures .............................................................................................................................. 4
List of Tables ............................................................................................................................... 5
Logic Diagram By Interface ......................................................................................................... 6
Logic Diagram By Default Pin Function ....................................................................................... 7
Pin Connection Diagram--160-Pin PQFP Package .................................................................... 8
Pin and Signal Tables .................................................................................................................. 9
Signal Descriptions ............................................................................................................... 12
Architectural Overview ............................................................................................................... 24
Detailed Description .............................................................................................................. 24
Am186TM Embedded CPU .................................................................................................... 25
Memory Organization ............................................................................................................ 25
I/O Space .............................................................................................................................. 25
Serial Communications Support ............................................................................................ 26
Two HDLC Channels and Two TSAs ............................................................................... 26
Four SmartDMATM Channels............................................................................................ 26
Two Asynchronous Serial Ports ....................................................................................... 26
Synchronous Serial Port................................................................................................... 27
System Peripherals ............................................................................................................... 27
Interrupt Controller ........................................................................................................... 27
Four General-Purpose DMA Channels ............................................................................ 27
48 Programmable I/O Signals .......................................................................................... 27
Three Programmable Timers ........................................................................................... 27
Hardware Watchdog Timer .............................................................................................. 28
Memory and Peripheral Interface .......................................................................................... 28
System Interfaces............................................................................................................. 28
DRAM Support ................................................................................................................. 30
Chip Selects ..................................................................................................................... 30
Clock Control ......................................................................................................................... 31
In-Circuit Emulator Support ................................................................................................... 31
Applications ............................................................................................................................... 31
Clock Generation and Control ................................................................................................... 33
Features ................................................................................................................................ 33
System Clock ........................................................................................................................ 33
Crystal-Driven Clock Source ................................................................................................. 34
External Clock Source ........................................................................................................... 35
Static Operation .................................................................................................................... 35
PLL Bypass Mode ................................................................................................................. 35
UART Baud Clock ................................................................................................................. 35
Power Supply Operation ............................................................................................................ 36
Power Supply Connections ................................................................................................... 36
Input/Output Circuitry ............................................................................................................ 36
PIO Supply Current Limit ...................................................................................................... 36
Absolute Maximum Ratings ....................................................................................................... 37
Operating Ranges ...................................................................................................................... 37
DC Characteristics over Commercial and Industrial Operating Ranges .................................... 37
Maximum Load Derating ............................................................................................................ 38
Capacitance ............................................................................................................................... 38
Power Supply Current ................................................................................................................ 38
4
Am186TMCH HDLC Microcontroller Data Sheet
Thermal Characteristics--PQFP Package ................................................................................ 39
Commercial and Industrial Switching Characteristics and Waveforms ...................................... 40
Switching Characteristics over Commercial and Industrial Operating Ranges ......................................47
Appendix A--Pin Tables ............................................................................................................ A-1
CPU PLL Modes.............................................................................................................. A-7
Pin List Table Column Definitions ...................................................................................... A-10
Appendix B--Physical Dimensions: PQR160, Plastic Quad Flat Pack (PQFP) ........................ B-1
Appendix C--Customer Support ...............................................................................................C-1
Related AMD Products--E86TM Family Devices ..................................................................C-1
Related Documents ..............................................................................................................C-2
Am186CC/CH/CU Microcontroller Customer Development Platform ..................................C-2
Third-Party Development Support Products .................................................................................C-2
Customer Service .................................................................................................................C-2
Hotline and World Wide Web Support............................................................................. C-2
Corporate Applications Hotline........................................................................................ C-2
World Wide Web Home Page ......................................................................................... C-3
Documentation and Literature ......................................................................................... C-3
Literature Ordering .......................................................................................................... C-3
Index ................................................................................................................................... Index-1
LIST OF FIGURES
Figure 1.
Am186CH Microcontroller Block Diagram ............................................................. 24
Figure 2.
Two-Component Address Example ...................................................................... 25
Figure 3.
Am186CH Microcontroller Address Bus -- Default Operation .............................. 29
Figure 4.
Am186CH Microcontroller--Address Bus Disable In Effect .................................. 29
Figure 5.
32-Channel Linecard System Application ............................................................. 32
Figure 6.
System Clock Generation ..................................................................................... 33
Figure 7.
Suggested System Clock Frequencies, Clock Modes, and Crystal Frequencies . 34
Figure 8.
External Interface to Support Clocks--Fundamental Mode Crystal ...................... 34
Figure 9.
External Interface to Support Clocks--External Clock Source ............................. 35
Figure 10.
UART and High-Speed UART Clocks ................................................................... 35
Figure 11.
Typical I
cc
Versus Frequency ................................................................................ 38
Figure 12.
Thermal Resistance(
C/Watt) ............................................................................... 39
Figure 13.
Thermal Characteristics Equations ....................................................................... 39
Figure 14.
Key to Switching Waveforms ................................................................................ 40
Figure 15.
Read Cycle Waveforms ........................................................................................ 49
Figure 16.
Write Cycle Waveforms ......................................................................................... 52
Figure 17.
Software Halt Cycle Waveforms ........................................................................... 53
Figure 18.
Peripheral Timing Waveforms ............................................................................... 54
Figure 19.
Reset Waveforms .................................................................................................. 55
Figure 20.
Signals Related to Reset (System PLL in 1x or 2x Mode) .................................... 56
Figure 21.
Signals Related to Reset (System PLL in 4x Mode) ............................................. 56
Figure 22.
Synchronous Ready Waveforms ........................................................................... 57
Figure 23.
Asynchronous Ready Waveforms ......................................................................... 58
Figure 24.
Entering Bus Hold Waveforms .............................................................................. 59
Figure 25.
Exiting Bus Hold Waveforms ................................................................................. 60
Figure 26.
System Clocks Waveforms--Active Mode (PLL 1x Mode) ................................... 62
Figure 27.
PCM Highway Waveforms (Timing Slave) ............................................................ 63
Figure 28.
PCM Highway Waveforms (Timing Master) .......................................................... 64
Figure 29.
DCE Transmit Waveforms .................................................................................... 65
Figure 30.
DCE Receive Waveforms ..................................................................................... 65
Figure 31.
SSI Waveforms ..................................................................................................... 66
Figure 32.
DRAM Read Cycle without Wait States Waveform ............................................... 68
Am186TMCH HDLC Microcontroller Data Sheet
5
Figure 33.
DRAM Read Cycle with Wait States Waveform .................................................... 68
Figure 34.
DRAM Write Cycle without Wait States Waveform ............................................... 69
Figure 35.
DRAM Write Cycle with Wait States Waveform .................................................... 69
Figure 36.
DRAM Refresh Cycle Waveform ........................................................................... 70
LIST OF TABLES
Table 1.
PQFP Pin Assignments--Sorted by Pin Number .................................................. 10
Table 2.
PQFP Pin Assignments--Sorted by Signal Name ................................................ 11
Table 3.
Signal Descriptions Table Definitions..................................................................... 12
Table 4.
Signal Descriptions ............................................................................................... 13
Table 5.
Segment Register Selection Rules ....................................................................... 26
Table 6.
Crystal Parameters ................................................................................................ 34
Table 7.
Typical Power Consumption Calculation................................................................ 38
Table 8.
Thermal Characteristics (
C/Watt) ........................................................................ 39
Table 9.
Alphabetical Key to Switching Parameter Symbols .............................................. 41
Table 10.
Numerical Key to Switching Parameter Symbols .................................................. 44
Table 11.
Read Cycle Timing ................................................................................................ 47
Table 12.
Write Cycle Timing ................................................................................................ 50
Table 13.
Software Halt Cycle Timing ................................................................................... 53
Table 14.
Peripheral Timing ................................................................................................. 54
Table 15.
Reset Timing ......................................................................................................... 55
Table 16.
External Ready Cycle Timing ................................................................................ 57
Table 17.
Bus Hold Timing .................................................................................................... 59
Table 18.
System Clocks Timing ........................................................................................... 61
Table 19.
PCM Highway Timing (Timing Slave) .................................................................. 62
Table 20.
PCM Highway Timing (Timing Master) ................................................................. 64
Table 21.
DCE Interface Timing ........................................................................................... 65
Table 22.
SSI Timing ............................................................................................................. 66
Table 23.
DRAM Timing ........................................................................................................ 67
Table 24.
Power-On Reset (POR) Pin Defaults ................................................................... A-2
Table 25.
Multiplexed Signal Trade-Offs .............................................................................. A-5
Table 26.
Reset Configuration Pins (Pinstraps) ................................................................... A-7
Table 27.
PIOs Sorted by PIO Number ................................................................................ A-8
Table 28.
PIOs Sorted by Signal Name ............................................................................... A-9
Table 29.
Pin List Table Definitions..................................................................................... A-10
Table 30.
Pin List Summary ............................................................................................... A-11
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