Publication# 11419

Rev. D

Amendment /0

Issue Date: May 1995

2-10

Advanced

Micro

Devices

Am27C64

64 Kilobit (8,192 x 8-Bit) CMOS EPROM

FINAL

DISTINCTIVE CHARACTERISTICS

Fast access time

-- 45 ns

Low power consumption

-- 20

A typical CMOS standby current

JEDEC-approved pinout

Single +5 V power supply

10% power supply tolerance available

100% Flashrite

programming

-- Typical programming time of 1 second

Latch-up protected to 100 mA from 1 V to
V

+ 1 V

High noise immunity

Versatile features for simple interfacing

-- Both CMOS and TTL input/output

compatibility

-- Two line control functions

Standard 28-pin DIP, PDIP, and 32-pin PLCC
packages

GENERAL DESCRIPTION

The Am27C64 is a 64-Kbit ultraviolet erasable program-
mable read-only memory. It is organized as 8K words by
8 bits per word, operates from a single +5 V supply, has
a static standby mode, and features fast single address
location programming. Products are available in win-
dowed ceramic DIP packages as well as plastic one
time programmable (OTP) PDIP, and PLCC packages.

Typically, any byte can be accessed in less than 45 ns,
allowing operation with high-performance microproces-
sors without any WAIT states. The Am27C64 offers
separate Output Enable (

) and Chip Enable (

)

controls, thus eliminating bus contention in a multiple
bus microprocessor system.

AMD's CMOS process technology provides high speed,
low power, and high noise immunity. Typical power con-
sumption is only 80 mW in active mode, and 100

W in

standby mode.

All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in blocks,
or at random. The Am27C64 supports AMD's Flashrite
programming algorithm (100

s pulses) resulting in a

typical programming time of 1 second.

BLOCK DIAGRAM

Output Enable

Chip Enable

and

Prog Logic

Decoder

Output

Buffers

Gating

65,538

Bit Cell

Matrix

A0A12

Address

Inputs

Data Outputs

DQ0DQ7

11419D-1

PGM

AMD

2-11

Am27C64

PRODUCT SELECTOR GUIDE

Family Part No.

Am27C64

Ordering Part No:

-255

10%

-45

-55

-70

-90

-120

-150

-200

Max Access Time (ns)

120

150

200

250

(

) Access Time (ns)

120

150

200

250

(

) Access Time (ns)

CONNECTION DIAGRAMS

Top View

DIP

Notes:

1. JEDEC nomenclature is in parentheses.

PLCC

A11

A12

PGM

(

)

DQ7

DQ2

DQ1

DQ0

(

)

A10

(

)

DQ6

DQ5

DQ4

DQ3

11419D-2

11419D-3

31 30

17 18 19 20

DQ0

A11

(

)

A10

(

)

DQ7

A12

PGM (

)

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

LOGIC SYMBOL

PIN DESIGNATIONS

A0A12

Address Inputs

(

)

Chip Enable

DQ0DQ7

Data Inputs/Outputs

(

)

Output Enable Input

PGM

(

)

Program Enable Input

Supply Voltage

Program Voltage Input

Ground

No Internal Connection

No External Connection (Don't Use)

11419D-4

(

)

(

)

DQ0DQ7

A0A12

PGM

(

)

AMD

2-12

Am27C64

ORDERING INFORMATION

UV EPROM Products

Valid Combinations list configurations planned to be
supported in volume for this device. Consult the lo-
cal AMD sales office to confirm availability of specific
valid combinations and to check on newly released
combinations.

DEVICE NUMBER
Am27C64
64 Kilobit (8,192 x 8-Bit) CMOS UV EPROM

PACKAGE TYPE
D = 28-Pin Ceramic DIP (CDV028)

Valid Combinations

AMD Standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of:

Valid Combinations

-45

AM27C64

OPTIONAL PROCESSING
Blank = Standard Processing

B = Burn-in

TEMPERATURE RANGE
C = Commercial (0

C to +70

= Industrial (40

C to +85

E = Extended Commercial (55

C to +125

SPEED OPTION
See Product Selector Guide and Valid Combinations

AM27C64-55

AM27C64-70

DC, DCB, DI, DIB

AM27C64-90

AM27C64-120

AM27C64-150

AM27C64-200

AM27C64-255

DC, DCB, DI,

DIB, DE, DEB

AM27C64-45

DC, DCB, DI, DIB

AMD

2-13

Am27C64

ORDERING INFORMATION

OTP Products

DEVICE NUMBER
Am27C64
64 Kilobit (8,192 x 8-Bit) CMOS OTP EPROM

Valid Combinations

AM27C64-90

AM27C64-120

AM27C64-150

AM27C64-200

AM27C64-255

PACKAGE TYPE
P = 28-Pin Plastic DIP (PD 028)
J = 32-Pin Rectangular Plastic Leaded Chip

Carrier (PL 032)

AMD Standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of:

-55

AM27C64

OPTIONAL PROCESSING
Blank = Standard Processing

TEMPERATURE RANGE
C = Commercial (0

C to +70

= Industrial (40

C to + 85

E = Extended Commercial (55

C to +125

SPEED OPTION
See Product Selector Guide and Valid Combinations

JC, PC,

JI, PI

AM27C64-70

AM27C64-55

Valid Combinations

AMD

2-14

Am27C64

FUNCTIONAL DESCRIPTION

Erasing the Am27C64

In order to clear all locations of their programmed con-
tents, it is necessary to expose the Am27C64 to an
ultraviolet light source. A dosage of 15 W seconds/cm

required to completely erase an Am27C64. This dosage
can be obtained by exposure to an ultraviolet lamp--
wavelength of 2537 A

--with intensity of 12,000

W/cm

for 15 to 20 minutes. The Am27C64 should be directly
under and about one inch from the source and all filters
should be removed from the UV light source prior
to erasure.

It is important to note that the Am27C64 and similar
devices will erase with light sources having wavelengths
shorter than 4000 A

. Although erasure times will be

much longer than with UV sources at 2537 A

, exposure

to fluorescent light and sunlight will eventually erase the
Am27C64 and exposure to them should be prevented to
realize maximum system reliability. If used in such an
environment, the package window should be covered
by an opaque label or substance.

Programming the Am27C64

Upon delivery or after each erasure the Am27C64
has all 65,536 bits in the "ONE" or HIGH state. "ZEROs"
are loaded into the Am27C64 through the procedure
of programming.

The programming mode is entered when 12.75 V

0.25 V is applied to the V

pin,

is at V

and

PGM

at V

For programming, the data to be programmed is applied
8 bits in parallel to the data output pins.

The Flashrite algorithm reduces programming time by
using 100

s programming pulses and by giving each

address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If
the data does not verify, additional pulses are given until
it verifies or the maximum is reached. This process is
repeated while sequencing through each address of the
Am27C64. This part of the algorithm is done at
V

= 6.25 V to assure that each EPROM bit is pro-

grammed to a sufficiently high threshold voltage. After
the final address is completed, the entire EPROM mem-
ory is verified at V

= V

= 5.25 V.

Please refer to Section 6 for programming flow chart
and characteristics.

Program Inhibit

Programming of multiple Am27C64 in parallel with dif-
ferent data is also easily accomplished. Except for

all like inputs of the parallel Am27C64 may be common.
A TTL low-level program pulse applied to an Am27C64

PGM

input with V

= 12.75 V

0.25 V and

Low will

program that Am27C64. A high-level

input inhibits

the other Am27C64 devices from being programmed.

Program Verify

A verify should be performed on the programmed bits to
determine that they were correctly programmed. The
verify should be performed with

and

at V

PGM

at V

IH,

and V

between 12.5 V and 13.0 V.

Auto Select Mode

The auto select mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and type. This mode is intended for use by programming
equipment for the purpose of automatically matching
the device to be programmed with its corresponding
programming algorithm. This mode is functional in the
25

C ambient temperature range that is required

when programming the Am27C64.

To activate this mode, the programming equipment
must force 12.0 V

0.5 V on address line A9 of the

Am27C64. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
V

to V

. All other address lines must be held at V

dur-

ing auto select mode.

Byte 0 (A

= V

) represents the manufacturer code, and

byte 1 (A

= V

), the device code. For the Am27C64,

these two identifier bytes are given in the Mode Select
Table. All identifiers for manufacturer and device codes
will possess odd parity, with the MSB (DQ7) defined as
the parity bit.

Read Mode

The Am27C64 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (

) is the power control and

should be used for device selection. Output Enable (

)

is the output control and should be used to gate data to
the output pins, independent of device selection. As-
suming that addresses are stable, address access time
(t

ACC

) is equal to the delay from

to output (t

). Data

is available at the outputs t

after the falling edge of

, assuming that

has been LOW and addresses

have been stable for at least t

ACC

Standby Mode

The Am27C64 has a CMOS standby mode which re-
duces the maximum V

current to 100

A. It is placed in

CMOS-standby when

is at V

0.3 V. The

Am27C64 also has a TTL-standby mode which reduces
the maximum V

current to 1.0 mA. It is placed in

TTL-standby when

is at V

. When in standby mode,

the outputs are in a high-impedance state, independent
of the

input.

AMD

2-15

Am27C64

Output OR-Tieing

To accommodate multiple memory connections, a two-
line control function is provided to allow for:

Low memory power dissipation

Assurance that output bus contention will not occur

It is recommended that

be decoded and used as the

primary device-selecting function, while

be made a

common connection to all devices in the array and con-
nected to the READ line from the system control bus.
This assures that all deselected memory devices are in
low-power standby mode and that the output pins are
only active when data is desired from a particular
memory device.

System Applications

During the switch between active and standby condi-
tions, transient current peaks are produced on the rising
and falling edges of Chip Enable. The magnitude of
these transient current peaks is dependent on the out-
put capacitance loading of the device. At a minimum, a
0.1-

F ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between
V

and V

to minimize transient effects. In addition, to

overcome the voltage drop caused by the inductive ef-
fects of the printed circuit board traces on EPROM ar-
rays, a 4.7-

F bulk electrolytic capacitor should be used

between V

and V

for each eight devices. The loca-

tion of the capacitor should be close to where the power
supply is connected to the array.

MODE SELECT TABLE

PGM

Outputs

Read

OUT

Output Disable

High-Z

Standby (TTL)

High-Z

Standby (CMOS)

0.3 V

High-Z

Program

Program Verify

OUT

Program Inhibit

High-Z

Manufacturer
Code

01H

Device Code

15H

Auto Select

(Note 3)

Mode

Pins

Notes:

1. V

= 12.0 V

0.5 V

2. X = Either V

or V

3. A1A8 = A10A12

= V

4. See DC Programming Characteristics for V

voltage during programming.

AMD

2-16

Am27C64

ABSOLUTE MAXIMUM RATINGS

Storage Temperature

OTP Products

C to +125

. . . . . . . . . . . . . . .

All Other Products

C to +150

. . . . . . . . . . . .

Ambient Temperature
with Power Applied

C to +125

. . . . . . . . . . . . .

Voltage with Respect To V

All pins except A9,V

0.6 V to V

+ 0.5 V

and V

0.6 V to +13.5 V

. . . . . . . . . . . . . . . .

0.6 V to +7.0 V

. . . . . . . . . . . . . . . . . . . . . . .

Notes:
1. Minimum DC voltage on input or I/O pins is 0.5 V. During

transitions, the inputs may overshoot V

to 2.0 V for pe-

riods of up to 20 ns. Maximum DC voltage on input and I/O
pins is V

+ 0.5 V which may overshoot to V

+ 2.0 V for

periods up to 20 ns.

2. For A9 and V

the minimum DC input is 0.5 V. During

transitions, A9 and V

may overshoot V

to 2.0 V for

periods of up to 20 ns. A9 and V

must not exceed 13.5 V

for any period of time.

Stresses above those listed under "Absolute Maximum Rat-
ings" may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these
or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure of
the device to absolute maximum rating conditions for ex-
tended periods may affect device reliability.

OPERATING RANGES

Commercial (C) Devices

Ambient Temperature (T

)

C to +70

. . . . . . .

Industrial (I) Devices

Ambient Temperature (T

)

C to +85

. . . . .

Extended Commercial (E) Devices

Ambient Temperature (T

)

C to +125

. . . .

Supply Read Voltages

for Am27C64-XX5

+4.75 V to +5.25 V

. . . . . .

for Am27C64-XX0

+4.50 V to +5.50 V

. . . . . .

Operating ranges define those limits between which the func-
tionality of the device is guaranteed.

AMD

2-17

Am27C64

DC CHARACTERISTICS over operating range unless otherwise specified.
(Notes 1, 2, 3 and 4)

Parameter

Symbol

Parameter Description

Test Conditions

Min

Max

Unit

Output HIGH Voltage

= 400

2.4

Output LOW Voltage

= 2.1 mA

0.45

Input HIGH Voltage

2.0

+ 0.5

Input LOW Voltage

0.5

+0.8

Input Load Current

= 0 V to V

1.0

Output Leakage Current

OUT

= 0 V to V

C/I Devices

1.0

E Devices

5.0

CC1

Active Current

= V

, f = 10 MHz,

(Note 3)

OUT

= 0 mA

CC2

TTL Standby Current

= V

CC3

CMOS Standby Current

= V

0.3 V

100

PP1

Current During Read

= V

, V

= V

100

Notes:

1. V

must be applied simultaneously or before V

, and removed simultaneously or after V

2. Caution: The Am27C64 must not be removed from (or inserted into) a socket when V

or V

is applied.

3. I

CC1

is tested with

= V

to simulate open outputs.

4. Minimum DC Input Voltage is 0.5 V. During transitions, the inputs may overshoot to 2.0 V for periods less than 20 ns.

Maximum DC Voltage on output pins is V

+ 0.5 V, which may overshoot to V

+ 2.0 V for periods less than 20 ns.

75 50 25 0

75 100 125 150

Frequency in MHz

11419D-6

Supply Current

in mA

Supply Current

in mA

Temperature in

Figure 1. Typical Supply Current

vs. Frequency

= 5.5 V, T = 25

Figure 2. Typical Supply Current

vs. Temperature

= 5.5 V, f = 10 MHz

11419D-5

AMD

2-18

Am27C64

CAPACITANCE

Parameter

Test

Symbol

Parameter Description

Conditions

Typ

Max

Typ

Max

Typ

Max

Unit

Input Capacitance

= 0

OUT

Output Capacitance

OUT

= 0

Notes:

1. This parameter is only sampled and not 100% tested.

2. T

= +25

C, f = 1 MHz.

CDV028

PL 032

PD 028

SWITCHING CHARACTERISTICS over operating range unless otherwise specified
(Notes 1, 3 and 4)

Parameter

Test

JEDEC

Standard Description

Conditions

-45

-55

-70

-90

-120

-150

-200

-255

Unit

AVQV

ACC

Address to

Min

Output Delay

Max

120

150

200

250

ELQV

Chip Enable to

= V

Min

Output Delay

Max

120

150

200

250

GLQV

Output Enable to

= V

Min

Output Delay

Max

EHQZ

Min

GHQZ

(Note 2)

Max

AXQX

Output Hold from

Min

Addresses,

, or

Max

whichever occurred first

Parameter
Symbols

Am27C64

Notes:

1. V

must be applied simultaneously or before V

, and removed simultaneously or after V

2. This parameter is only sampled and not 100% tested.

3. Caution: The Am27C64 must not be removed from (or inserted into) a socket or board when V

or V

is applied.

4. For the -45, -55 and -70:

Output Load: 1 TTL gate and C

= 30 pF

Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0 V to 3 V
Timing Measurement Reference Level: 1.5 V for inputs and outputs

For all other versions:
Output Load: 1 TTL gate and C

= 100 pF

Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0.45 V to 2.4 V
Timing Measurement Reference Level: 0.8 V and 2 V inputs and outputs

Chip Enable HIGH or
Output Enable HIGH,
whichever comes
first, to Output Float

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