LP62S1664C Series

Preliminary

64K X 16 BIT LOW VOLTAGE CMOS SRAM

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Features General Description

Operating voltage: 2.7V to 3.6V

Access times: 55/70 ns (max.)

Current:

LP62S1664C-55 series: Operating: 50mA (max.)

Standby:

A (max.)

LP62S1664C-70 series: Operating: 40mA (max.)

Standby:

A (max.)

Extended operating temperature range : -40

C to 85

for -LLI series

Full static operation, no clock or refreshing required

All inputs and outputs are directly TTL-compatible

Common I/O using three-state output

Data retention voltage: 2V (min.)

Available in 44-pin TSOP and 48-ball Mini BGA (6X8)

packages.

The LP62S1664C is a low operating current 1,048,576-
bit static random access memory organized as 65,536
words by 16 bits and operates on low power supply
voltage from 2.7V to 3.6V. It is built using AMIC's high
performance CMOS process.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
The chip enable input is provided for POWER-DOWN,
device enable. Two byte enable inputs and an output
enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage
as low as 2V.

Product Family

Power Dissipation

Product

Family

Operating

Temperature

VCC

Range

Speed

Data Retention

CCDR

, Typ.)

Standby

SB1

, Typ.)

Operating

CC2

, Typ.)

Package

Type

LP62S1664C

-40

C ~ +85

C 2.7V~3.6V

55ns / 70ns

0.2

0.3

3mA

44L TSOP

48B MBGA

1. Typical values are measured at VCC = 3.0V, T

= 25

C and not 100% tested.

2. Data retention current VCC = 2.0V.

Pin Configuration

TSOP (Type II)

Mini BGA (6X8) Top View

A4
A3
A2
A1
A0

I/O

VCC

GND

I/O

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

A5
A6
A7
OE
HB
LB
I/O

I/O

VCC

GND

I/O

LP62S1664CV

17
18
19
20
21
22

A15
A14
A13
A12

NC
A8
A9
A10
A11
NC

I/O

VSS

I/O

VCC

I/O

VSS

I/O

A14

A15

I/O

A12

A13

I/O

A10

A11

LP62S1664CU

LP62S1664C Series

PRELIMINARY (February

, 2002, Version 0.0)

AMIC Technology, Inc.

Pin Description - TSOP

Pin No.

Symbol

Description

1 - 5, 18 - 21,

24 - 27,42 - 44

A0 - A15

Address Inputs

Chip Enable Input

7 - 10, 13 - 16,

29 - 32, 35 - 38

I/O

- I/O

Data Input/Outputs

Write Enable Input

Byte Enable Input (I/O

to I/O

)

Byte Enable Input (I/O

to I/O

)

Output Enable Input

11, 33

VCC

Power

12, 34

GND

Ground

22 , 23, 28

No Connection

Recommended DC Operating Conditions

= -25

C to + 85

C for LLT or -40

C to 85

C for -LLI)

Symbol

Parameter

Min.

Typ.

Max.

Unit

VCC

Supply Voltage

2.7

3.0

3.6

GND

Ground

Input High Voltage

2.2

VCC + 0.3

Input Low Voltage

-0.3

+0.6

Output Load

TTL

Output Load

LP62S1664C Series

PRELIMINARY (February

, 2002, Version 0.0)

AMIC Technology, Inc.

Absolute Maximum Ratings*

VCC to GND . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
IN, IN/OUT Volt to GND . . . . . . . . -0.5V to VCC + 0.5V
Operating Temperature, Topr . . . . . . . . -40

C to +85

Storage Temperature, Tstg . . . . . . . . . -55

C to +125

Power Dissipation, P

. . . . . . . . . . . . . . . . . . . . . 0.7W

Soldering Temp. & Time . . . . . . . . . . . . 260

C, 10 sec

*Comments

Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied or intended. Exposure to the absolute
maximum rating conditions for extended periods may
affect device reliability.

DC Electrical Characteristics

= -25

C to + 85

C for -LLT or -40

C to + 85

C for -LLI, VCC = 2.7V to 3.6V, GND = 0V)

LP62S1664C-55LLT/LLI LP62S1664C-70LLT/LLI

Symbol

Parameter

Min.

Max.

Min.

Max.

Unit

Conditions

Input Leakage
Current

= GND to VCC

Output Leakage
Current

CE = V

or OE = V

LB = HB = V

WE = V

I/O

= GND to VCC

Active Power
Supply Current

CE = V

, I

I/O

= 0mA

CC1

Min. Cycle, Duty = 100%

CE = V

, I

I/O

= 0mA

CC2

Dynamic
Operating
Current

CE = V

, V

= VCC,

= 0V, f = 1MHz,

I/O

= 0 mA

0.3

CE = V

SB1

Standby Power
Supply Current

VCC - 0.2V

Output Low
Voltage

0.4

= 2.1mA

Output High
Voltage

2.2

= -1.0mA

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Truth Table

I/O

to I/O

Mode

I/O

to I/O

Mode

VCC Current

Not selected

SB1

, I

Read

CC1

, I

CC2

, I

Read

High - Z

CC1

, I

CC2

, I

High - Z

Read

CC1

, I

CC2

, I

Write

CC1

, I

CC2

, I

Write

Not Write/Hi - Z

CC1

, I

CC2

, I

Not Write/Hi - Z

Write

CC1

, I

CC2

, I

High - Z

CC1

, I

CC2

, I

High - Z

CC1

, I

CC2

, I

Not selected

SB1

, I

Note: X = H or L

Capacitance

= 25

C, f = 1.0MHz)

Symbol

Parameter

Min.

Max.

Unit

Conditions

Input Capacitance

= 0V

I/O

Input/Output Capacitance

I/O

= 0V

* These parameters are sampled and not 100% tested.

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

AC Characteristics

= -25

C to +85

C for -LLT or -40

C to +85

C for -LLI, VCC = 2.7V to 3.6V)

Symbol

Parameter

LP62S1664C-55LLT/LLI

LP62S1664C-70LLT/LLI

Unit

Min.

Max.

Min.

Max.

Read Cycle

Read Cycle Time

Address Access Time

ACE

Chip Enable Access Time

Byte Enable Access Time

Output Enable to Output Valid

CLZ

Chip Enable to Output in Low Z

BLZ

Byte Enable to Output in Low Z

OLZ

Output Enable to Output in Low Z

CHZ

Chip Disable to Output in High Z

BHZ

Byte Disable to Output in High Z

OHZ

Output Disable to Output in High Z

Output Hold from Address Change

Write Cycle

Write Cycle Time

Chip Enable to End of Write

Byte Enable to End of Write

Address Setup Time

Address Valid to End of Write

Write Pulse Width

Write Recovery Time

WHZ

Write to Output in High Z

Data to Write Time Overlap

Data Hold from Write Time

Output Active from End of Write

Note: t

CHZ

, t

BHZ

and t

OHZ

and t

WHZ

are defined as the time at which the outputs achieve the open circuit condition and are

not referred to output voltage levels.

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Timing Waveforms

Read Cycle 1

(1, 2, 4)

Address

OUT

Read Cycle 2

(1, 2, 3)

Address

ACE

CHZ5

HB, LB

BHZ5

CLZ5

BLZ5

OLZ5

OHZ5

OUT

Notes: 1. WE is high for Read Cycle.

2. Device is continuously enabled CE = V

, HB = V

and, or LB = V

3. Address valid prior to or coincident with CE and ( HB and, or LB ) transition low.

4. OE = V

5. Transition is measured

500mV from steady state. This parameter is sampled and not 100% tested.

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Timing Waveforms (continued)

Write Cycle 3
(Byte Enable Controlled)

Address

DATA IN

DATA OUT

HB, LB

WR3

BW2

AS1

WHZ4

Notes: 1. t

is measured from the address valid to the beginning of Write.

2. A Write occurs during the overlap (t

, t

) of a low CE , WE and ( HB and, or LB ).

3. t

is measured from the earliest of CE or WE or ( HB and, or LB ) going high to the end of the Write cycle.

4. OE level is high or low.

5. Transition is measured

500mV from steady state. This parameter is sampled and not 100% tested.

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

AC Test Conditions

Input Pulse Levels

0V to 2.4V

Input Rise And Fall Time

5 ns

Input and Output Timing Reference Levels

1.5V

Output Load

See Figures 1 and 2

30pF

* Including scope and jig.

TTL

5pF

TTL

Figure 1. Output Load

Figure 2. Output Load for t

CLZ

OLZ

CHZ

OHZ

WHZ

and t

Data Retention Characteristics

= -25

C to 85

C for LLT or -40

C to 85

C for -LLI)

Symbol

Parameter

Min.

Max.

Unit

Conditions

VCC for Data Retention

2.0

3.6

VCC - 0.2V

CCDR

Data Retention Current

VCC = 2.0V,

VCC - 0.2V

CDR

Chip Disable to Data Retention Time

Operation Recovery Time

See Retention Waveform

VCC Rise Time from Data Retention
Voltage to Operating Voltage

* LP62S1664C-55/70(LLT/LLI)

CCDR

: max. 1

A at T

= 0

C to + 40

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Low VCC Data Retention Waveform

VCC

CDR

2.7V

DATA RETENTION MODE

- 0.2V

Ordering Information

Part No.

Access Time (ns)

Operating Current

Max. (mA)

Standby Current

Max. (

µ
µ

Package

LP62S1664CV-55LLT

44L TSOP

LP62S1664CV-55LLI

44L TSOP

LP62S1664CU-55LLT

48B Mini BGA

LP62S1664CU-55LLI

48B Mini BGA

LP62S1664CV-70LLT

44L TSOP

LP62S1664CV-70LLI

44L TSOP

LP62S1664CU-70LLT

48B Mini BGA

LP62S1664CU-70LLI

48B Mini BGA

LLT : for -25

C ~ 85

LLI : for -40

C ~ 85

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Package Information

TSOP 44L (Type II) Outline Dimensions

unit: inches/mm

D y

Dimensions in inches

Dimensions in mm

Symbol

Min

Nom

Max

Min

Nom

Max

0.047

1.20

0.002

0.006

0.05

0.15

0.037

0.039

0.041

0.95

1.00

1.05

0.012

0.018

0.30

0.45

0.005

0.008

0.12

0.21

0.720

0.725

0.730

18.28

18.41

18.54

0.032 REF

0.805 REF

0.455

0.463

0.471

11.56

11.76

11.96

0.395

0.400

0.405

10.03

10.16

10.29

0.019

0.023

0.027

0.49

0.59

0.69

0.031 REF

0.80 REF

0.031 BSC

0.80 BSC

0.004

0.10

0°

5°

0°

5°

Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E

does not include resin fins.

3. Dimension ZD includes end flash.

LP62S1664C Series

PRELIMINARY

(February, 2002, Version 0.0)

AMIC Technology, Inc.

Package Information

Mini BGA 6X8 (48 BALLS) Outline Dimensions

unit : millimeter(mm)

Symbol

Min

Typ

Max

0.75

5.90

6.00

6.10

3.75

7.90

8.00

8.10

5.25

0.30

0.35

0.40

1.00

1.10

1.20

0.36

0.25

A
B
C
D

E
F
G
H

Bottom View

Pin A1 Index

Diameter D

Solder Ball

Top View

Pin A1 Index

0.10

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