03/2004
PRODUCT DESCRIPTION
ARA1400
Reverse Amplifier with Step Attenuator
Data Sheet - Rev 2.1
FEATURES
Low cost integrated monolothic GaAs amplifier
with step attenuator
Attenuation Range: 0-56 dB, adjustable in
4 dB increments via a 4 wire parallel control
Meets DOCSIS distortion requirements at
+60 dBmV output signal level
Low distortion and low noise
Frequency range: 5-100 MHz
5 Volt operation
0 to +85 C temperature range
APPLICATIONS
MCNS/DOCSIS Compliant Cable Modems
CATV Interactive Set-Top Box
Telephony over Cable Systems
OpenCable Set-Top Box
Residential Gateway
The ARA1400 is a GaAs IC designed to provide the
reverse path amplification and output level control
functions in a CATV Set-Top Box or Cable Modem. It
incorporates a digitally controlled precision step
attenuator that is preceded by an ultra low noise
amplifier stage, and followed by an ultra-linear
output driver amplifier. The device is capable of
meeting the MCNS/DOCSIS requirements for
harmonic performance at a +60dBmV output level
while requiring only a single polarity +5V supply.
Both the input and the output are single-ended and
matched to 75 Ohms, and a precision attenuator
provides up to 56 dB of attenuation in 4 dB
increments. The device is offered in a 28-pin SSOP
package featuring a heat slug on the bottom of the
package.
Figure 1: Cable Modem or Set Top Box Application Diagram
S12 Package
28 Pin SSOP with Heat Slug
Diplexer
ARA1400
SAW
Filter
Double-
Conversion
Tuner
MAC
Upstream
QPSK/16QAM
Modulator
QAM Receiver
with FEC
Balun
Transmit Enable/Disable
Attenuation Control
Microcontroller
with Ethernet
MAC
RAM
ROM
10Base-T
Transceiver
RJ45
Connector
Clock
Clock
Data
Data
54-860 MHz
44 MHz
5-42 MHz
4
LPF
2
Data Sheet - Rev 2.1
03/2004
ARA1400
Figure 2: Functional Block Diagram
Figure 3: Pinout
RF
OUT1
RF
IN2
ISET1
32 dB
16 dB
8 dB
4 dB
ISET2
RF
IN
ATT
IN
ATT
OUT
AMP
RF
OUT
AMP
56 dB 4 dB step digital attenuator section
Tx
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
I
SET1
ATT
OUT
ATT
ACG1
RF
IN2
V
REF1
RF
OUT1
ATT
IN
32 dB
V
ATT
16 dB
RF
IN
I
SET2
RF
OUT
Tx
V
A2
4 dB
N/C
8 dB
ATT
ACG1
ATT
ACG1
ATT
ACG1
V
REF2
ATT
ACG2
ATT
ACG2
ATT
ACG2
ATT
ACG2
ATT
ACG3
Data Sheet - Rev 2.1
03/2004
ARA1400
3
Table 1: Pin Description
Notes:
(1) All N/C pins should be grounded.
(2) Pins should be AC-coupled. No external DC bias should be applied.
(3) Pins should be AC-grounded. No external DC bias should be applied.
(4) Pins should be AC-coupled from the RF path, and should be pulled to ground through a resistor.
N
I
P
E
M
A
N
N
O
I
T
P
I
R
C
S
E
D
N
I
P
E
M
A
N
N
O
I
T
P
I
R
C
S
E
D
1
D
N
G
d
n
u
o
r
G
5
1
B
d
8
ti
B
l
o
r
t
n
o
C
n
o
it
u
n
e
tt
A
B
d
2
8
2
C
/
N
n
o
it
c
e
n
n
o
C
o
N
)
1
(
6
1
B
d
4
ti
B
l
o
r
t
n
o
C
n
o
it
u
n
e
tt
A
B
d
4
3
T
T
A
N
I
t
u
p
n
I
r
o
t
a
u
n
e
tt
A
)
2
(
7
1
V
2
A
y
l
p
p
u
S
2
A
r
e
if
il
p
m
A
4
F
R
1
T
U
O
d
n
a
t
u
p
t
u
O
1
A
r
e
if
il
p
m
A
y
l
p
p
u
S
8
1
V
2
F
E
R
r
o
f
e
g
a
tl
o
V
e
c
n
e
r
e
f
e
R
2
A
r
e
if
il
p
m
A
5
V
1
F
E
R
r
o
f
e
g
a
tl
o
V
e
c
n
e
r
e
f
e
R
1
A
r
e
if
il
p
m
A
9
1
F
R
T
U
O
h
c
ti
w
S
m
o
r
f
t
u
p
t
u
O
F
R
)
2
(
6
T
T
A
1
G
C
A
1
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
0
2
T
T
A
2
G
C
A
2
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
7
T
T
A
1
G
C
A
1
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
1
2
T
T
A
2
G
C
A
2
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
8
T
T
A
1
G
C
A
1
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
2
2
T
T
A
2
G
C
A
2
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
9
T
T
A
1
G
C
A
1
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
3
2
T
T
A
2
G
C
A
2
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
0
1
F
R
N
I
t
u
p
n
I
1
A
r
e
if
il
p
m
A
)
4
(
4
2
T
T
A
3
G
C
A
3
d
n
u
o
r
G
C
A
r
o
t
a
u
n
e
tt
A
)
3
(
1
1
I
1
T
E
S
t
s
u
j
d
A
t
n
e
r
r
u
C
1
A
r
e
if
il
p
m
A
5
2
x
T
l
o
r
t
n
o
C
h
c
ti
w
S
t
u
p
t
u
O
2
1
V
T
T
A
y
l
p
p
u
S
r
o
t
a
u
n
e
tt
A
6
2
F
R
2
N
I
t
u
p
n
I
2
A
r
e
if
il
p
m
A
)
4
(
3
1
B
d
2
3
ti
B
l
o
r
t
n
o
C
n
o
it
u
n
e
tt
A
B
d
2
3
7
2
I
2
T
E
S
t
s
u
j
d
A
t
n
e
r
r
u
C
2
A
r
e
if
il
p
m
A
4
1
B
d
6
1
ti
B
l
o
r
t
n
o
C
n
o
it
u
n
e
tt
A
B
d
6
1
8
2
T
T
A
T
U
O
t
u
p
t
u
O
r
o
t
a
u
n
e
tt
A
)
2
(
4
Data Sheet - Rev 2.1
03/2004
ARA1400
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure to absolute
ratings for extended periods of time may adversely affect reliability.
Notes:
1. Pins 3, 19, and 28 should be AC-coupled. No external DC bias should be applied.
2. Pins 11 and 27 should be grounded or pulled to ground through a resistor. No external
DC bias should be applied.
3. Pins 6, 7, 8, 9, 20, 21, 22, 23 and 24 should be AC-grounded. No external DC bias
should be applied.
4. Pins 10 and 26 should be AC-coupled from the RF path, and should be pulled to
ground through a resistor.
Table 3: Operating Ranges
The device may be operated safely over these conditions; however, parametric
performance is guaranteed only over the conditions defined in the electrical specifications.
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
V
:
y
l
p
p
u
S
r
e
if
il
p
m
A
DD
)
7
1
,
4
s
n
i
p
(
5
.
4
5
7
C
D
V
V
:
y
l
p
p
u
S
r
o
t
a
u
n
e
tt
A
ATTN
)
2
1
n
i
p
(
V
DD
5
.
0
-
5
7
C
D
V
)
6
1
,
5
1
,
4
1
,
3
1
s
n
i
p
(
s
l
o
r
t
n
o
C
r
o
t
a
u
n
e
tt
A
0
-
5
.
5
V
)
8
1
,
5
s
n
i
p
(
s
e
g
a
tl
o
V
e
c
n
e
r
e
f
e
R
r
e
if
il
p
m
A
-
5
7
.
1
-
C
D
V
)
5
2
n
i
p
(
l
o
r
t
n
o
C
h
c
ti
w
S
t
u
p
t
u
O
0
-
5
.
5
V
e
r
u
t
a
r
e
p
m
e
T
e
s
a
C
0
5
2
5
8
C
R
E
T
E
M
A
R
A
P
N
I
M
X
A
M
T
I
N
U
V
:
y
l
p
p
u
S
g
o
l
a
n
A
P
U
S
)
7
1
,
2
1
,
4
s
n
i
p
(
0
9
C
D
V
)
8
1
,
5
s
n
i
p
(
s
e
g
a
tl
o
V
e
c
n
e
r
e
f
e
R
r
e
if
il
p
m
A
5
.
2
-
V
SUP
2
C
D
V
F
R
s
t
u
p
n
I
r
e
if
il
p
m
A
t
a
r
e
w
o
P
s
n
i
p
(
6
2
,
0
1
)
-
0
6
+
V
m
B
d
)
6
1
,
5
1
,
4
1
,
3
1
s
n
i
p
(
s
l
o
r
t
n
o
C
r
o
t
a
u
n
e
tt
A
0
6
V
)
5
2
n
i
p
(
l
o
r
t
n
o
C
h
c
ti
w
S
t
u
p
t
u
O
0
6
V
e
r
u
t
a
r
e
p
m
e
T
e
g
a
r
o
t
S
5
5
-
0
0
2
+
C
e
r
u
t
a
r
e
p
m
e
T
g
n
ir
e
d
l
o
S
-
0
6
2
C
e
m
i
T
g
n
ir
e
d
l
o
S
-
5
c
e
S
Data Sheet - Rev 2.1
03/2004
ARA1400
5
Note: As measured in ANADIGICS test fixture.
Table 4: DC Electrical Specifications
(T
A
= 25 C; V
DD
,V
ATTN
= +5.0 VDC)
Table 5: AC Electrical Specifications
(T
A
= 25 C; V
DD
, V
ATTN
= +5.0 VDC; Tx = 0 V (switch closed), Tx = +5 V (switch open))
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
S
T
N
E
M
M
O
C
)
4
n
i
p
(
t
n
e
r
r
u
C
1
A
r
e
if
il
p
m
A
-
4
7
5
9
A
m
)
7
1
n
i
p
(
t
n
e
r
r
u
C
2
A
r
e
if
il
p
m
A
-
8
0
1
0
3
1
A
m
)
2
1
n
i
p
(
t
n
e
r
r
u
C
r
o
t
a
u
n
e
tt
A
-
2
1
0
2
A
m
n
o
it
p
m
u
s
n
o
C
r
e
w
o
P
l
a
t
o
T
-
7
9
.
0
3
2
.
1
W
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
S
T
N
E
M
M
O
C
)
z
H
M
0
1
(
n
i
a
G
0
3
2
3
3
3
B
d
g
n
it
t
e
s
n
o
it
a
u
n
e
tt
a
B
d
0
s
s
e
n
t
a
l
F
n
i
a
G
-
5
7
.
0
-
B
d
z
H
M
0
0
1
o
t
5
e
r
u
t
a
r
e
p
m
e
T
r
e
v
o
n
o
it
a
ir
a
V
n
i
a
G
-
6
0
0
.
0
-
-
C
/
B
d
s
p
e
t
S
n
o
it
a
u
n
e
tt
A
B
d
4
B
d
8
B
d
6
1
B
d
2
3
6
.
3
7
.
7
3
.
5
1
0
.
1
3
9
.
3
0
.
8
7
.
5
1
5
.
1
3
2
.
4
3
.
8
1
.
6
1
0
.
2
3
B
d
c
i
n
o
t
o
n
o
M
z
H
M
5
4
t
a
n
o
it
a
l
o
s
I
h
c
ti
w
S
-
5
3
0
3
B
d
t
u
p
t
u
o
n
i
e
c
n
e
r
e
ff
i
D
n
e
e
w
t
e
b
l
e
v
e
l
l
a
n
g
i
s
y
b
d
n
a
t
s
d
n
a
e
v
it
c
a
)
z
H
M
0
1
=
o
f
(
s
c
i
n
o
m
r
a
H
o
f
2
o
f
3
-
-
7
5
-
4
6
-
2
5
-
6
5
-
c
B
d
V
m
B
d
0
6
+
=
r
e
w
o
p
o
f
s
m
h
O
5
7
o
t
n
i
3
d
r
t
p
e
c
r
e
t
n
I
t
u
p
t
u
O
r
e
d
r
O
8
7
-
-
V
m
B
d
t
n
i
o
P
n
o
i
s
s
e
r
p
m
o
C
n
i
a
G
B
d
1
-
0
7
-
V
m
B
d
e
r
u
g
i
F
e
s
i
o
N
-
7
.
1
5
.
2
B
d
r
e
w
o
P
e
s
i
o
N
t
u
p
t
u
O
.t
e
S
.
n
e
tt
A
.
n
i
M
/
l
a
n
g
i
S
o
N
/
e
v
it
c
A
.t
e
S
.
n
e
tt
A
.
x
a
M
/
l
a
n
g
i
S
o
N
/
e
v
it
c
A
-
-
-
-
6
.
7
3
-
6
.
4
5
-
V
m
B
d
h
t
d
i
w
d
n
a
b
z
H
k
0
6
1
y
n
A
z
H
M
2
4
o
t
5
m
o
r
f
e
c
n
a
d
e
p
m
I
t
u
p
n
I
-
5
7
-
s
m
h
O
6
Data Sheet - Rev 2.1
03/2004
ARA1400
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
S
T
N
E
M
M
O
C
s
s
o
L
n
r
u
t
e
R
t
u
p
n
I
)
e
c
n
a
d
e
p
m
i
c
it
s
ir
e
t
c
a
r
a
h
c
m
h
O
5
7
(
-
0
2
-
5
1
-
B
d
e
c
n
a
d
e
p
m
I
t
u
p
t
u
O
-
0
2
-
2
1
-
5
1
-
0
1
-
s
m
h
O
d
e
s
o
l
c
h
c
ti
w
S
n
e
p
o
h
c
ti
w
S
s
s
o
L
n
r
u
t
e
R
t
u
p
t
u
O
)
e
c
n
a
d
e
p
m
i
c
it
s
ir
e
t
c
a
r
a
h
c
m
h
O
5
7
(
-
-
7
1
-
5
1
-
2
1
-
0
1
-
B
d
d
e
s
o
l
c
h
c
ti
w
S
n
e
p
o
h
c
ti
w
S
t
n
e
i
s
n
a
r
T
e
g
a
tl
o
V
t
u
p
t
u
O
n
e
p
o
h
c
ti
w
s
/
d
e
s
o
l
c
h
c
ti
w
s
-
4
7
p
-
p
V
m
Note: As measured in ANADIGICS test fixture.
continued: AC Electrical Specifications
(T
A
= 25 C; V
DD
, V
ATTN
= +5.0 VDC; Tx = 0 V (switch closed), Tx = +5 V (switch open))
Table 6: Logic Interface Specifications
(T
A
= 25 C; V
DD
, V
ATTN
= +5.0 VDC)
Notes: "L" = logic low, "H" = logic high
Table 7: Attenuator Logic
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
S
T
N
E
M
M
O
C
c
i
g
o
L
l
o
r
t
n
o
C
r
o
t
a
u
n
e
tt
A
V
IN
,
LOW
V
IN
,
HIGH
0
7
.
2
-
-
5
.
0
5
.
5
V
e
g
a
t
s
.
n
e
tt
a
s
e
s
s
a
p
y
B
e
g
a
t
s
.
n
e
tt
a
s
e
l
b
a
n
E
e
c
n
a
d
e
p
m
I
l
o
r
t
n
o
C
r
o
t
a
u
n
e
tt
A
-
K
5
-
s
m
h
O
c
i
g
o
L
l
o
r
t
n
o
C
h
c
ti
w
S
t
u
p
t
u
O
V
IN
,
LOW
V
IN
,
HIGH
0
8
.
2
-
-
1
5
.
5
V
d
e
s
o
l
c
h
c
ti
w
S
n
e
p
o
h
t
c
i
w
S
e
c
n
a
d
e
p
m
I
l
o
r
t
n
o
C
h
c
ti
w
S
t
u
p
t
u
O
-
K
0
1
-
s
m
h
O
(
N
O
I
T
A
U
N
E
T
T
A
d )
B
0
4
8
2
1
6
1
0
2
4
2
8
2
2
3
6
3
0
4
4
4
8
4
2
5
6
5
0
6
)
6
1
n
i
p
(
t
u
p
n
I
c
i
g
o
L
B
d
4
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
)
5
1
n
i
p
(
t
u
p
n
I
c
i
g
o
L
B
d
8
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
)
4
1
n
i
p
(
t
u
p
n
I
c
i
g
o
L
B
d
6
1
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
)
3
1
n
i
p
(
t
u
p
n
I
c
i
g
o
L
B
d
2
3
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
Data Sheet - Rev 2.1
03/2004
ARA1400
7
Figure 4: Test Circuit
0.1uF
22
7
16
15
1
14
22
24
25
23
21
20
19
18
17
28
26
9
8
7
10
6
11
5
12
4
13
3
GND
I
SET
1
AT
T
ACG
1
RF
OU
T
1
AT
T
IN
V
AT
T
32 dB
16 dB
8 dB
I
SET
2
V
A2
RF
IN2
4 dB
RF
IN
N/C
AT
T
OU
T
V
REF1
RF
OU
T
AT
T
ACG
1
AT
T
ACG
1
AT
T
ACG
1
V
REF2
Tx
AT
T
ACG
3
AT
T
ACG
2
AT
T
ACG
2
AT
T
ACG
2
AT
T
ACG
2
(7
5
Oh
m
s
)
0.1uF
RF
O
u
tput
(
75 O
h
m
s
)
3.9 O
h
m
s
16 dB
32 dB
+5 V
RF
Input
+5 V
620 O
h
m
s
0.1uF
0.1uF
1uF
0.1uF
ARA1400
10uH
1uF
1uF
No
te
:
Output Sw
itch Closed: Output Sw
itch Control =
0 V
Output Sw
itch Open: Output Sw
itch Control =
+
5
V
620 O
h
m
s
4 dB
8 dB
20 O
h
m
s
1uF
0.1uF
0.1uF
1pF
3.3K O
h
m
s
1.8K O
h
m
s
1uF
5K O
h
m
s
0.1uF
1uF
1uF
5K O
h
m
s
0.1uF
0.1uF
O
u
tput
Sw
itc
h
Contr
o
l
(0 / +5 V)
5K O
h
m
s
10K O
h
m
s
+5 V
1uF
0.1uF
10uH
20 O
h
m
s
3.3K O
h
m
s
1.8K O
h
m
s
1uF
8
Data Sheet - Rev 2.1
03/2004
ARA1400
0.025 BSC
0.089
0.014 TYP
0.025 MIN.
0.099
0.197
0.163
BODY OUTLINE
(NOMINAL)
0.070
0.150
0.060 TYP.
0.400
(12X)0.020 TO 0.060 DIA.P
PLATED THRU HOLES.
DIMENSIONS IN INCHES
APPLICATION INFORMATION
Amplifier Enable / Disable
The ARA1400 includes two amplification stages that
each can be shut down through external control pins
V
REF1
and V
REF2
(pins 5 and 18, respectively). By
applying a typical bias of 1.75 Volts to these pins,
the amplifiers are enabled. In order to fully disable
an amplifier, its control pin requires a negative bias
of -1.5 to -2.0 Volts.
Output Switch Control
A switch located at the output of Amplifier A2 in the
ARA1400 provides isolation without having to
disable the amplifiers. The switch is controled by
the Tx logic input (pin 25).
Amplifier Bias Current
The I
SET
pins (11 and 27) set the bias current for the
amplification stages. Grounding these pins results
in the maximum possible current. By placing a
resistor from the pin to ground, the current can be
reduced. The recommended bias conditions use
the configuration shown in the test circuit schematic
in Figure 4.
Thermal Layout Considerations
The device package for the ARA1400 features a heat
slug on the bottom of the package body. Use of the
heat slug is an integral part of the device design.
Soldering it to the ground plane of the PC board will
ensure the lowest possible thermal resistance for
the device, and will result in the longest MTF (mean
time to failure.)
A PC board layout that optimizes the benefits of the
heat slug is shown in Figure 5. The via holes located
under the body of the device must be plated through
to a ground plane layer of metal, in order to provide
sufficient thermal conductivity. The recommended
solder mask outline is shown in Figure 6.
ESD Sensitivity
Electrostatic discharges can cause permanent
damage to these devices. Electrostatic charges
accumulate on test equipment and the human body,
and can discharge without detection. Proper
precautions and handling are strongly
recommended. Refer to the ANADIGICS application
note on ESD precautions.
Figure 5: PC Board Layout
Data Sheet - Rev 2.1
03/2004
ARA1400
9
Figure 6: Solder Mask Outline
DIMENSIONS IN INCHES
0.145
0.085
0.025 TYP.
0.016 TYP.
0.025 BSC
0.0535
0.242
0.163
0.098
0.091
10
Data Sheet - Rev 2.1
03/2004
ARA1400
PACKAGE OUTLINE
Figure 7: S12 Package Outline - 28 Pin SSOP with Heat Slug
Data Sheet - Rev 2.1
03/2004
ARA1400
11
COMPONENT PACKAGING
Figure 9: Tape Dimensions
Volume quantities of the ARA1400 are supplied on
tape and reel. Each reel holds 3,500 pieces. Smaller
quantities are available in plastic tubes of 50 pieces.
Figure 8: Reel Dimensions
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
IMPORTANT NOTICE
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a product's formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
Data Sheet - Rev 2.1
03/2004
12
ARA1400
ORDERING INFORMATION
R
E
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R
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R
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G
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D
G
N
I
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A
K
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A
P
T
N
E
N
O
P
M
O
C
R
T
C
2
1
S
0
0
4
1
A
R
A
C
5
8
o
t
0
P
O
S
S
n
i
P
8
2
g
u
l
S
t
a
e
H
h
ti
w
l
e
e
r
d
n
a
e
p
a
t
e
c
e
i
p
0
0
5
,
3
C
2
1
S
0
0
4
1
A
R
A
C
5
8
o
t
0
P
O
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n
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u
l
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