08/2001
FEATURES
Single +5 Volt Supply
Automatic Gain Control
-41 dBm Sensitivity
0 dBm Optical Overload
120 MHz Bandwidth
APPLICATIONS
SONET OC-3/SDH STM-1 (155 Mb/s) Receiver
FDDI, Ethernet Fiber LAN
Low Noise RF Amplifier
PRODUCT DESCRIPTION
Figure 1: Equivalent Circuit
ATA01502
AGC Transimpedance Amplifier
SONET OC-3
PRELIMINARY DATA SHEET-Rev 2
D1
The ANADIGICS ATA01502 is a 5V low noise
transimpedance amplifier with AGC designed to be
used in OC-3/STM-1 fiber optic links. The device is
used in conjunction with a photodetector (PIN diode
or avalanche photodiode) to convert an optical signal
into an output voltage. The ATA01502 offers a
bandwidth of 120MHz and a dynamic range of 42dB.
It is manufactured in a GaAs MESFET process and
is available in bare die form.
V
DD1
I
IN
GND
GND
GND
GND
GND
GND
GND
GND
V
DD2
V
OUT
CBY
CBY
C
AGC
1250
m
100
m
925
m
V
DD2
V
OUT
C
AGC
GND
V
DD1
I
IN
C
BY
US PATENT
GND
or
neg.supply
VGA
- 45
70K
+
4.5pF
+ 0.8
AGC
40K
Photodector cathode must be connected to I
IN
for proper AGC Operation
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
2
Table 1: Pad Description
Figure 2: Bonding Pad Layout
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Maximum Ratings
D
A
P
n
o
it
p
i
r
c
s
e
D
t
n
e
m
m
o
C
V
1
D
D
V
1
D
D
e
g
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t
s
n
i
a
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t
u
p
n
i
r
o
f
y
l
p
p
u
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e
v
it
i
s
o
P
V
2
D
D
V
2
D
D
e
g
a
t
s
n
i
a
g
d
n
o
c
e
s
r
o
f
y
l
p
p
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e
v
it
i
s
o
P
I
N
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t
n
e
rr
u
C
t
u
p
n
I
A
I
T
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it
a
r
e
p
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r
e
p
o
r
p
r
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f
e
d
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h
t
a
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t
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e
t
e
d
t
c
e
n
n
o
C
V
T
U
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e
g
a
tl
o
V
t
u
p
t
u
O
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I
T
k
c
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l
a
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t
x
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ri
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q
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R
C
C
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r
o
ti
c
a
p
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C
C
G
A
l
a
n
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t
x
E
t
n
a
t
s
n
o
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e
m
i
T
C
G
A
=
)
C
G
A
C
+
p
5
.
4
(
*
K
0
7
C
Y
B
s
s
a
p
y
B
e
g
a
t
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a
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t
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F
p
6
5
>
V
1
D
D
V
0
.
7
V
2
D
D
V
0
.
7
I
N
I
A
m
5
T
A
C
5
2
1
o
t
C
0
4
-
.
p
m
e
T
g
n
it
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O
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S
C
0
5
1
o
t
C
5
6
-
.
p
m
e
T
e
g
a
r
o
t
S
Stresses in excess of the absolute ratings may cause
permanent damage. Functional operation is not
implied under these conditions. Exposure to absolute
ratings for extended periods of time may adversely
affect reliability.
V
DD1
I
IN
GND
GND
GND
GND
G ND
GND
GND
GND
V
DD2
V
OUT
CBY
CBY
C
A GC
1250
m
100
m
925
m
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
3
Table 3: Electrical Specifications
(1)
(T
A
= 25
C, V
DD
=+5.0V + 10%, C
DIODE
+ C
STRAY
= 0.5 pF, Det. cathode to I
IN
)
Notes:
1. f = 50MHz
2. Measured with I
in
below AGC Threshold. During AGC, input impedance will drecrease
proportionally to I
in.
3. Defined as the I
in
where Transresistance has decreased by 50%.
4. See note on Indirect Measurement of Optical Overload.
5. See note on Measurement of Input Referred Noise Current.
6. C
AGC
= 220 pF
7. Parameter is guaranteed (not tested) by design and characterization data @155 Mb/s,
assuming dectector responsivity of 0.95.
W
R
E
T
E
M
A
R
A
P
N
I
M
P
Y
T
X
A
M
T
I
N
U
R
(
e
c
n
a
t
s
i
s
e
r
s
n
a
r
T
L
I,
=
C
D
)
A
n
0
0
5
<
0
2
0
3
K
R
(
e
c
n
a
t
s
i
s
e
r
s
n
a
r
T
L
)
0
5
=
)
1
(
5
.
9
3
1
0
1
K
B
d
3
-
h
t
d
i
w
d
n
a
B
0
1
1
0
2
1
z
H
M
e
c
n
a
t
s
i
s
e
R
t
u
p
n
I
)
2
(
0
0
0
1
e
c
n
a
t
s
i
s
e
R
t
u
p
t
u
O
0
3
0
5
0
6
t
n
e
rr
u
C
y
l
p
p
u
S
0
3
5
4
A
m
e
g
a
tl
o
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t
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ff
O
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p
n
I
0
.
1
4
.
1
s
tl
o
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a
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ff
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4
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d
l
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T
C
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N
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)
)
3
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1
d
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a
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it
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)
4
(
0
1
m
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d
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rr
u
C
e
s
i
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p
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I
)
5
(
2
1
A
n
t
n
a
t
s
n
o
C
e
m
i
T
C
G
A
)
6
(
6
1
c
e
s
tf
ir
D
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a
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o
V
t
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ff
O
1
/
V
m
C
y
ti
v
it
i
s
n
e
S
l
a
c
it
p
O
)
7
(
1
4
-
m
B
d
e
g
n
a
R
e
g
a
tl
o
V
g
n
it
a
r
e
p
O
5
.
4
+
0
.
5
+
0
.
6
+
s
tl
o
V
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
g
n
it
a
r
e
p
O
0
4
-
5
8
C
e
c
n
a
t
s
i
s
e
R
l
a
m
r
e
h
T
0
2
W
/
C
m
mA
W
W
W
W
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
4
Figure 3: ATA 01502D1C Typical Bonding Diagram
APPLICATION INFORMATION
Power Supplies and General Layout Considerations
The ATA01502D1C may be operated from a positive
supply as low as + 4.5 V and as high as + 6.0 V.
Below + 4.5 V, bandwidth, overload and sensitivity
will degrade, while at + 6.0 V, bandwidth, overload
and sensitivity improve (see Bandwidth vs.
Temperature curves). Use of surface mount
(preferably MIM type capacitors), low inductance
power supply bypass capacitors (>=56pF) are
essential for good high frequency and low noise
performance. The power supply bypass capacitors
should be mounted on or connected to a good low
inductance ground plane.
General Layout Considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess of
1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations, a
low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short. The utmost
care should be taken to maintain very low capacitance
at the photodiode TIA interface (I
IN
), as excess
capacitance at this node will cause a degradation in
bandwidth and sensitivity (see Bandwidth vs. C
T
curves).
140
130
120
110
100
90
-40
10
60
85
V
DD
= 4.5 V
V
DD
= 5.0 V
V
DD
= 5.5 V
C
T
= 0.5 pF
Temperature (
O
C)
B
andw
i
d
th (
M
H
z
)
Figure 4: Bandwidth vs. Temperature
56p F
56p F
56pF
56pF
PIN
V
DD1
I
IN
G ND
G N D
G ND GND
G N D
G ND
GN D
G ND
V
DD2
V
OUT
OUT
V
DD
C B Y
C B Y
C
AGC
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
5
Note: All performance curves are typical @ TA =25 C
unless otherwise noted.
I
IN
Connection
(Refer to the equivalent circuit diagram) Bonding the
detector cathode to I
IN
(and thus drawing current from
the ATA01502D1C) improves the dynamic range. The
detector may be used in the reverse direction for input
currents not exceeding 13 mA, however the
specifications for optical overload will not be met.
V
OUT
Connection
The output pad should be connected via a coupling
capacitor to the next stage of the receiver channel
(filter or decision circuits), as the output buffers are
not designed to drive a DC coupled 50 ohm load
(this would require an output bias current of
approximately 36 mA to maintain a quiescent 1.8
Volts across the output load). If V
OUT
is connected to a
high input impedance decision circuit (>500 ohms),
then a coupling capacitor may not be required,
although caution should be exercised since DC
offsets of the photo detector/TIA combination may
cause clipping of subsequent gain or decision
circuits.
B(3dB)
A / 2
R
F
(C
IN
+C
T
)
V
DD
= 4.5 V
V
DD
= 5.0 V
V
DD
= 5.5 V
150
140
130
120
110
100
90
0 0 . 2 0 .4 0 .6 0 .8 1 .0 1 . 2 1 .4 1 .6
C
T
(pF)
Bandwi
t
h
(
M
Hz
)
~
~
I
V
DD
= 5.5 V
V
DD
= 4.5 V
I
IN
(mA DC)
15.0
13.0
11.0
9.0
7.0
5.0
3.0
1.0
0.0
T
r
an
s
i
m
peda
nc
e (
K
O
h
m
)
I
IN
50
-2.2 - 1.7 -1.2 - 0.7 - 0.2
R
F
V
DD
=4.5 V
V
DD
= 5.5 V
50
I
IN
(mA DC)
I
IN
- 2.2 - 1.7 - 1.2 - 0.7 - 0.2
2500
900
120
1502
R
F
B
a
ndw
i
d
t
h
(
M
H
z
)
V
DD
=4.5 V
V
DD
=5.5 V
Output Collapse
V
OUT
I
IN
(mA DC)
heavy AGC
Linear Region
3.4
3.2
3.0
2.9
2.7
2.5
2.4
2.2
2.0
1.9
1.7
1.5
1.4
1.2
1.0
0.8
0.7
0.5
0.3
0.2
0.0
- 5 - 4 - 3 - 2
1502
R
F
I
IN
V
O
U
T
(
V
o
l
t
s
)
Figure 5: Bandwidth vs. CT
Figure 6: Transimpedance vs. I
IN
Figure 7: Bandwidth vs. I
IN
Figure 8: V
OUT
vs. I
IN
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
6
C
BY
Connection
The C
BY
pad must be connected via a low inductance
path to a surface mount capacitor of at least 56pF
(additional capacitance can be added in parallel with
the 56 pF or 220 pF capacitors to improve low
frequency response and noise performance).
Referring to the equivalent circuit diagram and the
typical bonding diagram, it is critical that the
connection from C
BY
to the bypass capacitor use two
bond wires for low inductance, since any high
frequency impedance at this node will be fed back to
the open loop amplifier with a resulting loss of
transimpedance bandwidth. Two pads are provided
for this purpose.
Sensitivity and Bandwidth
In order to guarantee sensitivity and bandwidth
performance, the TIA is subjected to a
comprehensive series of tests at the die sort level
(100% testing at 25
o
C) to verify the DC parametric
performance and the high frequency performance
(i.e. adequate |S21|) of the amplifier. Acceptably high
|S21| of the internal gain stages will ensure low
amplifier input capacitance and hence low input
referred noise current. Transimpedance sensitivity
and bandwidth are then guaranteed by design and
correlation with RF and DC die sort test results. In
applications that require - 41 dBm sensitivity, a low
capacitance (< 0.5pF) and high responsitivity (> 0.95)
photodiode must be used.
Indirect Measurement of Optical Overload
Optical overload can be defined as the maximum
optical power above, which the BER (bit error rate)
increases beyond 1 error in 10
10
bits. The
ATA01502D1C is 100% tested at die sort by a DC
measurement, which has excellent correlation with
a PRBS optical overload measurement. The
measurement consists of sinking a negative current
(see V
OUT
Vs I
IN
figure) from the TIA and determining
the point of output voltage collapse. In addition, the
input node virtual ground during heavy AGC is
checked to verify that the linearity (i.e. pulse width
distortion) of the amplifier has not been
compromised. As a final test, a DC transfer curve is
performed on every die at the wafer level to ensure
excellent overload performance.
Measurement of Input Referred Noise Current
The Input Noise Current is directly related to
sensitivity. It can be defined as the output noise
voltage (V
OUT
), with no input signal, (including a 100
MHz lowpass filter at the output of the TIA) divided by
the AC transresistance.
V
DD
= 5.5 V
V
DD
= 5.0V
V
DD
= 4.5V
I
n
put O
f
f
s
et
Volt
a
g
e
1.55
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
- 40 10 60
Temperature (
O
C)
pA
/
H
z
C
T
= 1.0pF
C
T
=0.5pF
1 10 100 1000
Frequency (MHz)
8
7
6
5
4
3
2
1
1502
R
F
C
T
50
Figure 9: Input Offset Voltage vs. Temperature
Figure 10: Input Referred Noise Spectral Density
PRELIMINARY DATA SHEET - Rev 2
08/2001
ATA01502
7
50 100 150
Frequency (MHz)
I
IN
0.5pF
V
OUT
Degr
ees
180
200
220
240
R
F
1502
AGC Capacitor
It is important to select an external AGC capacitor of
high quality and appropriate size. The ATA01502D1C
has an on-chip 70 K W resistor with a shunt 4.5-pF
capacitor to ground. Without external capacitance,
the chip will provide an AGC time constant of 315 nS.
For the best performance in a typical 155 MB/s
SONET receiver, a minimum AGC capacitor of 56pF
is recommended. This will provide the minimum
amount of protection against pattern sensitivity and
pulse width distortion on repetitive data sequences
during high average optical power conditions.
Conservative design practices should be followed
when selecting an AGC capacitor, since unit to unit
variability of the internal time constant and various
data conditions can lead to data errors if the chosen
value is too small.
Phase Response
At frequencies below the 3dB bandwidth of the
device, the transimpedance phase response is
characteristic of a single pole transfer function (as
shown in the Phase Vs Frequency curve). The output
impedance is essentially resistive up to 1000 MHz.
(dBm) = 10 LOG
6500i n
R
14
13
12
11
10
09
0.5pF
25 dB
Temperature (
O
C)
TIA
100
MHz
LPF
V
DD
= 4.5 V
V
DD
= 5.5V
I
nput
R
e
f
e
rr
ed
Noise
i
n (
n
A
RM
S
)
- 40 0 40 80
Input Referenced Noise Test Circuit
FIgure 11: Input Referred Noise vs Temperature
Figure 12: Phase (I
IN
to V
OUT
)
PRELIMINARY DATA SHEET - Rev 2
08/2001
8
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices, or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
http://www.anadigics.com
Mktg@anadigics.com
ATA01502
ORDERING INFORMATION
R
E
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A
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A
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C
A
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1
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1
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1
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1
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i
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