DS030100-U005a - 1 -
AN121E04 Datasheet
Enhanced I/O Reconfigurable FPAA
www.anadigm.com
DS030100-U005a - 2 -
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Anadigm
Ltd. 2003
Anadigm
, Inc. 2003
All Rights Reserved.
AN121E04 Datasheet Enhanced I/O Reconfigurable FPAA
DS030100-U005a - 3 -
PRODUCT AND ARCHITECTURE OVERVIEW
The AN121E04 device consists of a 2x2 matrix of fully
Configurable Analog Blocks (CABs), surrounded by a fabric of
programmable interconnect resources. Configuration data is
stored in an on-chip SRAM configuration memory. Compared
with the first-generation FPAAs, the Anadigmvortex architecture
provides a significantly improved signal-to-noise ratio as well as
higher bandwidth. These devices also accommodate nonlinear
functions such as sensor response linearization and arbitrary
waveform synthesis.
The AN121E04 device features an advanced input/output
structure that allows the FPAA to be programmed with up to six
outputs or triple the number provided by the ANx20E04
devices. The ANx21E04 devices have four configurable I/O cells
and two dedicated output cells. For I/O-intensive applications, this
means a single FPAA can now be used to process multiple
channels of analog signals where two or more such devices were
previously needed.
In addition, the AN121E04 devices allow designers to implement
an integrated 8-bit analog-to-digital converter on the FPAA,
eliminating the potential need for an external converter. Using this
new device, designers can route the digital output of the A/D
converter off-chip using one of the dedicated output cells.
Figure 1: Architectural overview of the AN121E04 device
The AN121E04 device provides a low-cost path to
implementing analog signal conditioning in high-volume
applications.
PRODUCT FEATURES
Four configurable I/O cells, two dedicated output cells
8-bit SAR analog-to-digital converter
Fully
differential
architecture
Fully differential I/O buffering with options for single ended
to differential conversion
Low input offset through chopper stabilized amplifiers
256 Byte Look-Up Table (LUT) for linearization and
arbitrary signal generation
4:1 Input multiplexer
Typical Signal Bandwidth: DC-2MHz (Bandwidth is CAM
dependent)
Signal to Noise Ratio:
o Broadband 80dB
o Narrowband (audio) 100dB
Total Harmonic Distortion (THD): 80dB
DC offset <100V
Package: 44-pin QFP (10x10x2mm)
o Lead pitch 0.8mm
Supply voltage: 5V
ORDERING CODES
AN121
E04-QFPSP
Reconfigurable FPAA
Sample Pack
AN121
E04-QFPTY
Reconfigurable FPAA
Tray (96 pcs)
AN121
E04-QFPTR
Reconfigurable FPAA
Tape & Reel (1000 pcs)
AN221D04-EVAL
AN221E04 Evaluation Kit
AN221D04-DEVLP
AN221E04 Development Kit
APPLICATIONS
Sensor
interfacing and signal conditioning
Complex filtering applicable in a variety of applications
Industrial monitoring, control and automation
Medical monitoring and diagnostics
Signal conditioning for actuators and servo systems
Ultra-low frequency signal conditioning
Electrical supervision of optical lasers, modulators and
receivers
Custom analog signal processing
[For more detailed information on the features of the AN221E04 device,
please refer to the AN121E04/AN221E04 User Manual]
AN121E04 Datasheet Enhanced I/O Reconfigurable FPAA
DS030100-U005a - 4 -
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter Symbol
Min
Typ
Max
Unit
Comment
DC Power Supplies
AVDD(2)
BVDD
DVDD
-0.5 - 5.5
V
V
AVSS, BVSS, DVSS and SVSS all
held to 0.0 V
a
xVDD to xVDD Offset
-0.5
0.5
V
Ideally all supplies should be at the
same voltage
Package Power Dissipation
Pmax 25C
Pmax 85C
- -
1.8
0.73
W
Still air, No heatsink, 4 layer board,
44 pins.
ja = 55C/W
Analog and Digital Input Voltage
Vinmax Vss-0.5 - Vdd+0.5 V
Ambient Operating Temperature
Top
-40
-
85
C
Storage Temperature
Tstg
-65
150
C
a
Absolute Maximum DC Power Supply Rating - The failure mode is non-catastrophic for Vdd of up to 7 volts, but will cause reduced
operating life time. The additional stress caused by higher local electric fields within the CMOS circuitry may induce metal migration,
oxide leakage and other time/quality related issues.
Recommended Operating Conditions
Parameter Symbol
Min
Typ
Max
Unit
Comment
DC Power Supplies
AVDD(2)
BVDD
DVDD
4.75 5.00 5.25 V
AVSS, BVSS, DVSS and SVSS all
held to 0 V
Analog Input Voltage.
Vina
VMR-1.9 -
VMR+1.9
V
VMR
is 2.0 volts above AVSS
Digital Input Voltage
Vind
0
-
DVDD
V
Junction Temp
Tj
-40
-
125
C
Assume a package
ja = 55C/W
b
b
In order to calculate the junction temperature you must first empirically determine the current draw (total Idd) for the design. Once the
current consumption established then the following formula can be used; Tj = Ta + Idd x Vdd x 55 C/W, where Ta is the ambient
temperature. The worst case
ja of 55 C/W assumes no air flow and no additional heatsink of any type.
General Digital I/O Characteristics (Vdd = 5v +/- 10%, -40 to 85 deg.C)
Parameter Symbol
Min
Typ
Max
Unit
Comment
Input Voltage Low
Vih
0
-
30
-
% of DVDD
Input Voltage High
Vil
70
-
100
-
% of DVDD
Output Voltage Low
Vol
0
-
20
-
% of DVDD
Output Voltage High
Voh
80
-
100
-
% of DVDD
Input Leakage Current
Iil
-
-
1.0
A
All pins except DCLK
Input Leakage Current
Iil -
12.0
-
A
DCLK if a crystal is connected and
the on-chip oscillator is used
Max. Capacitive Load
Cmax - - 10
pF
The maximum load for a digital
output is 10 pF // 10 Kohm
Min. Resistive Load
Rmin 10 - -
Kohm
The maximum load for a digital
output is 10 pF // 10 Kohm
DCLK Frequency
Fmax - - 40
MHz
For MODE = 1, Max DCLK is
16 MHz
ACLK Frequency
Fmax - - 40
MHz
Divide down to <8 MHz prior to use
as a CAB clock
Clock Duty Cycle
-
45
-
55
%
All clocks
AN121E04 Datasheet Enhanced I/O Reconfigurable FPAA
DS030100-U005a - 5 -
Detailed Digital I/O Interface Characteristics: Vdd = 5.0volts
LCCb
Parameter Symbol
Min
Typ
Max
Unit
Comment
Output Voltage Low
Vol
Vss
-
150
mV
Load 20pF//50Kohm to Vss
Output Voltage High
Voh
4.5
-
Vdd
V
Load 20pF//50Kohm to Vss
Max. Capacitive Load
Cmax
-
-
20
pF
Maximum load 20 pF // 50 Kohm
Min. Resistive Load
Rmin
50
-
-
Kohm
Maximum load 20 pF // 50 Kohm
Current Sink
Isnkmax
-
-
15
mA
LCCb pin shorted to Vdd
Current Source
Isrcmax
-
-
4
mA
LCCb pin shorted to Vss
CFGFLG, ACTIVATE
Parameter Symbol
Min
Typ
Max
Unit
Comment
Input Voltage Low
Vil
0
30
%
% of DVDD
Input Voltage High
Vih
70
100
%
% of DVDD
Output Voltage Low
Vol Vss - 85
mV
Pin load =
Internal pullup + 20pF//50K to Vss
Output Voltage High
Voh 4.5 - Vdd
V
Pin load =
Internal pullup + 20pF//50K to Vss
Output Voltage Low
Vol Vss - 200
mV
Pin Load =
External 5K ohm pullup +
20pF//50K to Vss
Output Voltage High
Voh 4.5 - Vdd
V
Pin Load =
External 5Kohm pullup +
20pF//50K to Vss
Max. Capacitive Load
Cmax
-
-
50
pF
Maximum load 50 pF // 50 Kohm
Min. Resistive Load
Rmin
50
-
-
Kohm
Maximum load 50 pF // 50 Kohm
Current Sink
Isnkmax
-
-
2.5
mA
Pin shorted to Vdd
Current Source
Isrcmax
-
-
200
A
Pin shorted to Vss
External Resistive Pullup
Rpullupext 5
7.5 10 Kohm
Use only if internal pullup is
deselected
ERRb
Parameter Symbol
Min
Typ
Max
Unit
Comment
Input Voltage Low
Vil
0
30
%
% of DVDD
Input Voltage High
Vih
70
100
%
% of DVDD
Output Voltage Low
Vol
Vss
-
50
mV
Output
Voltage
High
Voh 4.9 - Vdd
V
Max. Capacitive Load
Cmax
-
-
50
pF
Maximum load 50 pF // 50 Kohm
Min. Resistive Load
Rmin
50
-
-
Kohm
Maximum load 50 pF // 50 Kohm
Current Sink
Isnkmax
-
-
10
mA
Current Source
Isrcmax
-
-
0
A
External Resistive Pullup
Rpullupext
10
10
10
Kohm
DCLK,Mode,DIN,EXECUTE,PORb,CS1b,CS2b
Parameter Symbol
Min
Typ
Max
Unit
Comment
Input Voltage Low
Vil
0
-
30
%
% of DVDD
Input Voltage High
Vih
70
-
100
%
% of DVDD
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