Symbol
V
DS
V
GS
I
DM
I
AR
E
AR
T
J
, T
STG
Symbol
Typ
Max
13
20
39
50
R
JL
0.56
1.5
A
Repetitive avalanche energy L=0.1mH
C
120
mJ
Maximum Junction-to-Case
C
Steady-State
C/W
Thermal Characteristics
Parameter
Units
Maximum Junction-to-Ambient
A
t 10s
R
JA
C/W
C/W
Absolute Maximum Ratings T
A
=25C unless otherwise noted
V
V
25
Pulsed Drain Current
Power Dissipation
B
T
C
=25C
Gate-Source Voltage
Drain-Source Voltage
Maximum Junction-to-Ambient
A
Steady-State
-85
-65
-200
Avalanche Current
C
-30
Power Dissipation
A
T
A
=25C
P
DSM
Continuous Drain
Current
B,G
Maximum
Units
Parameter
T
A
=25C
G
T
A
=100C
B
-30
W
Junction and Storage Temperature Range
A
P
D
C
100
50
-55 to 175
T
C
=100C
I
D
2.5
W
T
A
=70C
1.6
AOD403
P-Channel Enhancement Mode Field Effect Transistor
Features
V
DS
(V) = -30V
I
D
= -85A (V
GS
= -20V)
R
DS(ON)
< 6m
(V
GS
= -20V)
R
DS(ON)
< 7.6m
(V
GS
= -10V)
General Description
The AOD403 uses advanced trench technology to
provide excellent R
DS(ON)
, low gate charge and low
gate resistance. With the excellent thermal resistance
of the DPAK package, this device is well suited for
high current load applications.
Standard Product
AOD403 is Pb-free (meets ROHS & Sony 259
specifications). AOD403L is a Green Product
ordering option. AOD403 and AOD403L are
electrically identical.
G D S
TO-252
D-PAK
Top View
Drain Connected
to Tab
G
D
S
Alpha & Omega Semiconductor, Ltd.
AOD403
Symbol
Min
Typ
Max
Units
BV
DSS
-30
V
-0.01
-1
T
J
=55C
-5
I
GSS
100
nA
V
GS(th)
-1.5
-2.6
-3.5
V
I
D(ON)
-60
A
5.1
6
T
J
=125C
7.1
8.5
6.3
7.6
m
g
FS
44
S
V
SD
-0.72
-1
V
I
S
-104
A
C
iss
4360
5300
pF
C
oss
1050
pF
C
rss
762
pF
R
g
2.5
3
Q
g
93.2
120
nC
Q
gs
18
nC
Q
gd
29.2
nC
t
D(on)
18
25
ns
t
r
30
45
ns
t
D(off)
51
75
ns
t
f
35
50
ns
t
rr
39.5
48
ns
Q
rr
30.8
37
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
V
GS
=0V, V
DS
=-15V, f=1MHz
Gate Drain Charge
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=-10V, V
DS
=-15V, R
L
=0.75,
R
GEN
=3
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
SWITCHING PARAMETERS
Total Gate Charge
V
GS
=-10V, V
DS
=-15V, I
D
=-20A
Gate Source Charge
m
V
GS
=-10V, I
D
=-20A
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-20A
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
A
Gate Threshold Voltage
V
DS
=V
GS
I
D
=-250A
V
DS
=-24V, V
GS
=0V
V
DS
=0V, V
GS
=25V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-20A, dI/dt=100A/s
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250A, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-20V, I
D
=-20A
Reverse Transfer Capacitance
I
F
=-20A, dI/dt=100A/s
A: The value of R
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25C. The Power
dissipation P
DSM
is based on steady-state R
JA
and the maximum allowed junction temperature of 150C. The value in any given application depends
on the user's specific board design, and the maximum temperature of 175C may be used if the PCB or heatsink allows it.
B. The power dissipation P
D
is based on T
J(MAX)
=175C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175C.
D. The R
JA
is the sum of the thermal impedence from junction to case R
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25C. The SOA curve
provides a single pulse rating.
G. The maximum current rating is limited by the package current capability.
Rev 4: Aug 2005
Alpha & Omega Semiconductor, Ltd.
AOD403
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
-15
-12.8
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
0
20
40
60
80
100
0
1
2
3
4
5
-V
DS
(Volts)
Fig 1: On-Region Characteristics
-I
D
(A
)
V
GS
=-2V
-4.5V
-5V
-6V
-10V
0
10
20
30
40
50
60
2
2.5
3
3.5
4
4.5
5
-V
GS
(Volts)
Figure 2: Transfer Characteristics
-I
D
(A
)
0
2
4
6
8
10
0
10
20
30
40
50
60
-I
D
(A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage
R
DS
(
O
N)
(m
)
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics
-I
S
(A
)
25C
125C
0.8
1
1.2
1.4
1.6
0
25
50
75
100
125
150
175
Temperature (C)
Figure 4: On-Resistance vs. Junction Temperature
No
rmal
i
z
ed
O
n
-
R
esi
st
an
ce
V
GS
=-20V
V
GS
=-10V
4
8
12
16
20
24
4
8
12
16
20
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
R
DS
(
O
N)
(m
)
25C
125C
V
DS
=-5V
V
GS
=-10V
I
D
=-20A
25C
125C
I
D
=-20A
V
GS
=-20V
-4V
Alpha & Omega Semiconductor, Ltd.
AOD403
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
-15
-12.8
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
0
2
4
6
8
10
0
10
20
30
40
50
60
70
80
90 100
-Q
g
(nC)
Figure 7: Gate-Charge Characteristics
-V
GS
(Vo
l
ts
)
0
1000
2000
3000
4000
5000
6000
7000
0
5
10
15
20
25
30
-V
DS
(Volts)
Figure 8: Capacitance Characteristics
Cap
aci
t
an
ce (
p
F
)
C
iss
0
20
40
60
80
100
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
Po
w
e
r
(W
)
0.001
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
JA
No
rmal
i
z
ed
T
ran
si
en
t
T
h
ermal
Resi
st
an
ce
C
oss
C
rss
0.1
1
10
100
1000
0.1
1
10
100
-V
DS
(Volts)
-I
D
(A
m
p
s
)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
100s
10ms
1ms
0.1s
1s
10s
DC
R
DS(ON)
limited
T
J(Max)
=150C
T
A
=25C
V
DS
=-15V
I
D
=-20A
Single Pulse
D=T
on
/T
T
J,PK
=T
A
+P
DM
.Z
JA
.R
JA
R
JA
=50C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J(Max)
=150C
T
A
=25C
10s
T
on
T
P
D
T
on
P
D
Alpha & Omega Semiconductor, Ltd.
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