Symbol
V
DS
V
GS
I
DM
I
AR
E
AR
T
J
, T
STG
Symbol
Typ
Max
R
JA
100
125
R
JC
1.9
2.5
W
Maximum Junction-to-Case
B
Steady-State
C/W
Thermal Characteristics
Parameter
Units
Maximum Junction-to-Ambient
A
Steady-State
C/W
Absolute Maximum Ratings T
A
=25C unless otherwise noted
V
V
20
Gate-Source Voltage
Drain-Source Voltage
-60
Pulsed Drain Current
C
Power Dissipation
B
T
C
=25C
Continuous Drain
Current
G
Maximum
Units
Parameter
T
C
=25C
T
C
=100C
I
D
-26
-18
-60
Junction and Storage Temperature Range
A
P
D
C
60
30
-55 to 175
T
C
=100C
Avalanche Current
C
-26
Repetitive avalanche energy L=0.1mH
C
134
A
mJ
AOU401
P-Channel Enhancement Mode Field Effect Transistor
Features
V
DS
(V) = -60V
I
D
= -26 A (V
GS
= -10V)
R
DS(ON)
< 40 m
(V
GS
= -10V) @ 20A
R
DS(ON)
< 55 m
(V
GS
= -4.5V)
General Description
The AOU401 uses advanced trench technology and
design to provide excellent R
DS(ON)
with low gate
charge. This device is suitable for use in PWM, load
switching and general purpose applications. Standard
Product AOU401 is Pb-free (meets ROHS & Sony
259 specifications). AOU401L is a Green Product
ordering option. AOU401 and AOU401L are
electrically identical.
G
D
S
Top View
Drain Connected
to Tab
TO-251
G D S
Alpha & Omega Semiconductor, Ltd.
AOU401
Symbol
Min
Typ
Max
Units
BV
DSS
-60
V
-0.003
-1
T
J
=55C
-5
I
GSS
100
nA
V
GS(th)
-1.2
-1.9
-2.4
V
I
D(ON)
-60
A
32
40
T
J
=125C
53
43
55
m
g
FS
32
S
V
SD
-0.73
-1
V
I
S
-30
A
C
iss
2977
3600
pF
C
oss
241
pF
C
rss
153
pF
R
g
2
2.4
Q
g
(10V)
44
54
nC
Q
g
(4.5V)
22.2
28
nC
Q
gs
9
nC
Q
gd
10
nC
t
D(on)
12
ns
t
r
14.5
ns
t
D(off)
38
ns
t
f
15
ns
t
rr
40
50
ns
Q
rr
59
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Body Diode Reverse Recovery Charge I
F
=-20A, dI/dt=100A/
s
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=-10V, V
DS
=-30V, R
L
=1.5
,
R
GEN
=3
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
Total Gate Charge
V
GS
=-10V, V
DS
=-30V, I
D
=-20A
Gate Source Charge
Gate Drain Charge
Total Gate Charge
m
V
GS
=-4.5V, I
D
=-20A
I
S
=-1A, V
GS
=0V
V
DS
=-5V, I
D
=-20A
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
A
Gate Threshold Voltage
V
DS
=V
GS
,
I
D
=-250
A
V
DS
=-48V, V
GS
=0V
V
DS
=0V, V
GS
=20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
Body Diode Reverse Recovery Time
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250uA, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-20A
Reverse Transfer Capacitance
I
F
=-20A, dI/dt=100A/
s
V
GS
=0V, V
DS
=-30V, f=1MHz
SWITCHING PARAMETERS
A: The value of R
JA
is measured with the device in a still air environment with T
A
=25C.
B. The power dissipation P
D
is based on T
J(MAX)
=175C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature T
J(MAX)
=175C.
D. The R
JA
is the sum of the thermal impedence from junction to case R
JC
and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300
s pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of T
J(MAX)
=175C.
G. The maximum current rating is limited by bond-wires.
Rev3: August 2005
Alpha & Omega Semiconductor, Ltd.
AOU401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
5
10
15
20
25
30
0
1
2
3
4
5
-V
GS
(Volts)
Figure 2: Transfer Characteristics
-I
D
(A)
20
25
30
35
40
45
50
0
5
10
15
20
25
-I
D
(A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
R
DS(ON)
(m
)
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics
-I
S
(A)
25C
125C
0.8
1
1.2
1.4
1.6
1.8
2
0
25
50
75
100
125
150
175
Temperature (C)
Figure 4: On-Resistance vs. Junction Temperature
Norm
al
i
z
ed On-Resi
stance
V
GS
=-4.5V
I
D
=-20A
V
GS
=-10V
I
D
=-20A
20
30
40
50
60
70
80
2
4
6
8
10
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
R
DS(ON)
(m
)
25C
125C
V
DS
=-5V
V
GS
=-4.5V
V
GS
=-10V
I
D
=-20A
25C
125C
0
5
10
15
20
25
30
0
1
2
3
4
5
-V
DS
(Volts)
Fig 1: On-Region Characteristics
-I
D
(A)
V
GS
=-3V
-3.5V
-6V
-10V
-4.5V
-5V
-4V
Alpha & Omega Semiconductor, Ltd.
AOU401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0
5
10
15
20
25
30
35
40
45
50
-Q
g
(nC)
Figure 7: Gate-Charge Characteristics
-V
GS
(V
o
l
ts)
0
800
1600
2400
3200
4000
0
5
10
15
20
25
30
-V
DS
(Volts)
Figure 8: Capacitance Characteristics
Capaci
tance (pF)
C
iss
0
200
400
600
800
1000
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Po
w
e
r
(
W
)
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
JC
Norm
al
i
z
ed Transi
ent
Therm
al
Resi
stance
C
oss
C
rss
0.1
1.0
10.0
100.0
0.1
1
10
100
-V
DS
(Volts)
-I
D
(Am
p
s)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
100
s
10ms
1ms
DC
R
DS(ON)
limited
T
J(Max)
=175C, T
A
=25C
V
DS
=-30V
I
D
=-20A
Single Pulse
D=T
on
/T
T
J,PK
=T
C
+P
DM
.Z
JC
.R
JC
R
JC
=2.5C/W
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J(Max)
=175C
T
A
=25C
10
s
Alpha & Omega Semiconductor, Ltd.
AOU401
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
15
20
25
30
0.00001
0.0001
0.001
Time in avalanche, t
A
(s)
Figure 12: Single Pulse Avalanche capability
-I
D
(A),
P
eak Aval
anche Current
0
10
20
30
40
50
60
70
0
25
50
75
100
125
150
175
T
CASE
(C)
Figure 13: Power De-rating (Note B)
P
o
wer D
i
ssi
pat
i
on (
W
)
0
5
10
15
20
25
30
0
25
50
75
100
125
150
175
T
CASE
(C)
Figure 14: Current De-rating (Note B)
C
u
rrent
rat
i
ng -
I
D
(A)
DD
D
A
V
BV
I
L
t
-
=
T
A
=25C
Alpha & Omega Semiconductor, Ltd.
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