Symbol
V
DS
V
GS
I
DM
I
AR
E
AR
T
J
, T
STG
Symbol
Typ
Max
R
JA
105
125
R
JC
2.5
3
Maximum Junction-to-Case
B
Steady-State
C/W
Thermal Characteristics
Parameter
Units
Maximum Junction-to-Ambient
A
Steady-State
C/W
Junction and Storage Temperature Range
-55 to 175
A
Repetitive avalanche energy L=0.1mH
C
mJ
Power Dissipation
B
T
C
=25C
P
D
W
T
C
=100C
Avalanche Current
C
Continuous Drain
Current
G
Maximum
Units
Parameter
T
C
=25C
T
C
=100C
Absolute Maximum Ratings T
A
=25C unless otherwise noted
I
D
Gate-Source Voltage
Drain-Source Voltage
-60
Pulsed Drain Current
C
-12
-10
-30
C
V
V
20
25
A
-12
23
50
AOU403
P-Channel Enhancement Mode Field Effect Transistor
Features
V
DS
(V) = -60V
I
D
= -12A (V
GS
= -10V)
R
DS(ON)
< 115m
(V
GS
= -10V)
R
DS(ON)
< 150m
(V
GS
= -4.5V)
General Description
The AOU403 uses advanced trench technology and
design to provide excellent R
DS(ON)
with low gate
charge. This device is suitable for use in PWM, load
switching and general purpose applications. Standard
Product AOU403 is Pb-free (meets ROHS & Sony
259 specifications). AOU403L is a Green Product
ordering option. AOU403 and AOU403L are
electrically identical.
G
D
S
Top View
Drain Connected
to Tab
TO-251
G D S
Alpha & Omega Semiconductor, Ltd.
AOU403
Symbol
Min
Typ
Max
Units
BV
DSS
-60
V
-0.003
-1
T
J
=55C
-5
I
GSS
100
nA
V
GS(th)
-1.5
-2.1
-3
V
I
D(ON)
-30
A
91
115
T
J
=125C
150
114
150
m
g
FS
12.8
S
V
SD
-0.76
-1
V
I
S
-12
A
C
iss
987
1185
pF
C
oss
114
pF
C
rss
46
pF
R
g
7
10
Q
g
(10V)
15.8
20
nC
Q
g
(4.5V)
7.4
9
nC
Q
gs
3
nC
Q
gd
3.5
nC
t
D(on)
9
ns
t
r
10
ns
t
D(off)
25
ns
t
f
11
ns
t
rr
27.5
35
ns
Q
rr
30
nC
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE
Maximum Body-Diode Continuous Current
Input Capacitance
Output Capacitance
Turn-On DelayTime
DYNAMIC PARAMETERS
V
GS
=0V, V
DS
=-30V, f=1MHz
Gate Drain Charge
Total Gate Charge (10V)
V
GS
=-10V, V
DS
=-30V, I
D
=-12A
Turn-On Rise Time
Turn-Off DelayTime
V
GS
=-10V, V
DS
=-30V, R
L
=2.5
,
R
GEN
=3
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
Turn-Off Fall Time
SWITCHING PARAMETERS
Total Gate Charge (4.5V)
Gate Source Charge
m
V
GS
=-4.5V, I
D
=-8A
I
S
=-1A,V
GS
=0V
V
DS
=-5V, I
D
=-12A
R
DS(ON)
Static Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
I
DSS
A
Gate Threshold Voltage
V
DS
=V
GS
I
D
=-250
A
V
DS
=-48V, V
GS
=0V
V
DS
=0V, V
GS
=20V
Zero Gate Voltage Drain Current
Gate-Body leakage current
Electrical Characteristics (T
J
=25C unless otherwise noted)
STATIC PARAMETERS
Parameter
Conditions
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge I
F
=-12A, dI/dt=100A/
s
Drain-Source Breakdown Voltage
On state drain current
I
D
=-250
A, V
GS
=0V
V
GS
=-10V, V
DS
=-5V
V
GS
=-10V, I
D
=-12A
Reverse Transfer Capacitance
I
F
=-12A, dI/dt=100A/
s
A: The value of R qJA is measured with the device in a still air environment with T A =25C.
B. The power dissipation PD is based on TJ(MAX)=175C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175C.
D. The R qJA is the sum of the thermal impedence from junction to case R qJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 ms pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming
a maximum junction temperature of TJ(MAX)=175C.
G. The maximum current rating is limited by bond-wires.
Rev 2: August 2005
Alpha & Omega Semiconductor, Ltd.
AOU403
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0
1
2
3
4
5
-V
GS
(Volts)
Figure 2: Transfer Characteristics
-I
D
(A)
80
100
120
140
160
180
200
220
0
5
10
15
20
25
-I
D
(A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
R
DS
(
O
N)
(m
)
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-V
SD
(Volts)
Figure 6: Body-Diode Characteristics
-I
S
(A)
25C
125C
0.8
1
1.2
1.4
1.6
1.8
2
0
25
50
75
100
125
150
175
Temperature (C)
Figure 4: On-Resistance vs. Junction
Temperature
No
r
m
al
i
z
ed
On
-Resi
stan
ce
V
GS
=-4.5V
I
D
=-8A
V
GS
=-10V
I
D
=-12A
50
100
150
200
250
300
2
4
6
8
10
-V
GS
(Volts)
Figure 5: On-Resistance vs. Gate-Source Voltage
R
DS
(
O
N)
(m
)
25C
125C
V
DS
=-5V
V
GS
=-4.5V
V
GS
=-10V
I
D
=-12A
25C
125C
0
5
10
15
20
25
30
0
1
2
3
4
5
-V
DS
(Volts)
Fig 1: On-Region Characteristics
-I
D
(A)
V
GS
=-4V
-3.5V
-6V
-7V
-10V
-4.5V
-5V
-3V
Alpha & Omega Semiconductor, Ltd.
AOU403
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
0
2
4
6
8
10
0
4
8
12
16
-Q
g
(nC)
Figure 7: Gate-Charge Characteristics
-V
GS
(V
o
l
ts)
0
200
400
600
800
1000
1200
0
5
10
15
20
25
30
-V
DS
(Volts)
Figure 8: Capacitance Characteristics
Cap
aci
tan
ce (p
F
)
C
iss
0
40
80
120
160
200
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Case (Note F)
Po
w
e
r
(
W
)
0.01
0.1
1
10
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Z
JC
No
r
m
al
i
z
ed
T
r
an
si
en
t
T
h
e
r
m
al
Resi
stan
ce
C
oss
C
rss
0.1
1.0
10.0
100.0
0.1
1
10
100
-V
DS
(Volts)
-I
D
(Am
p
s)
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
100
s
10ms
1ms
DC
R
DS(ON)
limited
T
J(Max)
=175C, T
A
=25C
V
DS
=-30V
I
D
=-12A
Single Pulse
D=T
on
/T
T
J,PK
=T
C
+P
DM
.Z
JC
.R
JC
R
JC
=3C/W
T
on
T
P
D
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
T
J(Max)
=175C
T
A
=25C
10
s
Alpha & Omega Semiconductor, Ltd.
AOU403
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
6
8
10
12
14
0.00001
0.0001
0.001
Time in avalanche, t
A
(s)
Figure 12: Single Pulse Avalanche capability
-I
D
(A),
P
eak Aval
an
ch
e Cu
r
r
e
n
t
0
10
20
30
40
50
60
0
25
50
75
100
125
150
175
T
CASE
(C)
Figure 13: Power De-rating (Note B)
P
o
w
e
r D
i
s
s
i
pa
t
i
on (
W
)
0
2
4
6
8
10
12
14
0
25
50
75
100
125
150
175
T
CASE
(C)
Figure 14: Current De-rating (Note B)
C
u
rre
nt
ra
t
i
ng -
I
D
(A)
DD
D
A
V
BV
I
L
t
-
=
T
A
=25C
Alpha & Omega Semiconductor, Ltd.
PDF 
ZIP