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Электронный компонент: AX88861

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ASIX ELECTRONICS CORPORATION
2F, NO.13, Industry East Rd. II, Science-based Industrial Park, Hsin-Chu City, Taiwan, R.O.C.
TEL: 886-3-579-9500
FAX: 886-3-579-9558
AX88861
100BASE-TX/FX Repeater Controller
ASIX
ASIX AX88861
5 Ports 10/100BASE-TX/FX
Repeater Controller
Data Sheet(12/12/'97)
DOCUMENT NO. : AX861D1.DOC
This data sheets contain new products information. ASIX ELECTRONICS reserves the rights to modify the products
specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent
accompany the sale of the product.
Always contact ASIX for possible updates
before starting a design.
AX88861
PRELIMINARY
ASIX ELECTRONICS CORPORATION
2
CONTENTS
1.0 AX88861 OVERVIEW ..............................................................................................................................................4
1.1 G
ENERAL
D
ESCRIPTION
............................................................................................................................................4
1.2 F
EATURES
.................................................................................................................................................................5
1.3 B
LOCK
D
IAGRAM
......................................................................................................................................................6
1.4 P
IN
C
ONNECTION
D
IAGRAM
(
MODE
0) ......................................................................................................................7
1.5 P
IN
C
ONNECTION
D
IAGRAM
(
MODE
1) ......................................................................................................................8
2.0 PIN DESCRIPTION ..................................................................................................................................................9
2.1 S
HARED
MII
INTERFACE
...........................................................................................................................................9
2.2 D
EDICATED
MII
INTERFACE
...................................................................................................................................10
2.3 E
XPANSION
B
US
I
NTERFACE
...................................................................................................................................11
2.4 LED D
ISPLAY
.........................................................................................................................................................12
2.5 M
ISCELLANEOUS
.....................................................................................................................................................13
3.0 FUNCTIONAL DESCRIPTION ...........................................................................................................................14
3.1 R
EPEATER
S
TATE
M
ACHINE
....................................................................................................................................15
3.2 RXE /TXE CONTROL .........................................................................................................................................15
3.3 J
ABBER
S
TATE
M
ACHINE
........................................................................................................................................16
3.4 P
ARTITION
S
TATE
M
ACHINE
...................................................................................................................................16
3.5 E
XPANSION
L
OGIC
(C
ASCADE
I
NTERFACE
)..............................................................................................................16
3.6 D
ATA
F
LOW CONTROL
............................................................................................................................................17
3.7 RID R
ECEIVE
-T
RANSMIT
I
NTERFACE
(D
AISY
C
HAIN
L
OGIC
) ..................................................................................17
3.8 LED D
ISPLAY
I
NTERFACE
......................................................................................................................................17
4.0 INTERNAL REGISTERS.......................................................................................................................................19
4.1 C
ONFIGURATION
R
EGISTER
(CONFIG) ..................................................................................................................19
4.2 R
EPEATER
ID R
EGISTER
(RPTR_ID).......................................................................................................................19
5.0 ELECTRICAL SPECIFICATION AND TIMING...............................................................................................20
5.1 A
BSOLUTE
M
AXIMUM
R
ATINGS
..............................................................................................................................20
5.2 G
ENERAL
O
PERATION
C
ONDITIONS
........................................................................................................................20
5.3 DC C
HARACTERISTICS
............................................................................................................................................20
5.4 AC
SPECIFICATIONS
................................................................................................................................................21
5.4.1 MII Interface Timing Tx & Rx........................................................................................................................21
5.4.2 Expansion Bus.................................................................................................................................................22
5.4.3 LED DISPLAY.................................................................................................................................................23
5.4.4 LED Display After Reset ................................................................................................................................23
5.4.5 Repeater ID Daisy Chain ................................................................................................................................24
6.0 PACKAGE INFORMATION .................................................................................................................................25
AX88861
PRELIMINARY
ASIX ELECTRONICS CORPORATION
3
FIGURES
F
IG
- 1 C
HIP
B
LOCK
D
IAGRAM
...........................................................................................................................................6
F
IG
- 2 P
IN
C
ONNECTION
D
IAGRAM FOR MODE
0...............................................................................................................7
F
IG
- 3 P
IN
C
ONNECTION
D
IAGRAM FOR MODE
1................................................................................................................8
F
IG
- 4 F
UNCTIONAL
B
LOCK
D
IAGRAM
............................................................................................................................14
F
IG
- 5 A
PPLICATION FOR
LED
DISPLAY
..........................................................................................................................18
AX88861
PRELIMINARY
ASIX ELECTRONICS CORPORATION
4
1.0 AX88861 Overview
The AX88861 10/100Mbps Repeater Controller is design for low cost dumb HUB
application. The AX88861 directly supports up-to five 10/100Mbps links with its shared 5
ports MII interfaces and 1 dedicated MII interface. Maximum up-to 48 ports can be constructed
when using expansion bus cascades 8 AX88861s. The AX88861 is designed base on IEEE
802.3u clause 27 " Repeater for 100Mb/s base-band networks" . It is fully compatible with
IEEE 802.3u standard=.
1.1 General Description
The AX88861 Repeater Controller is a subset of a repeater set containing all the
repeater-specific components and functions, exclusive of PHY components and functions. The
AX88861 has only Media Independent Interface (MII) to connect to PHY devices. Other then
AX88850 series chips that has 2 kinds of interfaces. There are Physical coding sub-layer (PCS)
interface and Media Independent Interface (MII).
The AX88861 supports one shared bus (5 ports) MII interfaces, 1 dedicated MII ports
interface, a port expansion interface and LED display interface.
The AX88861 dedicated MII ports can connect to PHY or optional directly connect to 2
ports bridge, switch or MAC that has standard MII interface.
The AX88861 has two application modes.
Mode 0
Single chip repeater application.
Mode 1
Multiple chips cascaded repeater application.
= Note : To simplify the design of 10BASE Ethernet repeater. The portion of 10Mb/p repeater
will follow the specification as below :
(1) The PHY interface defines as standard MII interface with 2.5MHz transmit and
receive clock and 4 bits data format.
(2) The repeater core state machine follow IEEE 802.3u clause 27
"
Repeater for 100
Mb/s baseband networks
"
with ten times of time scale. It is important that it is no
longer follows the legacy 10BASE repeater state machine.
AX88861
PRELIMINARY
ASIX ELECTRONICS CORPORATION
5
1.2 Features
IEEE 802.3u repeater compatible
Supports 10/100Mbps alternative
Supports 5+1 network connections
5 ports share MII interfaces direct interface to PHY chip with MII interface
1 dedicated MII interfaces can also support 100BASE-T4/FX PHY interfaces
The 1 dedicated MII interfaces can also easily connect to bridging device with MII interface
Up-to 8 repeater chips can be cascaded for large HUB application
Low latency design supports Class II repeater implementation with large port number
All ports can be separately isolated or partitioned in response to fault condition
Separate jabber and partition state machines for each port
Encoded or direct LED drivers
Per-port LED display for Jabber, Partition, Activity. Global collision, utilization and
collision (%) presentation
Power on LED diagnosis. All the LED display will follow the "ON-OFF-ON-OFF-
Normal" operation procedure during/after power on reset ( mode 1 only ).
100-pin PQFP