1
Features
Industry-standard Architecture
Emulates Many 24-pin PALs
Low-cost Easy-to-use Software Tools
High-speed Electrically-erasable Programmable Logic Devices
7.5 ns Maximum Pin-to-pin Delay
Several Power Saving Options
CMOS and TTL Compatible Inputs and Outputs
Input and I/O Pull-up Resistors
Advanced Flash Technology
Reprogrammable
100% Tested
High-reliability CMOS Process
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
200 mA Latchup Immunity
Commercial and Industrial Temperature Ranges
Dual-in-line and Surface Mount Packages in Standard Pinouts
PCI-Compliant
Block Diagram
Device
I
CC
, Standby
I
CC
, Active
ATF20V8B
50 mA
55 mA
ATF20V8BQ
35 mA
40 mA
ATF20V8BQL
5 mA
20 mA
High-
performance
EE PLD
ATF20V8B
ATF20V8BQ
ATF20V8BQL
Rev. 0407H04/01
Pin Configurations
All Pinouts Top View
Pin Name
Function
CLK
Clock
I
Logic Inputs
I/O
Bi-directional Buffers
OE
Output Enable
*
No Internal Connection
VCC
+5V Supply
TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
DIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
PLCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
IN
IN
IN
*
IN
IN
IN
I/O
I/O
I/O
*
I/O
I/O
I/O
4
3
2
1
28
27
26
12
13
14
15
16
17
18
IN
IN
GND
*
OE/IN
IN
I/O
IN
IN
CLK/IN
*
VCC
IN
I/O
ATF20V8B(Q)(L)
2
Description
The ATF20V8B is a high-performance CMOS (electrically-
erasable) programmable logic device (PLD) that utilizes
Atmel's proven electrically-erasable Flash memory technol-
ogy. Speeds down to 7.5 ns and power dissipation as low
as 10 mA are offered. All speed ranges are specified over
the full 5V
10% range for industrial temperature ranges,
and 5V
5% for commercial temperature ranges.
Several low-power options allow selection of the best solu-
tion for various types of power-limited applications. Each of
these options significantly reduces total system power and
enhances system reliability.
The ATF20V8Bs incorporate a superset of the generic
architectures, which allows direct replacement of the 20R8
family and most 24-pin combinatorial PLDs. Eight outputs
are each allocated eight product terms. Three different
modes of operation, configured automatically with soft-
ware, allow highly complex logic functions to be realized.
Absolute Maximum Ratings*
Temperature Under Bias................................ -55C to +125C
*NOTICE:
Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Note:
1.
Minimum voltage is -0.6V DC which may under-
shoot to -2.0V for pulses of less than 20 ns.Maxi-
mum output pin voltage is V
CC
+ 0.75V DC which
may overshoot to 7.0V for pulses of less than 20
ns.
Storage Temperature ..................................... -65C to +150C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V
(1)
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
DC and AC Operating Conditions
Commercial
Industrial
Operating Temperature (Ambient)
0C - 70C
-40C - 85C
V
CC
Power Supply
5V
= 5%
5V
= 10%
ATF20V8B(Q)(L)
3
Notes:
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
2. Shaded parts are obsolete with a last time buy date of 19 August 1999.
DC Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Units
I
IL
Input or I/O Low
Leakage Current
0
=V
IN
=V
IL
(Max)
-35
-100
A
I
IH
Input or I/O High
Leakage Current
3.5
=V
IN
=V
CC
10
A
I
CC
Power Supply
Current, Standby
V
CC
= Max,
V
IN
= Max,
Outputs Open
B-7, -10
Com.
60
90
mA
Ind.
60
100
mA
B-15
Com.
60
80
mA
B-15
Ind.
60
90
mA
B-25
Com.
60
80
mA
B-25
Ind.
60
90
mA
BQ-10
Com.
35
55
mA
BQL-15
Com.
5
10
mA
BQL-15
Ind.
5
15
mA
BQL-25
Com.
5
10
mA
BQL-25
Ind.
5
15
mA
I
CC2
Clocked Power
Supply Current
V
CC
= Max,
Outputs Open,
f = 15 MHz
B-7, -10
Com.
80
110
mA
Ind.
80
125
mA
B-15
Com.
60
90
mA
B-15
Ind.
60
105
mA
B-25
Com.
60
90
mA
B-25
Ind.
60
105
mA
BQ-10
Com.
40
55
mA
BQL-15
Com.
20
35
mA
BQL-15
Ind.
20
40
mA
BQL-25
Com.
20
35
mA
BQL-25
Ind.
20
40
mA
IOS
(1)
Output Short
Circuit Current
V
OUT
= 0.5V
-130
mA
V
IL
Input Low Voltage
-0.5
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 0.75
V
V
OL
Output Low Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OL
= 24 mA
Com.,
Ind.
0.5
V
I
OL
= 16 mA
0.5
V
V
OH
Output High Voltage
V
IN
= V
IH
or V
IL
,
V
CC
= Min
I
OH
= -4.0 mA
2.4
V
ATF20V8B(Q)(L)
4
AC Waveforms
(1)
Note:
1.
Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
Note:
1.
See ordering information for valid part numbers and speed grades.
2.
Shaded parts are obsolete with a last time buy data of of 19 August 1999.
AC Characteristics
(1)
Symbol
Parameter
-7
-10
-15
-25
Units
Min
Max
Min
Max
Min
Max
Min
Max
t
PD
Input or Feedback to
Non-Registered Output
8 outputs switching
3
7.5
3
10
3
15
3
25
ns
1 output switching
7
ns
t
CF
Clock to Feedback
3
6
8
10
ns
t
CO
Clock to Output
2
5
2
7
2
10
2
12
ns
t
S
Input or Feedback
Setup Time
5
7.5
12
15
ns
t
H
Hold Time
0
0
0
0
ns
t
P
Clock Period
8
12
16
24
ns
t
W
Clock Width
4
6
8
12
ns
f
MAX
External Feedback 1/(t
S
+ t
CO
)
100
68
45
37
MHz
Internal Feedback 1/(t
S
+ t
CF
)
125
74
50
40
MHz
No Feedback 1/(t
P
)
125
83
62
41
MHz
t
EA
Input to Output Enable -- Product Term
3
9
3
10
3
15
3
20
ns
t
ER
Input to Output Disable --Product Term
2
9
2
10
2
15
2
20
ns
t
PZX
OE pin to Output Enable
2
6
2
10
2
15
2
20
ns
t
PXZ
OE pin to Output Disable
1.5
6
1.5
10
1.5
15
1.5
20
ns
ATF20V8B(Q)(L)
5
Input Test Waveforms and
Measurement Levels
t
R
, t
F
< 5 ns (10% to 90%)
Output Test Loads
Commercial
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power-up Reset
The registers in the ATF20V8Bs are designed to reset dur-
ing power-up. At a point delayed slightly from V
CC
crossing
V
RST
, all registers will be reset to the low state. As a result,
the registered output state will always be high on power-up.
This feature is critical for state machine initialization. How-
ever, due to the asynchronous nature of reset and the
uncertainty of how V
CC
actually rises in the system, the fol-
lowing conditions are required:
1.
The V
CC
rise must be monotonic,
2.
After reset occurs, all input and feedback setup
times must be met before driving the clock pin high,
and
3.
The clock must remain stable during t
PR
.
Preload of Registered Outputs
The ATF16V8B's registers are provided with circuitry to
allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC file
preload sequence will be done automatically by most of the
approved programmers after the programming.
Electronic Signature Word
There are 64 bits of programmable memory that are always
available to the user, even if the device is secured. These
bits can be used for user-specific data.
Security Fuse Usage
A single fuse is provided to prevent unauthorized copying
of the ATF20V8B fuse patterns. Once programmed, fuse
verify and preload are inhibited. However, the 64-bit User
Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
Programming/Erasing
Programming/erasing is performed using standard PLD
programmers. For further information, see the Configurable
Logic Databook, section titled, "CMOS PLD Programming
Hardware and Software Support."
Pin Capacitance
f = 1 MHz, T = 25C
(1)
Typ
Max
Units
Conditions
C
IN
5
8
pF
V
IN
= 0V
C
OUT
6
8
pF
V
OUT
= 0V
Parameter
Description
Typ
Max
Units
t
PR
Power-up Reset Time
600
1,000
ns
V
RST
Power-up Reset Voltage
3.8
4.5
V
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