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Электронный компонент: U2785B-MFSG3

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U2785B
Preliminary Information
Rev. A5, 18-Aug-00
1 (15)
DECT PLL / TX IC
Description
The U2785B is an RF IC for low-power DECT transmit
applications. The SSO28-packaged IC is a complete PLL
including a 1-GHz prescaler, on-chip frequency doubler,
biasing for off-chip VCO, an integrated TX-filter and a
modulation compensation circuit for advanced closed-
loop modulation concept. No mechanical tuning is
necessary in production.
Electrostatic sensitive device.
Observe precautions for handling.
Features
D 1-GHz PLL, TX data filter (10.368-MHz /
20.736-MHz reference clock), frequency doubler
D Low current consumption
D Few external components
D Supply-voltage range 2.7 V to 4.7 V
D Switchable charge-pump current for enhanced
switching time
D Two operational amplifiers for active loop filter
D Advanced closed-loop modulation (with
10.368-MHz / 20.736-MHz reference clock) and
open-loop modulation supported
Block Diagram
f
14638
PC
n
f
2f
FD
CP
f
n
RC
Bandgap
Control
logic
PD
MCC
GF
DAC
3wire bus
OP 1
+
OP 2
+
FD_OUT1
TX_DATA
RF_IN
DAC
PU
OLE
OP_REF_P
OP1_N
OP1_OUT
OP2_N
OP2_OUT CLOCK DATA ENABLE
GF_DATA
LD
FD_OUT2
CP
REF_CLK
Figure 1. Block diagram
Ordering Information
Extended Type Number
Package
Remarks
U2785B-MFS
SSO28
Tube
U2785B-MFSG3
SSO28
Taped and reeled
U2785B
Rev. A5, 18-Aug-00
Preliminary Information
2 (15)
Pin Description
Pin
Symbol
Function
1
CLOCK
3-wire bus: clock input
2
DATA
3-wire bus: data input
3
ENABLE
3-wire bus: enable input
4
REF_CLK
Reference frequency input
5
LD
Lock-detect output
6
I_CP_SW
Charge-pump current switch
7
GND_FD_
OUT
Frequency doubler buffer
ground
8
FD_OUT1
Frequency doubler buffer
9
FD_OUT2
Frequency doubler buffer
output
10
VS
Supply voltage
11
GF_DATA
Modulation output
(Gaussian-filtered data signal)
12
GND_CP
Charge-pump ground
13
VS_CP
Charge-pump supply voltage
14
CP
Charge-pump output
15
OP1_N
Operational amplifier 1 invert-
ing input
16
OP_REF_P
Operational amplifier
reference voltage (internal)
17
OP1_OUT
Operational amplifier 1 output
18
GND_OP
Operational amplifier ground
19
OP2_N
Operational amplifier 2 invert-
ing input
20
OP2_OUT
Operational amplifier 2 output
21
VCO_BIAS
VCO bias voltage output
22
GND_RF_IN
RF input ground
23
RF_IN
RF input from VCO to doubler
and PLL
24
DAC
DAC for VCO pretune
25
GND_D
Digital ground
26
OLE
Open-loop enable input
27
PU
Power-up input (active high)
28
TX_DATA
Digital TX data input to
Gaussian filter and modulation-
compensation circuit
GF_DATA
CLOCK
DATA
ENABLE
REF_CLK
LD
I_CP_SW
GND_FD_OUT
FD_OUT1
FD_OUT2
VS
GND_CP
VS_CP
CP
1
2
3
4
5
6
7
8
10
9
27
22
21
20
18
19
17
12
11
28
25
26
23
24
16
15
14
13
OP1_N
OP_REF_P
OP1_OUT
GND_OP
OP2_N
OP2_OUT
VCO_BIAS
GND_RF_IN
RF_IN
DAC
GND_D
OLE
PU
TX_DATA
U2785B
Figure 2. Pinning
U2785B
Preliminary Information
Rev. A5, 18-Aug-00
3 (15)
Functional Blocks
CP
Charge pump
DAC
D/A converter for pretuning the VCO
FD
Frequency doubler
GF
Gaussian filter for transmit data
OP1
1st amplifier for loop filter
OP2
2nd amplifier for loop filter
MCC
Modulation-compensation circuit
PC
Programmable counter =
main counter (MC) + swallow counter (SC)
PD
Phase detector
RC
Reference counter
VCO
Voltage-controlled oscillator
Absolute Maximum Ratings
All voltages refer to GND (Pins 7, 12, 18, 22 and 25)
Parameter
Symbol
Value
Unit
Supply voltage
Pins 10, 13
V
S
5.0
V
Logic input voltage
Pins 1, 2, 3, 6, 26, 27 and 28
V
IN
0.3 to V
S
V
Junction temperature
T
j
150
C
Storage temperature
T
stg
40 to +150
C
Thermal Resistance
Parameter
Symbol
Value
Unit
Junction ambient
R
thJA
130
K/W
Operating Range
All voltages refer to GND (Pins 7, 12, 18, 22 and 25)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Supply voltage
V
S
2.7
3.0
4.7
V
Ambient temperature
T
amb
25
+25
+85
C
U2785B
Rev. A5, 18-Aug-00
Preliminary Information
4 (15)
Electrical Characteristics
Test conditions (unless otherwise specified) : V
S
= 3 V, T
amb
= 25
C
Parameter
Test Conditions / Pins
Symbol
Min.
Typ.
Max.
Unit
Power supply
Pin 10
Supply current
V
PU
= low level = `0`
I
S,OFF
1
10
A
pp y
RX (OLE = `1`)
I
S
5.6
mA
TX (OLE = `0`)
I
S
13
mA
TX, MCC ON
I
S
15
mA
TX, MCC, GF ON
I
S
17
mA
TX, MCC, GF, OP ON
I
S
19
mA
TX, MCC, GF, OP, FD ON
I
S
30
mA
Supply current CP
V
VS_CP
= 3 V,
PLL in lock condition, Pin 14
I
CP
1
A
Frequency doubler
f
RF_IN
= 900 MHz
Output power
P
RF_IN
= 10 dBm,
Z
load
= 50
W (differential),
Pins 8 and 9 (differential)
P
FD_OUT
10
5
3
dBm
Harmonic suppression
P
RF_IN
= 10 dBm, 2nd and 3rd,
Pin 8 and 9 (differential)
HS
20
dBc
Subharmonic suppression
P
RF_IN
= 10 dBm,
Pin 8 and 9 (differential)
SHS
20
dBc
PLL
Input frequency
Pin 23
f
RF_IN
800
1000
MHz
Input voltage
f
RF_IN
= 800 to 1000 MHz
AC-coupled sine wave Pin 23
V
RF_IN
20
200
mV
rms
Scaling factor prescaler
S
PSC
32/33
Scaling factor main
counter
S
MC
31/32/
33/34
Scaling factor swallow
counter
S
SC
0
31
Scaling factor reference
counter
Pin 4
S
RC
12/16/
24
External reference input
frequency
AC-coupled sine wave
Pin 4
f
REF_CLK
5
10.368
20.736
22
MHz
External reference input
voltage
AC-coupled sine wave
Pin 4
V
REF_CLK
50
250
mV
rms
U2785B
Preliminary Information
Rev. A5, 18-Aug-00
5 (15)
Electrical Characteristics (continued)
Test conditions (unless otherwise specified) : V
S
= 3 V, T
amb
= 25
C
Unit
Max.
Typ.
Min.
Symbol
Test Conditions / Pins
Parameter
Charge pump, active when RX, TX
Pin 14
Output current
CPCS = 100%, V
I_CP_SW
= '0`,
V
CP
= V
VS_CP
/ 2
I
CP_NOM1
"1
mA
CPCS = 100%, V
I_CP_SW
= '1`,
V
CP
= V
VS_CP
/ 2
I
CP_NOM5
"5
mA
Current scaling factor
See bus protocol D0...D2
I
CP
= CPCS
I
CP_NOM
CPCS
60
130
%
Leakage current
I
CP_O
100
pA
Operational amplifiers 1 and 2
Power gain bandwidth
Pins 17 and 20
PGBW
10
MHz
Excess phase
R
load
= 1 k
W, C
load
= 15 pF
Pins 17 and 20
80
degree
Input offset voltage
Pins 15, 16 and 19
V
offs
1
mV
Open-loop gain
Pins 17 and 20
g
70
dB
Output-voltage range
Pins 17 and 20
V
out
0.3
V
S
0.3
V
Common-mode input
voltage
Pins 15, 16 and 19
V
in
0.3
V
S
0.3
V
Modulation-compensation circuit @ max. DSV 64
Oversampling
f
REF_CLK
= 10.368 MHz or
f
REF_CLK
= 20.736 MHz
OVS
9
Integration counter
MAC
576
576
Current scaling factor
See bus protocol E3 ... E5
MCCS
60
130
%
Gaussian transmit filter (Gaussian shape B
T = 0.5)
f
REF_CLK
has to be chosen
TX data filter clock
f
REF_CLK
= 10.368 MHz, TX,
18 taps in filter, S
RC
= 12
f
TXFCLK
10.368
MHz
f
REF_CLK
= 20.736 MHz, TX,
18 taps in filter, S
RC
= 24
f
TXFCLK
10.368
MHz
Maximum output current
Polarity see bus protocol D13,
GFCS = 100%, Pin 11
|I
GF_NOM
|
80
A
Current scaling factor
See bus protocol D6 ... D8
I
GF_DATA
= GFCS
I
GF_NOM
Pin 11
GFCS
60
130
%
VCO biasing
Pin 21
Bias voltage
V
VCO
1.5
V
g
Standby, PU = '0`
V
VCO_O
10
mV
Temperature coefficient
TC
VCO
3.3
mV/K