SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
CS
CS
CS
CS
\
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8S512K32 and
AS8S512K32A are 16 Megabit CMOS SRAM Modules organized as
512Kx32 bits. These devices achieve high speed access, low power
consumption and high reliability by employing advanced CMOS
memory technology.
This military temperature grade product is ideally suited for
military and space applications.
FEATURES
Operation with single 5V supply
High speed: 12, 15, 17, 20, 25 and 35ns
Built in decoupling caps for low noise
Organized as 512Kx32 , byte selectable
Low power CMOS
TTL Compatible Inputs and Outputs
Future offerings
3.3V Power Supply
OPTIONS
MARKINGS
Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
XT
Industrial (-40
o
C to +85
o
C)
IT
Timing
12ns
-12
15ns
-15
17ns
-17
20ns
-20
25ns
-25
35ns
-35
45ns
-45
55ns
-55
Package
Ceramic Quad Flatpack
Q
No.702
Ceramic Quad Flatpack
Q1
Pin Grid Array
P
No.904
Low Power Data Retention Mode
L
Pinout
Military
(no indicator)
Commercial
A*
*(available with Q package only)
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-94611 (Military Pinout)
MIL-STD-883
68 Lead CQFP (Q)
Military SMD Pinout Option
512K x 32 SRAM
SRAM MEMORY ARRAY
For more products and information
please visit our web site at
www.austinsemiconductor.com
68 Lead CQFP
Commercial Pinout Option (A)
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
I/O17
I/O18
I/O19
Vss
I/O20
I/O21
I/O22
I/O23
Vcc
I/O24
I/O25
I/O26
I/O27
Vss
I/O28
I/O29
I/O30
I/O 14
I/O 13
I/O 12
Vss
I/O 11
I/O 10
I/O 9
I/O 8
Vcc
I/O 7
I/O 6
I/O 5
I/O 4
Vss
I/O 3
I/O 2
I/O 1
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O 31
A6 A5 A4 A3 A2 A1 A0 Vcc A13 A12 A11 A10 A9 A8 A7
I/O 0
I/O 16 A18 A17 CS4\ CS3\ CS2\ CS1\ NC Vcc NC NC OE\ WE\ A16 A15 A14 I/O 15
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Vcc A11 A12 A13 A14 A15 A16 CS1\ OE\ CS2\ A17 WE2\ WE3\ WE4\ A18
NC NC
NC A0 A1 A2 A3 A4 A5 CS3\ GND CS4\ WE1\ A6 A7 A8 A9 A10 Vcc
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
66 Lead PGA (P)
Military SMD Pinout
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
CS\4
CS\3
CS\2
CS\1
WE\
OE\
A0 - A18
I/O 24 - I/O 31
I/O 16 - I/O 23
I/O 8 - I/O 15
I/O 0 - I/O 7
M3
M2
M1
M0
512K x 8
512K x 8
512K x 8
512K x 8
COMMERCIAL PINOUT/BLOCK DIAGRAM
CS
MILITARY PINOUT/BLOCK DIAGRAM
CS
CS
CS
TRUTH TABLE
MODE
OE\
CE\
WE\
I/O
POWER
Read
L
L
H
D
OUT
ACTIVE
Write(2)
X
L
L
D
IN
ACTIVE
Standby
X
H
X
High Z
STANDBY
CS
CS4\
CS3\
CS2\
CS1\
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V
Storage Temperature............................................-65C to +150C
Short Circuit Output Current(per I/O).................................20mA
Voltage on Any Pin Relative to Vss....................-.5V to Vcc+1V
Maximum Junction Temperature**...................................+150C
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See the Application
Information section at the end of this datasheet for more infor-
mation.
DESCRIPTION
SYMBOL -12
-15
-17
-20
-25
-35
-45
-55 UNITS NOTES
Power Supply
Current: Operating
Icc
250
200
700
650
600
570
570
550
mA
3,13
Power Supply
Current: Standby
I
SBT1
80
80
240
240
190
190
150
150
mA
3, 13
CMOS Standby
I
SBT2
80
80
80
80
80
80
80
80
mA
VIN = VCC - 0.2V, or
VSS +0.2V
VCC=Max; f = 0Hz
MAX
CONDITIONS
CS\<VIL; VCC = MAX
f = MAX = 1/ tRC (MIN)
Outputs Open
CS\>VIH; VCC = MAX
f = MAX = 1/ tRC (MIN)
Outputs Open
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C and -40
o
C to +85
o
C; Vcc = 5V +10%)
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
Input High (logic 1) Voltage
V
IH
2.2
V
CC
+.5
V
1
Input Low (logic 1) Voltage
V
IL
-0.5
0.8
V
1,2
Input Leakage Current
ADD,OE
I
LI1
-10
10
A
Input Leakage Current
WE, CE
I
LI2
-10
10
A
Output(s) Disabled
0V<V
OUT
<V
CC
Output High Voltage
I
OH
= 4.0mA
V
OH
2.4
V
1
Output Low Voltage
I
OL
= 8.0mA
V
OL
0.4
V
1
Supply Voltage
V
CC
4.5
5.5
V
1
0V<V
IN
<V
CC
Output Leakage Current
I/O
ILO
A
10
-10
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
AC TEST CONDITIONS
NOTE:
1. This parameter is sampled.
OH
OL
I
I
Current Source
Current Source
Vz = 1.5V
(Bipolar
Supply)
Device
Under
Test
Ceff = 50pf
-
+
+
NOTES:
Vz is programmable from -2V to + 7V.
I
OL
and I
OH
programmable from 0 to 16 mA.
Vz is typically the midpoint of V
OH
and V
OL
.
I
OL
and I
OH
are adjusted to simulate a typical resistive load
circuit.
Input pulse levels.........................................V
SS
to 3V
Input rise and fall times.........................................5ns
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..............................................See Figure 1
Test Specifications
SYMBOL
PARAMETER
MAX
UNITS
C
ADD
A0 - A18 Capacitance
50
pF
C
OE
OE\ Capacitance
50
pF
C
WE,
C
CS
WE\ and CS\ Capacitance
20
pF
C
IO
I/O 0- I/O 31 Capacitance
20
pF
C
WE
("A" version)
WE\ Capacitance
50
pF
CAPACITANCE (V
IN
= 0V, f = 1MHz, T
A
= 25
o
C
)1
Figure 1
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55
o
C<T
A
< 125
o
C and -40
o
C to +85
o
C; V
CC
= 5V +10%)
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
READ cycle time
t
RC
12
15
17
20
25
35
45
55
ns
Address access time
t
AA
12
15
17
20
25
35
45
55
ns
Chip select access time
t
ACS
12
15
17
20
25
35
45
55
ns
Output hold from address change
t
OH
2
2
2
2
2
2
2
2
ns
Chip select to output in Low-Z
t
LZCS
2
2
2
2
2
2
2
2
ns
4,6,7
Chip select to output in High-Z
t
HZCS
7
8
9
10
12
15
20
20
ns
4,6,7
Output enable access time
t
AOE
7
8
9
10
12
15
20
20
ns
Output enable to output in Low-Z
t
LZOE
0
0
0
0
0
0
0
0
ns
4,6
Output disable to output in High-Z
t
HZOE
12
12
12
15
20
20
ns
4,6
WRITE cycle time
t
WC
12
15
17
20
25
35
45
55
ns
Chip select to end of write
t
CW
10
12
15
15
17
20
25
25
ns
Address valid to end of write
t
AW
10
12
15
15
17
20
25
25
ns
Address setup time
t
AS
2
2
2
2
2
2
2
2
ns
Address hold from end of write
t
AH
1
1
1
1
1
1
1
1
ns
WRITE pulse width
t
WP1
10
12
15
15
17
20
25
25
ns
WRITE pulse width
t
WP2
10
12
15
15
17
20
25
25
ns
Data setup time
t
DS
8
10
12
10
12
15
20
20
ns
Data hold time
t
DH
0
0
0
0
0
0
0
0
ns
Write disable to output in Low-z
t
LZWE
2
2
2
2
2
2
2
2
ns
4,6,7
Write enable to output in High-Z
t
HZWE
7
8
9
11
13
15
15
15
ns
4,6,7
UNITS
-35
-12
-15
-45
-55
WRITE CYCLE
READ CYCLE
DESCRIPTION
-20
-17
-25
SYMBOL
NOTES
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
READ CYCLE NO. 1
READ CYCLE NO. 2
1234
1234
1234
1234
1234
1234
12345
12345
12345
1
1
1
1
1
1
ADDRESS
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
OH
t
AA
t
RC
ADDRESS
t
RC
12345678
12345678
12345678
12345678
12345678
1234
1234
1234
1234
1234
12345
12345
12345
12345
123456789
123456789
123456789
123456789
123456789
123456
123456
123456
123456
123456
1234567
1234567
1234567
1234567
123456789012
123456789012
123456789012
123456789012
123456789012
1234
1234
1234
1234
1234
12345
12345
12345
12345
123456789012
123456789012
123456789012
123456789012
123456789012
123456
123456
123456
123456
123456
1234567
1234567
1234567
1234567
1234
1234
1234
1234
1234
1234
1234
1234
123
123
123
123
1
1
1
1
1
1
1
1
HIGH IMPEDANCE
DATA VALID
t
AA
t
ACS
t
LZCS
t
HZCS
t
HZOE
t
AOE
t
LZOE
CS\
OE\
DATA I/O
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
WRITE CYCLE NO. 2
(Write Enable Controlled)
WRITE CYCLE NO. 1
(Chip Select Controlled)
ADDRESS
t
WC
123456
123456
123456
123456
DATA VALID
t
AW
t
AS
t
WP2
1
t
CW
CS\
WE\
DATA I/O
t
DH
t
DS
12345678
12345678
12345678
12345678
123456789012
123456789012
123456789012
123456789012
12345
12345
12345
12345
123456
123456
123456
123456
t
AH
ADDRESS
t
WC
12345678
12345678
12345678
12345678
12345678
1234
1234
1234
1234
1234
12345
12345
12345
12345
12345
123456789012
123456789012
123456789012
123456789012
123456789012
12345
12345
12345
12345
12345
1234567
1234567
1234567
1234567
1234567
123456
123456
123456
123456
1234
1234
1234
12345678901234
12345678901234
12345678901234
1
1
1
1
1
1
DATA VALID
t
AW
t
CW
t
AS
t
AH
t
LZWE
t
WP1
1
t
HZWE
CS\
WE\
DATA I/O
1234
1234
1234
1234
1234
1234
1234
1234
1234
1234
1234
t
DH
t
DS
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
7. At any given temperature and voltage condition,
t
HZCS
, is less than t
LZCS
, and t
HZWE
is less than t
LZWE
.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest occurring
chip enable.
11. t
RC
= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
13. I
CC
is for 32 bit mode.
NOTES
1. All voltages referenced to V
SS
(GND).
2. -2V for pulse width <20ns.
3. I
CC
is dependent on output loading and cycle rates.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 unless otherwise noted.
6. t
HZCS
, t
HZOE
and t
HZWE
are specified with C
L
= 5pF as in Fig. 2.
Transition is measured +/- 200 mV typical from steady state
voltage, allowing for actual tester RC time constant.
RC(MIN)
unloaded, and f=
H
Z.
t
1
LOW V
CC
DATA RETENTION WAVEFORM
LOW POWER CHARACTERISTICS (L Version Only)
DESCRIPTION
SYMBOL
MIN
MAX
UNITS
NOTES
V
CC
for Retention Data
V
DR
2
V
V
CC
= 2V
I
CCDR
20
mA
V
CC
= 3V
I
CCDR
28*
mA
Chip Deselect to Data
Retention Time
t
CDR
0
ns
4
Operation Recovery Time
t
R
t
RC
ns
4, 11
Data Retention Current
All Inputs @ Vcc + 0.2V
or Vss + 0.2V,
CS\ = Vcc + 0.2V
CONDITIONS
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
12345
12345
12345
12345
12345
12345
12345
12345
12345678
12345678
12345678
12345678
12345678
12345678
12345678
12345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
123456789012345678
12345
12345
12345
12345
12345
12345
12345
12345
12345678
12345678
12345678
12345678
12345678
12345678
12345678
12345678
DATA RETENTION MODE
4.5V
4.5V
V
DR
>2V
V
DR
t
CDR
t
R
V
CC
CS\ 1-4
* -12 and -15 have a 32mA limit.
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
MECHANICAL DEFINITIONS*
ASI Case #702 (Package Designator Q)
SMD 5962-94611, Case Outline M
*All measurements are in inches.
4 x D2
4 x D1
D
b
e
MIN
MAX
A
0.123
0.200
A1
0.118
0.186
A2
0.000
0.020
B
b
0.013
0.017
D
D1
0.870
0.890
D2
0.980
1.000
E
0.936
0.956
e
R
0.005
---
L1
0.035
0.045
SYMBOL
0.800 BSC
0.050 BSC
SMD SPECIFICATIONS
0.010 REF
A2
SEE DETAIL A
A
A1
E
DETAIL A
L1
1
o
- 7
o
R
B
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
MECHANICAL DEFINITIONS*
ASI Case #904 (Package Designator P )
SMD 5962-94611, Case Outline T
*All measurements are in inches.
4 x D
D1
D2
E1
Pin 66
e
Pin 11
Pin 1
(identified by
0.060 square pad)
Pin 56
A
A1
L
b
e
b1
MIN
MAX
A
0.144
0.181
A1
0.025
0.035
b
0.016
0.020
b1
0.045
0.055
D
1.065
1.085
D1/E1
D2
e
L
0.145
0.155
0.600 TYP
0.100 TYP
SYMBOL
1.000 TYP
SMD SPECIFICATIONS
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
MECHANICAL DEFINITIONS*
ASI Case (Package Designator Q1)
SMD 5962-94611, Case Outline A
*All measurements are in inches.
MIN
MAX
A
---
0.200
A1
0.054
---
b
0.013
0.017
B
c
0.009
0.012
D/E
0.980
1.000
D1/E1
0.870
0.890
D2/E2
e
L
0.035
0.045
R
SYMBOL
SMD SPECIFICATIONS
0.010 TYP
0.010 TYP
0.800 BSC
0.050 BSC
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
Device Number
Options**
Package
Type
Speed
ns
Options** Process
Device
Number
Options**
Package
Type
Speed ns Options** Process
AS8S512K32
A
Q
-12
L
/*
AS8S512K32
A
Q1
-12
L
/*
AS8S512K32
A
Q
-15
L
/*
AS8S512K32
A
Q1
-15
L
/*
AS8S512K32
A
Q
-17
L
/*
AS8S512K32
A
Q1
-17
L
/*
AS8S512K32
A
Q
-20
L
/*
AS8S512K32
A
Q1
-20
L
/*
AS8S512K32
A
Q
-25
L
/*
AS8S512K32
A
Q1
-25
L
/*
AS8S512K32
A
Q
-35
L
/*
AS8S512K32
A
Q1
-35
L
/*
AS8S512K32
A
Q
-45
L
/*
AS8S512K32
A
Q1
-45
L
/*
AS8S512K32
A
Q
-55
L
/*
AS8S512K32
A
Q1
-55
L
/*
Device Number
Options**
Package
Type
Speed
ns
Options** Process
AS8S512K32
P
-12
L
/*
AS8S512K32
P
-15
L
/*
AS8S512K32
P
-17
L
/*
AS8S512K32
P
-20
L
/*
AS8S512K32
P
-25
L
/*
AS8S512K32
P
-35
L
/*
AS8S512K32
P
-45
L
/*
AS8S512K32
P
-55
L
/*
EXAMPLE:
AS8S512K32AQ-15/883C
EXAMPLE:
AS8S512K32P-25L/XT
EXAMPLE:
AS8S512K32Q1-55/IT
ORDERING INFORMATION
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
-40
o
C to +85
o
C
XT = Extended Temperature Range
-55
o
C to +125
o
C
Q = Full Military Processing
-55
o
C to +125
o
C
SPACE= Class K Equivalent
-55
o
C to +125
o
C
**DEFINITION OF OPTIONS
A = Commercial Pinout
no indicator = Military Pinout
L = Low Power Data Retention Mode
SRAM
SRAM
SRAM
SRAM
SRAM
AS8S512K32
& AS8S512K32A
Austin Semiconductor, Inc.
AS8S512K32 & AS8S512K32A
Rev. 5.0 5/03
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
ASI TO DSCC PART NUMBER
CROSS REFERENCE
Package Designator Q
ASI Part #
SMD Part #
AS8S512K32Q-12L/Q
5962-9461120HMX
AS8S512K32Q-15L/Q
5962-9461119HMX
AS8S512K32Q-17L/Q
5962-9461110HMX
AS8S512K32Q-20L/Q
5962-9461109HMX
AS8S512K32Q-25L/Q
5962-9461108HMX
AS8S512K32Q-35L/Q
5962-9461107HMX
AS8S512K32Q-45L/Q
5962-9461106HMX
AS8S512K32Q-55L/Q
5962-9461105HMX
AS8S512K32Q-12/Q
5962-9461118HMX
AS8S512K32Q-15/Q
5962-9461117HMX
AS8S512K32Q-17/Q
5962-9461116HMX
AS8S512K32Q-20/Q
5962-9461115HMX
AS8S512K32Q-25/Q
5962-9461114HMX
AS8S512K32Q-35/Q
5962-9461113HMX
AS8S512K32Q-45/Q
5962-9461112HMX
AS8S512K32Q-55/Q
5962-9461111HMX
Package Designator P
ASI Part #
SMD Part #
AS8S512K32P-12L/Q
5962-9461120HTA
AS8S512K32Q-15L/Q
5962-9461119HTA
AS8S512K32P-17L/Q
5962-9461110HTA
AS8S512K32P-20L/Q
5962-9461109HTA
AS8S512K32P-25L/Q
5962-9461108HTA
AS8S512K32P-35L/Q
5962-9461107HTA
AS8S512K32P-45L/Q
5962-9461106HTX
AS8S512K32P-55L/Q
5962-9461105HTX
AS8S512K32Q-15/Q
5962-9461117HTA
AS8S512K32P-12/Q
5962-9461118HTA
AS8S512K32P-17/Q
5962-9461116HTA
AS8S512K32P-20/Q
5962-9461115HTA
AS8S512K32P-25/Q
5962-9461114HTA
AS8S512K32P-35/Q
5962-9461113HTA
AS8S512K32P-45/Q
5962-9461112HTA
AS8S512K32P-55/Q
5962-9461111HTA
Package Designator Q1
ASI Part #
SMD Part #
AS8S512K32Q1-12L/Q
5962-9461120HAX
AS8S512K32Q1-15L/Q
5962-9461119HAX
AS8S512K32Q1-17L/Q
5962-9461110HAX
AS8S512K32Q1-20L/Q
5962-9461109HAX
AS8S512K32Q1-25L/Q
5962-9461108HAX
AS8S512K32Q1-35L/Q
5962-9461107HAX
AS8S512K32Q1-45L/Q
5962-9461106HAX
AS8S512K32Q1-55L/Q
5962-9461105HAX
AS8S512K32Q1-12/Q
5962-9461118HAX
AS8S512K32Q1-15/Q
5962-9461117HAX
AS8S512K32Q1-17/Q
5962-9461116HAX
AS8S512K32Q1-20/Q
5962-9461115HAX
AS8S512K32Q1-25/Q
5962-9461114HAX
AS8S512K32Q1-35/Q
5962-9461113HAX
AS8S512K32Q1-45/Q
5962-9461112HAX
AS8S512K32Q1-55/Q
5962-9461111HAX
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