SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
FEATURES
High Speed: 12, 15, 20, 25, 35, and 45ns
Battery Backup: 2V data retention
Low power standby
High-performance, low-power, CMOS double-metal
process
Single +5V (+10%) Power Supply
Easy memory expansion with CE\
All inputs and outputs are TTL compatible
OPTIONS
MARKING
Timing
15ns access
-15
20ns access
-20
25ns access
-25
35ns access
-35
45ns access
-45
55ns access
-55*
70ns access
-70*
Package(s)
Ceramic DIP (300 mil)
C
No.108
Ceramic LCC
EC
No. 204
Operating Temperature Ranges
Industrial (-40
o
C to +85
o
C)
IT
Military (-55
o
C to +125
o
C)
XT
2V data retention/low power
L
*Electrical characteristics identical to those provided for the 45ns
access devices.
PIN ASSIGNMENT
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
SMD 5962-89524
MIL-STD-883
28-Pin DIP (C)
(300 MIL)
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS designs using a four-transistor
memory cell. Austin Semiconductor SRAMs are fabricated
using double-layer metal, double-layer polysilicon
technology.
For flexibility in high-speed memory applications,
Austin Semiconductor offers chip enable (CE\) and output
enable (OE\) capability. These enhancements can place the
outputs in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write enable
(WE\) and CE\ inputs are both LOW. Reading is accomplished
when WE\ remains HIGH and CE\ and OE\ go LOW. The
device offers a reduced power standby mode when disabled.
This allows system designs to achieve low standby power
requirements.
The "L" version provides an approximate 50 percent
reduction in CMOS standby current (I
SBC2
) over the standard
version.
All devices operate from a single +5V power supply
and all inputs and outputs are fully TTL compatible.
64K x 4 SRAM
SRAM MEMORY ARRAY
For more products and information
please visit our web site at
www.austinsemiconductor.com
28-Pin LCC (EC)
3 2 1 28 27
13 14 15 16 17
4
5
6
7
8
9
1 0
1 1
1 2
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
A2
A3
A4
A5
A6
A7
A8
A9
CE\
A15
A14
A13
A12
A11
A10
DQ4
DQ3
DQ2
DQ1
WE\
NC
Vss
OE\
A1
A0
NC
Vcc
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
CE\
OE\
Vss
Vcc
A15
A14
A13
A12
A11
A10
NC
NC
DQ4
DQ3
DQ2
DQ1
WE\
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
FUNCTIONAL BLOCK DIAGRAM
TRUTH TABLE
(LCC)
OE\
ROW DECODER
262,144-BIT
MEMORY ARRAY
I/O CONTROL
V
CC
GND
DQ4
DQ1
CE\
WE\
A12 A11
A11 A10
A10 A12
A8 A8
A3 A3
A2 A2
A1 A1
A0 A0
COLUMN DECODER
A7 A6 A5 A4 A9 A15 A14 A13
POWER
DOWN
(LSB)
(LSB)
MODE
OE\
CE\
WE\
DQ
POWER
STANDBY
X
H
X
HIGH-Z
STANDBY
READ
L
L
H
Q
ACTIVE
READ
H
L
H
HIGH-Z
ACTIVE
WRITE
X
L
L
D
ACTIVE
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RATINGS
*
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
C
< 125
o
C; V
CC
= 5V +10%)
CAPACITANCE
Voltage on Any Pin Relative to Vss..................................-0.5V to +7V
Voltage on Vcc Supply Relative to Vss.............................-0.5V to +7V
Storage Temperature......................................................-65
o
C to +150
o
C
Power Dissipation..............................................................................1W
Short Circuit Output Current.........................................................50mA
Lead Temperature (soldering 10 seconds)....................................+260
o
C
Junction Temperature..................................................................+175
o
C
DESCRIPTION
CONDITIONS
SYM
MIN
MAX
UNITS
NOTES
Input High (Logic 1) Voltage
V
IH
2.2
V
CC
+0.5
V
1
Input Low (Logic 0) Voltage
V
IL
-0.5
0.8
V
1, 2
Input Leakage Current
0V<V
IN
<V
CC
IL
I
-10
10
A
Output Leakage Current
Output(s) disabled
0V<V
OUT
<V
CC
IL
O
-10
10
A
Output High Voltage
I
OH
=-4.0mA
V
OH
2.4
V
1
Output Low Voltage
I
OL
=8.0mA
V
OL
0.4
V
1
SYM
-15
-20
-25
-35
-45
UNITS NOTES
I
cc
160
150
120
120
120
mA
3
Power Supply
Current: Standby
I
SBT2
40
40
20
20
20
mA
I
SBC2
20
20
10
10
10
mA
"L" Version Only
I
SBC2
10
10
10
10
10
mA
CE\ > V
CC
-0.3V; V
CC
= MAX
V
IL
< V
SS
+0.2V
V
IH
> V
CC
-0.2V; f = 0 Hz
CE\ = 2.4V, OE\ = 2.4V,
V
CC
= MAX, f = 0 Hz
MAX
CONDITIONS
CE\ < V
IL
; V
CC
= MAX
f = MAX = 1/t
RC
(MIN)
Output Open
Power Supply
Current: Operating
PARAMETER
DESCRIPTION
CONDITIONS
SYM
MAX
UNITS
NOTES
Input Capacitance
C
I
11
pF
4
Output Capacitance
C
O
11
pF
4
T
A
= 25
o
C, f = 1MHz
V
CC
= 5V
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55
o
C < T
C
< 125
o
C; V
CC
= 5V +10%)
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
READ CYCLE
READ cycle time
t
RC
15
20
25
35
45
ns
Address access time
t
AA
15
20
25
35
45
ns
Chip Enable access time
t
ACE
15
20
25
35
45
ns
Output hold from address change
t
OH
3
3
3
3
3
ns
Chip Enable to output in Low-Z
t
LZCE
3
3
3
3
3
ns
7
Chip disable to output in High-Z
t
HZCE
8
10
15
15
20
ns
6, 7
Output Enable access time
t
AOE
8
10
15
25
30
ns
4
Output Enable to output in Low-Z
t
LZOE
0
0
0
0
0
ns
4
Output disable to output in High-Z
t
HZOE
9
9
15
20
20
WRITE CYCLE
WRITE cycle time
t
WC
15
20
25
35
45
ns
Chip Enable to end of write
t
CW
10
15
20
25
30
ns
Address valid to end of write
t
AW
10
15
20
25
30
ns
Address setup time
t
AS
0
0
0
0
0
ns
Address hold from end of write
t
AH
0
0
0
0
0
ns
WRITE pulse width
t
WP
10
15
20
25
30
ns
Data setup time
t
DS
9
10
15
20
20
ns
Data hold time
t
DH
0
0
0
0
0
ns
Write disable to output in Low-Z
t
LZWE
0
0
0
0
0
ns
7
Write Enable to output in High-Z
t
HZWE
7
10
15
15
20
ns
6, 7
-35
-45
DESCRIPTION
-20
SYMBOL
-25
-15
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
AC TEST CONDITIONS
Input pulse levels ...................................... Vss to 3.0V
Input rise and fall times ......................................... 5ns
Input timing reference levels ................................ 1.5V
Output reference levels ....................................... 1.5V
Output load ................................. See Figures 1 and 2
NOTES
1.
All voltages referenced to V
SS
(GND).
2.
-3V for pulse width < 20ns
3.
I
CC
is dependent on output loading and cycle rates.
The specified value applies with the outputs
unloaded, and f = 1 Hz.
t
RC (MIN)
4.
This parameter is guaranteed but not tested.
5.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6.
t
HZCE
, t
HZOE
and t
HZWE
are specified with CL = 5pF as
in Fig. 2. Transition is measured 500mV typical from
steady state voltage, allowing for actual tester RC time
constant.
7.
At any given temperature and voltage condition,
t
HZCE
is less than t
LZCE
, and t
HZWE
is less than t
LZWE
and
t
HZOE
is less than t
LZOE
.
8.
WE\ is HIGH for READ cycle.
9.
Device is continuously selected. Chip enable is held in
its active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. t
RC
= Read Cycle Time.
12. Chip enable (CE\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
123
123
123
123
1234
1234
1234
1234
DON'T CARE
UNDEFINED
LOW Vcc DATA RETENTION WAVEFORM
12345678
12345678
12345678
12345678
12
12
12
12
1234
1234
1234
1234
12345678
12345678
12345678
12345678
123
123
123
123
1234
1234
1234
1234
DATA RETENTION MODE
V
DR
> 2V
4.5V
4.5V
V
DR
t
CDR
t
R
V
IH
V
IL
V
CC
CE\
Fig. 1 Output Load
Equivalent
Fig. 2 Output Load
Equivalent
+5V
Q
255
30pF
480
5 pF
+5V
Q
255
480
DESCRIPTION
CONDITIONS
SYM
MIN
MAX
UNITS
NOTES
VCC for Retention Data
V
DR
2
---
V
Data Retention Current
V
CC
= 2V
I
CCDR
1
mA
*
Chip Deselect to Data
Retention Time
t
CDR
0
---
ns
4
Operation Recovery Time
t
R
t
RC
ns
4, 11
CE\ > (V
CC
- 0.2V)
V
IN
> (V
CC
- 0.2V)
or < 0.2V
*for -25 and slower only
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
READ CYCLE NO. 1
8, 9
READ CYCLE NO. 2
7, 8, 10
1234
1234
1234
1234
1234
1234
12
12
12
DATA VALID
HIGH-Z
t
RC
t
AOE
t
LZOE
t
ACE
t
LZCE
t
PU
t
PD
t
HZCE
t
HZOE
CE\
OE\
DQ
Icc
VALID
PREVIOUS DATA VALID
DATA VALID
t
OH
t
AA
t
RC
ADDR
Q
1234
1234
1234
1234
1234
1234
12
12
12
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
NOTE: Output enable (OE\) is inactive (HIGH).
WRITE CYCLE NO. 2
7, 12
(Write Enabled Controlled)
WRITE CYCLE NO. 1
12
(Chip Enabled Controlled)
tDH
tDS
tWP1
tWP1
tAH
tCW
tAW
tCW
tAS
tWC
tWC
HIGH Z
DATA VAILD
ADDRESS
CE\
WE\
D
Q
t
WC
t
AW
t
AS
t
CW
t
AH
t
WP
t
DS
t
DH
123456789012345678901
123456789012345678901
1
1
1
1
1
123456789012345678901234567890121234567890
123456789012345678901234567890121234567890
1
1
1
1
12
tDH
tWP1
tWP1
tAS
tAW
tCW
tAH
tCW
tWC
tWC
DATA VALID
ADDRESS
CE\
WE\
D
Q
HIGH-Z
t
DH
t
DS
t
WC
t
AW
t
AH
t
CW
t
AS
t
WP
1234
1234
1234
1234
1234567890123456
1234567890123456
1234567890123456
1234567890123456
1
1
1
1
1234
1234
1234
1234
123456
123456
123456
123456
12
12
12
12
1
1
1
1
1
1
1
1
12345678901234567
12345678901234567
12345678901234567
12
12
12
12
12
1
1
12345678901234567890123
12345678901234567890123
12345678901234567890123
12
1
1
1
1
123456789
123456789
123456789
t
HZWE
t
LZWE
123
123
123
1234
1234
1234
1234
DON'T CARE
UNDEFINED
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
MECHANICAL DEFINITIONS*
ASI Case #108 (Package Designator C)
SMD #5962-89524, Case Outline X
*All measurements are in inches.
D
Pin 1
NOTE:
These dimensions are per the SMD. ASI's package dimensional limits
may differ, but they will be within the SMD limits.
c
NOTE
E
0
o
to 15
o
eA
MIN
MAX
A
---
0.225
b
0.014
0.026
b2
0.045
0.065
c
0.008
0.018
D
---
1.485
E
0.240
0.310
eA
e
L
0.125
0.200
Q
0.015
0.070
S1
0.005
---
S2
0.005
---
SYMBOL
0.100 BSC
SMD SPECIFICATIONS
0.300 BSC
e
b
b2
A
Q
L
S1
S2
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC)
SMD# 5962-88681, Case Outline X
*All measurements are in inches.
NOTE:
These dimensions are per the SMD. ASI's package dimensional limits
may differ, but they will be within the SMD limits.
A
A1
D3
MIN
MAX
A
0.060
0.120
A1
0.050
0.088
B1
0.022
0.028
B2
D
0.342
0.358
D1
D2
D3
---
0.358
E
0.540
0.560
E1
E2
E3
---
0.558
e
h
L
0.045
0.055
L2
0.075
0.095
0.100 BSC
0.040 REF
0.050 BSC
0.200 BSC
0.400 BSC
SYMBOL
SMD SPECIFICATIONS
0.072 REF
0.200 BSC
E
D
E3
hx45
o
E1
L2
B1
D1
L
e
B2
E2
D2
h x 45
o
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
-40
o
C to +85
o
C
XT = Extended Temperature Range
-55
o
C to +125
o
C
883C = Full Military Processing
-55
o
C to +125
o
C
** OPTIONS
L = 2V Data Retention/Low Power
ORDERING INFORMATION
EXAMPLE: MT5C2565EC-45/XT
Device
Number
Package
Type
Speed
ns
Options** Process
Device
Number
Package
Type
Speed
ns
Options** Process
MT5C2565
C
-15
L
/*
MT5C2565
EC
-15
L
/*
MT5C2565
C
-20
L
/*
MT5C2565
EC
-20
L
/*
MT5C2565
C
-25
L
/*
MT5C2565
EC
-25
L
/*
MT5C2565
C
-35
L
/*
MT5C2565
EC
-35
L
/*
MT5C2565
C
-45
L
/*
MT5C2565
EC
-45
L
/*
MT5C2565
C
-55
L
/*
MT5C2565
EC
-55
L
/*
MT5C2565
C
-70
L
/*
MT5C2565
EC
-70
L
/*
EXAMPLE: MT5C2565C-20L/IT
SRAM
MT5C2565
Austin Semiconductor, Inc.
MT5C2565
Rev. 1.5 1/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator EC
ASI Part #
SMD Part #
MT5C2565EC-15/883C
5962-8952407YX
MT5C2565EC-20/883C
5962-8952406YX
MT5C2565EC-25/883C
5962-8952405YX
MT5C2565EC-35/883C
5962-8952404YX
MT5C2565EC-45/883C
5962-8952403YX
MT5C2565EC-55/883C
5962-8952402YX
MT5C2565EC-70/883C
5962-8952401YX
ASI Package Designator C
ASI Part #
SMD Part #
MT5C2565C-15/883C
5962-8952407XX
MT5C2565C-20/883C
5962-8952406XX
MT5C2565C-25/883C
5962-8952405XX
MT5C2565C-35/883C
5962-8952404XX
MT5C2565C-45/883C
5962-8952403XX
MT5C2565C-55/883C
5962-8952402XX
MT5C2565C-70/883C
5962-8952401XX
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
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