2FAE-C15R - Integrated Passive & Active Device using CSP
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
SOLDER
BUMPS
SILICON
DIE
Electrical Characteristics
Symbol
Minimum
Nominal
Maximum
Unit
(T
A
= 25 C unless otherwise noted)
Per Line Specification
Resistance
R
80
100
120
Capacitance @ 2.5 V 1 MHz
C
44
54
64
pF
Rated Standoff Voltage
V
WM
5.0
V
Breakdown Voltage @ 1 mA
V
BR
6.0
V
Forward Voltage @ 10 mA
V
F
0.8
V
Leakage Current @ 3.3 V
I
R
0.1
0.5
A
Filter Attenuation @ 800 - 3000 MHz
S21
-30
-35
dB
ESD Protection: IEC 61000-4-2
Contact Discharge
8
kV
Air Discharge
15
kV
Thermal Characteristics
(T
A
= 25 C unless otherwise noted)
Operating Temperature Range
T
J
-40 25 +85 C
Storage Temperature Range
T
STG
-55 25 +150 C
Power Dissipation Per Resistor
P
D
100 mW
General Information
Features
Lead free versions available
RoHS compliant (lead free version)*
Bidirectional EMI filtering
ESD protection
Protects 6 data lines
Applications
Cell phones
PDAs and notebooks
Digital cameras
MP3 players and GPS
Electrical & Thermal Characteristics
The 2FAE-C15R device, manufactured using Thin Film on
Silicon technology, provides ESD protection and EMI
filtering for the data port of portable electronic devices
such as cell phones, modems and PDAs. The device
incorporates six low pass filter channels where each
channel has a series 100 ohm resistor assuring a
minimum of -30 dB attenuation from 800 MHz to 3 GHz.
The device is suitable for EMI filtering of GSM, CDMA,
W-CDMA, WLAN and Bluetooth frequencies.
Each internal and external port of the six channels
includes a TVS diode for ESD protection. The ESD
protection provided by the component enables a data
port to withstand a minimum 8 KV Contact / 15 KV Air
Discharge per the ESD test method specified in IEC
61000-4-2. The device measures 1.33 mm x 2.96 mm and
is available in a 15 bump CSP package intended to be
mounted directly onto an FR4 printed circuit board. The
CSP device meets typical thermal cycle and bend test
specifications without the use of an underfill material.
Asia-Pacific:
TEL +886- (0)2 25624117 FAX +886- (0)2 25624116
Europe:
TEL +41-41 768 5555 FAX +41-41 768 5510
The Americas: TEL +1-951 781-5492 FAX +1-951 781-5700
www.bourns.com
Reliable Electronic Solutions
*RoHS COMPLIANT
VERSIONS
AVAILABLE
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
DIMENSIONS =
MILLIMETERS
(INCHES)
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Mechanical Characteristics
2FAE-C15R - Integrated Passive & Active Device using CSP
0.432 - 0.559
(0.017 - 0.022)
1.285 - 1.375
(0.051 - 0.054)
0.330 - 0.457
(0.013 - 0.018)
2.915 - 3.005
(0.115 - 0.118)
0.180 - 0.280
(0.007 - 0.011)
0.180 - 0.280
(0.007 - 0.011)
0.50
(0.020)
0.25
(0.01)
0.3
(0.012)
DIA.
0.435
(0.017)
0.435
(0.017)
B1
C1
C2
C3
C4
C5
C6
A1
A2
A3
A4
A5
A6
B2
B3
This is a silicon-based device and is packaged using chip scale packaging technology. Solder bumps, formed on the silicon die,
provide the interconnect medium from die to PCB. The bumps are arranged on the die in a regular grid formation. The grid pitch is
0.5 mm and the dimensions for the packaged device are shown below.
Reliability data is gathered on an ongoing basis for Bourns
Integrated Passive and Active Devices.
"Package level" testing of the integrity of the solder joint is carried out on an independent Daisy-Chain test device. A 25-Pin Daisy
Chain component is available from Bourns for this purpose (part number 2TAD-C25R). This is a 5 x 5 array featuring 0.5 mm pitch
solder bumps. The Distance to Neutral Point (DNP) on that component is similar to that of the 2FAE-C15R and is thus deemed
suitable for Thermal Cycle testing.
"Silicon level" reliability performance is based on similarity to other integrated passive CSP devices from Bourns.
Reliability Data
Frequency Response
Loss - dB
-60
-50
-20
-30
-40
-10
0
Frequency - MHz
0.1
1.0
10.0
100.0
1000.0
1000.0
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
2FAE-C15R - Integrated Passive & Active Device using CSP
Block Diagram
GND
EXT1
R1:
100 ohms
R2:
100 ohms
INT1
EXT2
INT2
GND
EXT3
R3:
100 ohms
R4:
100 ohms
INT3
EXT4
INT4
GND
EXT5
R5:
100 ohms
R6:
100 ohms
INT5
EXT6
INT6
The CSP device block diagram below includes the pin names and basic electrical
connections associated with each channel.
Please consult the "Bourns Design
Guide Using CSP" for notes on PCB
design and SMT Processing.
PCB Design and SMT Processing
How to Order
2 FAE - C15R __
__
Thinfilm
Model
Chipscale
No. of Solder Bumps
Packaging Option
R = Tape and Reel
Packaged 3000 pcs. / 7 " reel
Terminations
LF = Sn/Ag/Cu (lead free)
Blank = Sn/Pb
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
2FAE-C15R - Integrated Passive & Active Device using CSP
The pin-out for the device is shown below with the bumps facing up.
Device Pin Out
The surface mount product is packaged in an 8 mm x 4 mm Tape and Reel format per EIA-481 standard.
Packaging
A
B
C
GND x 3
EXT1
1
2
EXT2
EXT3
3
4
EXT4
EXT5
5
6
EXT6
INT1
INT2
INT3
INT4
INT5
INT6
2.00 0.05
(.08 .002)
0.3 0.05
(.01 .002)
1.52 0.1
(.06 .004)
3.18 0.1
(0.13 0.004)
1.75 0.10
(.07 .004)
3.5 0.05
(.14 .002)
8.0 0.3
(.31 .01)
0.76 0.1
(.03 .004)
ORIENTATION
OF COMPONENT
IN POCKET
BACKSIDE FACING UP
TOP SIDE VIEW
(INTO COMPONENT POCKET)
0.3
(0.01)
4.0 0.1
(.16 .004)
4.0 0.1
(.16 .004)
0.25
(0.010)
TYP.
R
1.5 0.1/-0
(.06 .004/-0)
DIA.
MAX.
R
Pin Out
Function
Pin Out
Function
A1
EXT1
C1
INT1
A2
EXT2
C2
INT2
A3
EXT3
C3
INT3
A4
EXT4
C4
INT4
A5
EXT5
C5
INT5
A6
EXT6
C6
INT6
B1
GND
B2
GND
B3
GND
DIMENSIONS =
MILLIMETERS
(INCHES)
COPYRIGHT 2004, BOURNS, INC. LITHO IN U.S.A. 08/04 e/IPA0411
2FAE-C15R REV. B, 02/05
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