BCM5708C
10/100/1000BASE-T TCP Offload Engine, RDMA, iSCSI/iSER and
Ethernet Controller with PCI-ExpressTM
Single-chip solution for LAN on Motherboard (LOM) and
Network Interface Card (NIC) applications
Integrated 10BASE-T/100BASE-TX/1000BASE-T transceivers
Host interfaces
- PCI-ExpressTM x4 Host interface
TCP offload engine
Full "fast Path" TCP offload
Compliant with Microsoft's TOE Chimney Architecture
iSCSI controller
iSCSI initiator
iSER (iSCSI over RDMA)
RDMA controller (RNIC)
RDMA over TCP (iWARP)--RDMAC 1.0 compliant
Hardware-based data placement in application buffers without
CPU intervention (User and Kernel modes)
Other performance features
Receive Side Scaling (RSS)
TCP, IP checksum
TCP segmentation
Adaptive interrupts
Message Signal Interrupt (MSI) support
Robust manageability
Universal Management Port (UMP)
PXE 2.0 remote boot
Alert Standard Format (ASF v1.0) support
Wake-On LAN
IPMI 'pass-through' feature
Statistics gathering (SNMP MIB II, Ethernet-like MIB,
Ethernet MIB (802.3x, clause 30))
Comprehensive diagnostic and configuration software suite
ACPI 1.1a compliant power management
Advanced network features
Virtual LANs--802.1q VLAN tagging
Jumbo frames (9 KB)
802.3x flow control
Low-power CMOS design
On-chip power circuit controller
400-ball 21x21 mm FBGA package
3.3V I/Os
JTAG
Industry's first 10/100/1000 TOE solution--power and space
optimized for server blade and low-profile NIC applications.
Extremely low CPU utilization for TCP/IP applications
Host CPU is free to run application code
Easy integration with Microsoft's TOE Chimney Architecture
Accelerated IP-based storage
Lower CPU utilization for file-level storage protocols such as
CIFS and NFS
iSCSI functionality with low CPU utilization
RDMA support for data placement in application buffers
reduces CPU utilization and lowers data transit latencies.
Future-proof
Flexible implementation for TCP, iWARP and iSCSI can
accommodate specification changes and interoperability
issues.
Performance-focused optimized for throughput and CPU
utilization
Adaptive interrupts
RSS reduces CPU utilization on multi-CPU systems.
MSI allows interrupt distribution in a multi-CPU host system.
PCI-Express host interface allows a low-latency access to CPU
and Memory resources.
Robust and highly manageable
UMP enables high bandwidth "out-of-band" system
management functionality over shared infrastructure.
PXE 2.0, ACPI 1.1, Wake-On LAN, ASF 1.0.
IPMI 'pass-through' capability allows on-board management
controllers access to the network in OS-present and OS-absent
states.
Server class reliability, availability, and performance features
Link aggregation and load balancing
- Switch-dependent
802.3ad (LACP), generic trunking (GEC/FEC)
- Switch and NIC independent
Low power for zero airflow implementations
Advanced power management
Minimal real estate--ideal for LOM
On-chip power circuit controller
F E A T U R E S
S U M M A R Y O F B E N E F I T S
O V E R V I E W
Phone: 949-450-8700
Fax: 949-450-8710
E-mail: info@broadcom.com
Web: www.broadcom.com
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
2004 by BROADCOM CORPORATION. All rights reserved.
5708C-PB01-R
11/17/04
Broadcom
, the pulse logo, and Connecting everything
are trademarks of Broadcom Corporation and/
or its subsidiaries in the United States and certain other countries. All other trademarks mentioned are the
property of their respective owners.
The BCM5708C provides a fully integrated Layer 4 and Layer 5
solution - TCP/IP, RDMA and iSCSI 1.0/iSER along with a complete 10/
100/1000BASE-T Gigabit Ethernet, IEEE 802.3 compliant Media
Access Control (MAC) and Physical Layer Transceiver solution for high
performance network applications. By itself, the BCM5708C provides a
complete single-chip Gigabit Ethernet NIC with a TCP/IP Offload
Engine, RDMA NIC (RNIC), iSCSI 1.0/iSER HBA or LOM solution.
The BCM5708C is different from other network controllers because it
can process the TCP/IP and relevant L5 protocols on data directly from
the application buffers on the host, therefore relieving the host CPU from
these time-consuming operations. On the receive path, the BCM5708C
processes the frame up to the highest layer supported present in it, e.g.,
the BCM5708C processes the frame for RDMA when the frame is an
RDMA frame.
With the appropriate configuration, the BCM5708C can simultaneously
support any two of the following three functions:
RDMA Network Interface Controller (RNIC)
iSCSI or iSER Host Bus Adapter
TOE Chimney-enabled network accelerator
Target Applications of the BCM5708C
Gigabit Ethernet NICs and LAN-on Motherboard (LOM)
ISCSI 1.0 / iSER Host Bus Adapters (HBA)
RDMA Network Interface Card (RNIC)
RX
TX
Clock
10/100/1000
PHY
10/100/1000
MAC
PLL
LED Control
LED Signals
SMB Interface
SFLASH Interface
SMBus
SFLASH
Control
Memory Controller
Buffer
Memory
PCI-Express
x4
PCI-Express
UMP
UMP Interface
TCP/IP
Offload
Engine
iSCSI
Protocol
Offload
RDMA
Protocol
Engine
BASE-T
BASE-T
PCI-Express x4 NIC
PCI-Express
x4, x2, or x1 LOM
Network Interface Cards (NIC) designs
LAN on Motherboard (LOM) designs
10/100/1000
10/100/1000
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