DuolithicTM Burr-Brown Corporation
12-Bit 900ns
ANALOG-TO-DIGITAL CONVERTER
FEATURES
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FAST CONVERSION: 900ns
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CAN BE SHORT-CYCLED
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INPUT RANGES:
5V,
10V, 0 to 10V
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HIGH SIGNAL/NOISE RATIO: 68dB
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LOW IMD: 75dB
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PARALLEL AND SERIAL OUTPUT
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32-PIN CERAMIC DIP PACKAGE
APPLICATIONS
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DIGITAL SIGNAL PROCESSING
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HIGH-SPEED DATA ACQUISITION
SYSTEMS
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MEDICAL INSTRUMENTATION
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ANALYTICAL INSTRUMENTATION
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TEST AND IMAGING SYSTEMS
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WAVEFORM ANALYZERS
DESCRIPTION
The ADC601 is a high-speed DuolithicTM (two chips)
successive approximation analog-to-digital converter.
This unique two-chip design utilizes a bipolar technol-
ogy with on-chip thin film resistors to preserve analog
accuracy and a high-speed CMOS chip to perform
digital logic control. Outstanding linearity, noise, and
dynamic range are achieved by this converter design.
The ADC601 has been tested with several sample/hold
amplifiers and distortion results are documented in this
data sheet.
The ADC601 is complete with internal reference, clock,
and comparator and is packaged in a 32-pin ceramic
DIP. Conversion time is set at the factory to 900ns.
Serial and parallel output performance is guaranteed
with no missing codes over the full input voltage,
power supply, and operating temperature range. The
gain and offset errors are laser trimmed to specifica-
tion. Optionally they may be externally adjusted to
zero.
Internal scaling resistors are provided for the selection
of analog signal input ranges of
5V,
10V and 0V to
10V. The ADC601's input is specifically designed to
be easily driven with minimal disturbance to the driv-
ing amplifier.
Output codes are available in complementary binary
for unipolar inputs and bipolar offset binary for bipolar
inputs.
All digital inputs and outputs are TTL-compatible.
Power supply requirements are
15V and +5V.
12-Bit
Successive Approx
Register (SAR)
Clock
Reference
12-Bit D/A
Converter
Parallel
Digital
Output
Clock Rate Control
Clock Out
Status
Serial Out
Bipolar Offset
Comparator In
Input
Range Select
Convert
Command
Comparator
+
International Airport Industrial Park Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1989 Burr-Brown Corporation
PDS-867C
Printed in U.S.A. March, 1992
ADC601
2
ADC601
SPECIFICATIONS
ELECTRICAL
T
CASE
= +25
C, 900ns conversion time,
V
CC
=
15V, +V
DD
= +5V, and 6-minute warm-up in a normal convection environment unless otherwise noted.
Guaranteed
Guaranteed
ADC601JG
ADC601KG
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
RESOLUTION
12
*
Bits
ANALOG CHARACTERISTICS
INPUTS
Voltage Ranges: Bipolar
Full Scale(FSR)
(1)(2)
5,
10
*
V
Unipolar
Full Scale(FSR)
(1)(2)
0 to 10
*
V
Impedance:
10V to 0V,
5V
1.4
*
k
10V
2.4
*
k
TRANSFER CHARACTERISTICS
ACCURACY
Gain Error
(3)
990ns Conversion Time
0.08
0.55
*
0.2
%
Input Offset Error
(3)
: Unipolar
990ns Conversion Time
0.12
1.2
*
0.5
% of FSR
Bipolar
990ns Conversion Time
0.08
0.8
*
0.25
% of FSR
Integral Linearity Error
990ns Conversion Time
0.024
0.012
% of FSR
Differential Linearity Error
990ns Conversion Time
0.024
0.012
% of FSR
No Missing Codes
Power Supply Rejection of Offset and Gain
+V
CC
=
5%
0.0036
*
%FSR/%V
CC
V
CC
=
5%
0.0005
*
%FSR/%V
CC
+V
DD
=
5%
0.001
*
%FSR/%V
DD
DIGITAL CHARACTERISTICS
INPUT
Logic Family
TTL-Compatible CMOS
Convert Command Logic Voltages
Logic Low
0
+0.8
*
*
V
Logic High
+2
+V
DD
*
*
V
Convert Command Currents
Logic Low
150
A
Logic High
150
A
Convert Command
High Level When Converting
CONVERSION TIME
Factory Set
Without User Adjustment
0.9
1
*
*
s
Power Supply Rejection of Conversion Time
D +V
DD
=
5%
1
*
ns/%V
DD
OUTPUT
Logic Family
TTL-Compatible CMOS
Bits 1 through 12, Serial, Status, Clock Out
Logic Low, I
OL
= 3.2mA
+0.1
+0.4
*
*
V
Logic High, I
OH
= 1mA
+2.7
+4.9
*
*
*
V
Internal Clock Frequency
13
*
MHz
Status
Low Level When Data Valid
DYNAMIC CHARACTERISTICS
(4) (5) (6)
Tested using Sample/Hold Amplifier SHC804 and ADC601 (See Typical Performance Curves)
Differential Linearity Error
f
C
= 10kHz:
68.3% of All Codes
0.5
0.4
LSB
99.7% of All Codes
0.8
0.6
LSB
100% of All Codes
1.0
0.7
LSB
Total Harmonic Distortion
f
C
= 10kHz,
f
S
= 500kHz
70
*
dBc
f
C
= 10kHz,
f
S
= 1MHz
74
*
dBc
f
C
= 250kHz, f
S
= 500kHz
70
*
dBc
f
C
= 500kHz, f
S
= 1MHz
68
*
dBc
Two-Tone Intermodulation Distortion
(7)
f
C
= 11kHz and 15kHz, f
S
= 500kHz
79
*
dBc
f
C
= 50kHz and 55kHz, f
S
= 500kHz
78
*
dBc
f
C
= 90kHz and 110kHz, f
S
= 500kHz
77
*
dBc
Signal-to-Noise and Distortion
f
C
= 250kHz, f
S
= 500kHz
66
*
dB
(SINAD) Ratio
f
C
= 500kHz, f
S
= 1MHz
65
*
dB
Signal-to-Noise Ratio (SNR)
f
C
= 250kHz, f
S
= 500kHz
68
*
dB
f
C
= 500kHz, f
S
= 1MHz
67
*
dB
PERFORMANCE OVER TEMPERATURE
Gain
T
MIN
to T
MAX
10
30
*
*
ppm of FSR/
C
Input Offset: Unipolar
T
MIN
to T
MAX
2
7
*
*
ppm of FSR/
C
Bipolar
T
MIN
to T
MAX
3
10
*
*
ppm of FSR/
C
Internal Linearity Error
0.9
s Conversion Time T
MIN
to T
MAX
0.02
0.015
% of FSR
Differential Linearity Error
0.9
s Conversion Time T
MIN
to T
MAX
0.02
0.015
% of FSR
No Missing Codes
0.9
s Conversion Time T
MIN
to T
MAX`
Conversion Drift
2
*
ns/
C
3
ADC601
ADC601JG
ADC601KG
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
POWER SUPPLY REQUIREMENTS
Supply Voltages: +V
CC
+14.25
+15
+15.75
*
*
*
V
V
CC
14.25
15
15.75
*
*
*
V
+V
DD
+4.75
+5
+5.25
*
*
*
V
Supply Currents: +I
CC
5.4
7.0
*
*
mA
I
CC
65
84.5
*
*
mA
+I
DD
53
68.9
*
*
mA
Power Consumption
Nominal
V
CC
and +V
DD
1.3
1.7
*
*
W
Thermal Resistance,
JC
25
*
*
C/W
TEMPERATURE RANGE
(8)
Specification
0
+70
*
*
C
Operating
25
+85
*
*
C
* Same specifications as for ADC601JG.
NOTES: (1) Over or under range on the analog input results in constant maximum or minimum digital output. (2) FSR = Full Scale Range. (3) Adjustable to zero.
(4) Dynamic tests are performed using SHC804 with ADC601 unless otherwise specified. Performance may vary depending upon choice of sample/hold. (5) See Typical
Performance Curves. (6) dBc = level referred to carrier input signal = 0dB; f
C
= input frequency; f
S
= sampling frequency. (7) IMD is referred to the larger of the two
input test signals. If referred to the peak envelope signal (
0dB), the intermodulation products will be 6dB lower. For example, unit connected for
10V has 20V FSR.
(8) Temperature ranges refer to case temperature. Thermal resistance was measured on a small (5" diameter) handwired circuit board; with the test device in a (zero
insertion force) socket. Thermal resistance will be lower if the ADC601 is soldered into the PC board, a ground plane is used directly underneath the package, multiple
PC board layers are used, or forced air cooling is employed. Use heat sinking if necessary to keep the case at specified and operating temperatures.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
ADC601
( )
G
Basic Model Number
Performance Grade Code
J, K: 0
C to +70
C Case Temperature
Package Code
G: Ceramic DIP
ORDERING INFORMATION
V
CC
...................................................................................................
18V
+V
DD
.................................................................................................... +7V
Digital Inputs ..................................................................................... +5.5V
Analog Inputs ......................................................................................
V
CC
Comparator Input ............................................................... 3.7V to +0.7V
Case Temperature ......................................................................... +125
C
Junction Temperature .................................................................... +165
C
Storage Temperature ...................................................... 65
C to +150
C
Stresses above these ratings may permanently damage the device.
ABSOLUTE MAXIMUM RATINGS
PACKAGE INFORMATION
(1)
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
ADC601JG
32-Pin Hermetic DIP
1722
ADC601KG
32-Pin Hermetic DIP
1722
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
SPECIFICATIONS
(CONT)
ELECTRICAL
T
CASE
= +25
C, 900ns conversion time,
V
CC
=
15V, +V
DD
= +5V, and 6-minute warm-up in a normal convection environment unless otherwise noted.
4
ADC601
PIN NUMBER
DESIGNATION
DESCRIPTION
1-6 and 11-16
Bit 1 to Bit 12
12-bit parallel output data capable of sinking 3.2mA.
9
Serial Out
12-bit serial data output synchronized with the negative edge of each appropriate clock cycle.
10
Status
Conversion status strobe is high during data conversion; low when parallel data is valid. Negative edge may
be used to latch parallel data, however, appropriate latch set-up time must be provided. Refer to t
BBL
in the
ADC601 timing diagram.
17
Clock Out
Negative edge indicates when serial data is valid. After convert command goes high, fist cycle clocks bit 1
(MSB). The clock continues to run when convert command is high and resets low with convert command.
18
Convert Command
High transition starts conversion; and should remain high during conversion. Low will reset clock and SAR
logic.
19
Clock Rate Control
May be used to increase clock speed, by increasing the positive portion of the clock. High is normal operation.
24
20V Input
20V input range allows
10Vp-p analog input signal. Short to ground when not used.
25
10V Input
10V input range allows 0 to 10Vp-p or
5Vp-p input range.
26
Comparator In
Only used in bipolar mode when it is connected to bipolar offset pin through short lead with low resistance.
27
Ground Sense
Ground Sense pin. (See text for use).
29
Bipolar Offset Current
Bipolar offset current short to comparator In through very short lead with very low resistance for bipolar
operation. Short to ground for unipolar operation.
PIN CONFIGURATION
PIN DEFINITIONS
(1) NC = No internal connection. Any voltage may be connected to pin 31, however.
(2) Pin 22 must be very cleanly decoupled to keep digital noise out of the analog circuits.
Clock
Reference
12-Bit D/A
Converter
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
(MSB) Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
+V (+5V) Digital
Common (Digital)
Serial Out
Status
Bit 7
Bit 8
Bit 9
Bit 10
Bit 11
Bit 12
Common (Analog)
NC
V (15V) Analog
Bipolar Offset Current
Common (Analog)
Ground Sense
Comparator Input
10V Input
20V Input
V (15V) Analog
+V (+5V) Digital
Common (Digital)
+V (+15V) Analog
Clock Rate Control
Convert Command
Clock Out
545
1k
DD
CC
CC
DD
CC
12-Bit (SAR)
CMOS
Bipolar
(1)
(2)
+
2k
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