Microprocessor-Compatible
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
COMPLETE 12-BIT A/D CONVERTER WITH
REFERENCE, CLOCK, AND 8-, 12-, or 16-
BIT MICROPROCESSOR BUS INTERFACE
q
ALTERNATE SOURCE FOR HI774 A/D
CONVERTER: 8.5
s Conversion Time,
150ns Bus Access Time
q
FULLY SPECIFIED FOR OPERATION ON
12V OR
15V SUPPLIES
q
NO MISSING CODES OVER
TEMPERATURE:
0
C to +75
C: ADC774J, K
55
C to +125
C: ADC774SH, TH
DESCRIPTION
The ADC774 is a 12-bit successive approximation
analog-to-digital converter, utilizing state-of-the-art
CMOS and laser-trimmed bipolar die custom-designed
for freedom from latch-up and for optimum AC per-
formance. It is complete with a self-contained +10V
reference, internal clock, digital interface for micropro-
cessor control, and three-state outputs.
The reference circuit, containing a buried zener, is laser-
trimmed for minimum temperature coefficient. The
clock oscillator is current-controlled for excellent sta-
bility over temperature. Full-scale and offset errors may
be externally trimmed to zero. Internal scaling resistors
are provided for the selection of analog input signal
ranges of 0V to +10V, 0V to +20V,
5V, and
10V.
The converter may be externally programmed to pro-
vide 8- or 12-bit resolution. The conversion time for 12
bits is factory set for 8.5
s maximum.
Output data are available in a parallel format from TTL-
compatible three-state output buffers. Output data are
coded in straight binary for unipolar input signals and
bipolar offset binary for bipolar input signals.
The ADC774, available in both industrial and military
temperature ranges, requires supply voltages of +5V
and
12V or
15V. It is packaged in a 28-pin plastic
DIP, or a hermetic side-brazed ceramic DIP.
Successive
Approximation
Register
Control Logic
Comparator
12-Bit D/A
Converter
Control
Inputs
Bipolar
Offset
20V Range
10V Range
Reference
Input
Reference
Output
Three-State Buffers
Status
Parallel
Data
Output
Clock
10V
Reference
ADC774
International Airport Industrial Park Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1988 Burr-Brown Corporation
PDS-835E
Printed in U.S.A. March, 1992
2
ADC774
SPECIFICATIONS
ELECTRICAL
T
A
= +25
C, V
CC
= +12V or +15V, V
EE
= 12V or 15V, V
LOGIC
= +5V unless otherwise specified.
ADC774J, ADC774SH
ADC774K, ADC774TH
PARAMETER
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
RESOLUTION
12
*
Bits
INPUTS
ANALOG
Voltage Ranges: Unipolar
0 to +10, 0 to +20
*
V
Bipolar
5,
10
*
V
Impedance: 0 to +10V,
5V
3.75
5
6.25
*
*
*
k
10V, 0V to +20V
7.5
10
12.5
*
*
*
k
DIGITAL (CE, CS, R/C, A
O
, 12/8)
Over Temperature Range
Voltages: Logic 1
+2
+5.5
*
*
V
Logic 0
0.5
+0.8
*
*
V
Current
5
0.1
+5
*
*
*
A
Capacitance
5
*
pF
TRANSFER CHARACTERISTICS
ACCURACY
At +25
C
Linearity Error
1
1/2
LSB
Unipolar Offset Error (Adjustable to Zero)
2
*
LSB
Bipolar Offset Error (Adjustable to Zero)
10
4
LSB
Full-Scale Calibration Error
(1)
(Adjustable to Zero)
0.25
*
% of FS
(2)
No Missing Codes Resolution (Diff. Linearity)
11
12
Bits
Inherent Quantization Error
1/2
*
LSB
T
MIN
to T
MAX
Linearity Error: J, K Grades
1
1/2
LSB
S, T Grades
1
3/4
LSB
Full-Scale Calibration Error
Without Initial Adjustment
(1)
: J, K Grades
0.47
0.37
% of FS
S, T Grades
0.75
0.5
% of FS
Adjusted to Zero at +25
C: J, K Grades
0.22
0.12
% of FS
S, T Grades
0.5
0.25
% of FS
No Missing Codes Resolution (Diff. Linearity)
11
12
Bits
TEMPERATURE COEFFICIENTS (T
MIN
to T
MAX
)
(3)
Unipolar Offset: J, K Grades
10
5
ppm/
C
S, T Grades
5
2.5
ppm/
C
Max Change: All Grades
2
1
LSB
Bipolar Offset: All Grades
10
5
ppm/
C
Max Change: J, K Grades
2
1
LSB
S, T Grades
4
2
LSB
Full-Scale Calibration: J, K Grades
45
25
ppm/
C
S, T Grades
50
25
ppm/
C
Max Change: J, K Grades
9
5
LSB
S, T Grades
20
10
LSB
POWER SUPPLY SENSITIVITY
Change in Full-Scale Calibration
+13.5V < V
CC
<+16.5V or +11.4V < V
CC
< +12.6V
2
1
LSB
16.5V < V
EE
<13.5V or 12.6V < V
EE
< 11.4V
2
1
LSB
+4.5V < V
LOGIC
<+5.5V
1/2
*
LSB
CONVERSION TIME
(4,5)
8-Bit Cycle
5
5.3
*
*
s
12-Bit Cycle
7.5
8.5
s
OUTPUTS
DIGITAL (DB11 DB0, STATUS)
(Over Temperature Range)
Output Codes: Unipolar
Unipolar Straight Binary (USB)
Bipolar
Bipolar Offset Binary (BOB)
Logic Levels: Logic 0 (I
SINK
= 1.6mA)
+0.4
*
V
Logic 1 (I
SOURCE
= 500
A)
+2.4
*
V
Leakage, Data Bits Only, High-Z State
5
0.1
+5
*
*
*
A
Capacitance
5
*
pF
3
ADC774
*Same specification as ADC774JH, JP, SH.
NOTES: (1) With fixed 50
resistor from Ref Out to Ref In. This parameter is also adjustable to zero at +25C. (2) FS in this specification table means Full Scale Range.
That is, for a
10V input range FS means 20V; for a 0V to +10V range, FS means 10V. The term Full Scale for these specification instead of Full-Scale Range is used
to be consistent with other vendors' specifications tables. (3) Using internal reference. (4) See "Controlling the ADC774" section for detailed information concerning
digital timing. (5) The Harris HI-774 uses a subranging/error correction technique that allows one to begin conversion before a preceding sample-hold or multiplexer
has settled to
1/2LSB. For 12-bit accurate conversions, the input transient to the ADC774 must settle to less than
1/2LSB before conversion is started. The ADC774
is compatible with HI-774 in all other respects. (6) External loading must be constant during conversion. The reference output requires no buffer amplifier with either
12V or
15V power supplies.
SPECIFICATIONS
(CONT)
ELECTRICAL
T
A
= +25
C, V
CC
= +12V or +15V, V
EE
= 12V or 15V, V
LOGIC
= +5V unless otherwise specified.
ADC774J, ADC774SH
ADC774K, ADC774TH
PARAMETER
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
INTERNAL REFERENCE VOLRAGE
Voltage
+9.9
+10
+10.1
*
*
*
V
Source Current Available for External Loads
(6)
2.0
*
mA
POWER SUPPLY REQUIREMENTS
Voltage: V
CC
+11.4
+16.5
*
*
V
V
EE
11.4
16.5
*
*
V
V
LOGIC
+4.5
+5.5
*
*
V
Current: I
CC
3.5
5
*
*
mA
I
EE
15
20
*
*
mA
I
LOGIC
9
15
*
*
mA
Power Dissipation (
15V Supplies)
`
325
450
*
*
mW
TEMPERATURE RANGE (Ambient: T
MIN
, T
MAX
)
Specifications: J, K Grades
0
+75
*
*
C
S, T Grades
55
+125
*
*
C
Storage
65
+150
*
*
C
PIN CONFIGURATION
Top View
DIP
+5VDC Supply (V )
12/8
CS
A
R/C
CE
+V
Ref Out
Analog Common
Ref In
V
Bipolar Offset
10V Range
20V Range
STATUS
DB11 (MSB)
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0 (LSB)
Digital Common
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LOGIC
CC
EE
5
10k
10V
Reference
12-Bit
D/A
Converter
Successive Approximation Register
Control
Logic
Power-up Reset
Clock
12 Bits
Comparator
12 Bits
Nibble A
Nibble B
Nibble C
Three-State Buffers and Control
O
5
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
4
ADC774
ABSOLUTE MAXIMUM RATINGS
V
CC
to Digital Common ......................................................... 0V to +16.5V
V
EE
to Digital Common .......................................................... 0V to 16.5V
V
LOGIC
Digital Common .............................................................. 0V to +7V
Analog Common to Digital Common ....................................................
1V
Control Inputs (CE, CS, A
O
, 12/8, R/C)
to Digital Common .............................................. 0.5V to V
LOGIC
+0.5V
Analog Inputs (Ref In, Bipolar Offset, 10V
IN
)
to Analog Common ......................................................................
16.5V
20V
IN
to Analog Common ..................................................................
24V
Ref Out .......................................................... Indefinite Short to Common,
Momentary Short to V
CC
Max Junction Temperature ............................................................ +165
C
Power Dissipation ........................................................................ 1000mW
Lead Temperature (soldering,10s) ................................................. +300
C
Thermal Resistance,
JA
: Ceramic ................................................ 50
C/W
Plastic ................................................. 100
C/W
CAUTION: These devices are sensitive to electrostatic discharge.
Appropriate I.C. handling procedures should be followed.
BURN-IN SCREENING
Burn-in screening is available for both plastic and ceramic
package ADC774s. Burn-in duration is 160 hours at the
temperature (or equivalent combination of time and tem-
perature) indicated below:
Plastic "-BI" models: +85
C
Ceramic "-BI" models: +125
C
All units are 100% electrically tested after burn-in is com-
pleted. To order burn-in, add "-BI" to the base model
number (e.g. ADC774KP-BI). See Ordering Information for
pricing.
ORDERING INFORMATION
BURN-IN SCREENING OPTION
See text for details.
LINEARITY
TEMPERATURE
ERROR MAX
MODEL
PACKAGE
RANGE
(T
MIN
TO T
MAX
)
ADC774JP
Plastic DIP
0
C TO +75
C
1LSB
ADC774KP
Plastic DIP
0
C to +75
C
1/2LSB
ADC774JH
Ceramic DIP
0
C to +75
C
1LSB
ADC774KH
Ceramic DIP
0
C to +75
C
1/2LSB
ADC774SH
Ceramic DIP
55
C to +125
C
1LSB
ADC774TH
Ceramic DIP
55
C to +125
C
3/4LSB
TEMPERATURE
BURN-IN TEMP
MODEL
PACKAGE
RANGE
(160 HOURS)
(1)
ADC774JP-BI
Plastic DIP
0
C to +75
C
+85
C
ADC774KP-BI
Plastic DIP
0
C to +75
C
+85
C
ADC774JH-BI
Ceramic DIP
0
C to +75
C
+125
C
ADC774KH-BI
Ceramic DIP
0
C to +75
C
+125
C
ADC774SH-BI
Ceramic DIP
55
C to +125
C
+125
C
ADC774TH-BI
Ceramic DIP
55
C to +125
C
+125
C
PACKAGE INFORMATION
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
(1)
ADC774JP
28-Pin Plastic DIP
215
ADC774KP
28-Pin Plastic DIP
215
ADC774JH
28-Pin Ceramic DIP
149
ADC774KH
28-Pin Ceramic DIP
149
ADC774SH
28-Pin Ceramic DIP
149
ADC774TH
28-Pin Ceramic DIP
149
ADC774JP-BI
28-Pin Plastic DIP
215
ADC774KP-BI
28-Pin Plastic DIP
215
ADC774JH-BI
28-Pin Ceramic DIP
149
ADC774KH-BI
28-Pin Ceramic DIP
149
ADC774SH-BI
28-Pin Ceramic DIP
149
ADC774TH-BI
28-Pin Ceramic DIP
149
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
5
ADC774
CONTROLLING THE ADC774
This is an abridged data sheet. For Discussion of Specifica-
tions, Installation, Calibration refer to ADC574A data sheet
or order PDS-835.
The Burr-Brown ADC774 can be easily interfaced to most
microprocessor systems and other digital systems. The
microprocessor may take full control of each conversion, or
the converter may operate in a stand-alone mode, controlled
only by the R/C input. Full control consists of selecting an
8- or 12-bit conversion cycle, initiating the conversion, and
reading the output data when ready--choosing either 12 bits
all at once, or 8 bits followed by 4 bits in a left-justified
format. The five control inputs (12/8, CS, A
O
, R/C, and CE)
are all TTL-/CMOS-compatible. The functions of the con-
trol inputs are described in Table I. The control function
truth table is listed in Table II.
Read footnote 5 to the Electrical Specifications table if
using ADC774 to replace the HI-774.
STAND-ALONE OPERATION
For stand-alone operation, control of the converter is ac-
complished by a single control line connected to R/C. In this
mode CS and A
O
are connected to digital common and CE
and 12/8 are connected to V
LOGIC
(+5V). The output data
are presented as 12-bit words. The stand-alone mode is used
in systems containing dedicated input ports which do not
require full bus interface capability.
PIN
DESIGNATION
DEFINITION
FUNCTION
CE (Pin 6)
Chip Enable
Must be high ("1") to either initiate a conversion or read output data. 0-1 edge may be used to initiate a
(active high)
conversion.
CS (Pin 3)
Chip Select
Must be low ("0") to either initiate a conversion or read output data. 1-0 edge may be used to initiate
(active low)
a conversion.
R/C (Pin 5)
Read/Convert
Must be low ("0") to initiate either 8- or 12-bit conversions. 1-0 edge may be used to initiate a
("1" = read)
conversion. Must be high ("1") to read output data. 0-1 edge may be used to initiate a read operation.
("0" = convert)
A
O
(Pin 4)
Byte Address
In the start-convert mode, A
O
selects 8-bit (A
O
= "1") or 12-bit (A
O
= "0") conversion mode. When reading
Short Cycle
output data in two 8-bit bytes, A
O
= "0" accesses 8 MSBs (high byte) and A
O
= "1" accesses 4 LSBs and
trailing "0s" (low byte).
12/8 (Pin 2)
Data Mode Select
When reading output data, 12/8 = "1" enables all 12 output bits simultaneously. 12/8 = "0" will enable the
("1" = 12 bits)
MSBs or LSBs as determined by the A
O
line.
("0" = 8 bits)
TABLE I. ADC774 Control Line Functions.
CE
CS
R/C
12/8
A
O
OPERATION
0
X
X
X
X
None
X
1
X
X
X
None
0
0
X
0
Initiate 12-bit conversion
0
0
X
1
Initiate 8-bit conversion
1
0
X
0
Initiate 12-bit conversion
1
0
X
1
Initiate 8-bit conversion
1
0
X
0
Initiate 12-bit conversion
1
0
X
1
Initiate 8-bit conversion
1
0
1
1
X
Enable 12-bit output
1
0
1
0
0
Enable 8 MSBs only
1
0
1
0
1
Enable 4 LSBs plus 4
trailing zeros
TABLE II. Control Input Truth Table.
SYMBOL PARAMETER
MIN
TYP
MAX
UNITS
t
HRL
Low R/C Pulse Width
50
ns
t
DS
STS Delay from R/C
200
ns
t
HDR
Data Valid After R/C Low
25
ns
t
HS
STS Delay After Data Valid
150
375
ns
t
HRH
High R/C Pulse Width
150
ns
t
DDR
Data Access Time
150
ns
TABLE III. Stand-Alone Mode Timing.
Conversion is initiated by a high-to-low transition of R/C.
The three-state data output buffers are enabled when R/C is
high and STATUS is low. Thus, there are two possible
modes of operation; conversion can be initiated with either
positive or negative pulses. In either case the R/C pulse
must remain low for a minimum of 50ns.
FIGURE 2. R/C Pulse High--Outputs Enabled Only While
R/C Is High.
R/C
STS
DB11
DB0
Data Valid
High-Z State
t
HRH
t
DS
t
DDR
t
C
t
HDR
High-Z
FIGURE 1. R/C Pulse Low--Outputs Enabled After Con-
version.
R/C
STS
DB11DB0
Data Valid
Data Valid
High-Z State
t
HRL
t
DS
t
HDR
t
HS
t
C
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