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Электронный компонент: ADS7830IPWT

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8-Bit, 8-Channel Sampling
ANALOG-TO-DIGITAL CONVERTER
with I
2
C
TM
Interface
FEATURES
q
70kHz SAMPLING RATE
q
0.5LSB INL/DNL
q
8 BITS NO MISSING CODES
q
4 DIFFERENTIAL/8 SINGLE-ENDED INPUTS
q
2.7V TO 5V OPERATION
q
BUILT-IN 2.5V REFERENCE/BUFFER
q
SUPPORTS ALL THREE I
2
C MODES:
Standard, Fast, and High-Speed
q
LOW POWER:
180
W (Standard Mode)
300
W (High-Speed Mode)
675
W (Fast Mode)
q
DIRECT PIN COMPATIBLE WITH ADS7828
q
TSSOP-16 PACKAGE
APPLICATIONS
q
VOLTAGE-SUPPLY MONITORING
q
ISOLATED DATA ACQUISITION
q
TRANSDUCER INTERFACE
q
BATTERY-OPERATED SYSTEMS
q
REMOTE DATA ACQUISITION
DESCRIPTION
The ADS7830 is a single-supply, low-power, 8-bit data
acquisition device that features a serial I
2
C interface and an
8-channel multiplexer. The Analog-to-Digital (A/D) converter
features a sample-and-hold amplifier and internal,
asynchronous clock. The combination of an I
2
C serial,
2-wire interface and micropower consumption makes the
ADS7830 ideal for applications requiring the A/D converter to
be close to the input source in remote locations and for
applications requiring isolation. The ADS7830 is available in
a TSSOP-16 package.
ADS7830
SBAS302 DECEMBER 2003
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SAR
2.5V V
REF
Serial
Interface
SDA
Comparator
S/H Amp
REF
IN
/REF
OUT
SCL
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
A0
A1
CDAC
8-Channel
MUX
Buffer
ADS7
830
All trademarks are the property of their respective owners.
ADS7830
2
SBAS302
www.ti.com
MAXIMUM
INTEGRAL
SPECIFIED
LINEARITY
PACKAGE
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
ERROR (LSB)
PACKAGE-LEAD
DESIGNATOR
RANGE
NUMBER
MEDIA, QUANTITY
ADS7830I
0.5
TSSOP-16
PW
40
C to +85
C
ADS7830IPWT
Tape and Reel, 250
"
"
"
"
"
ADS7830IPWR
Tape and Reel, 2500
NOTE: (1) For the most current package and ordering information, refer to our web site at www.ti.com.
PACKAGE/ORDERING INFORMATION
(1)
ABSOLUTE MAXIMUM RATINGS
(1)
+V
DD
to GND ........................................................................ 0.3V to +6V
Digital Input Voltage to GND ................................. 0.3V to +V
DD
+ 0.3V
Operating Temperature Range ...................................... 40
C to +105
C
Storage Temperature Range ......................................... 65
C to +150
C
Junction Temperature (T
J
max) .................................................... +150
C
TSSOP Package
Power Dissipation .................................................... (T
J
max T
A
)/
JA
JA
Thermal Impedance ........................................................ 240
C/W
Lead Temperature, Soldering
Vapor Phase (60s) ............................................................ +215
C
Infrared (15s) ..................................................................... +220
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.
PIN CONFIGURATION
Top View
TSSOP
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
CH0
Analog Input Channel 0
2
CH1
Analog Input Channel 1
3
CH2
Analog Input Channel 2
4
CH3
Analog Input Channel 3
5
CH4
Analog Input Channel 4
6
CH5
Analog Input Channel 5
7
CH6
Analog Input Channel 6
8
CH7
Analog Input Channel 7
9
GND
Analog Ground
10
REF
IN
/ REF
OUT
Internal +2.5V Reference, External Reference Input
11
COM
Common to Analog Input Channel
12
A0
Slave Address Bit 0
13
A1
Slave Address Bit 1
14
SCL
Serial Clock
15
SDA
Serial Data
16
+V
DD
Power Supply, 3.3V Nominal
1
2
3
4
5
6
7
8
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
+V
DD
SDA
SCL
A1
A0
COM
REF
IN
/ REF
OUT
GND
16
15
14
13
12
11
10
9
ADS7830
ADS7830
3
SBAS302
www.ti.com
ANALOG INPUT
Full-Scale Input Scan
Positive Input - Negative Input
0
V
REF
V
Absolute Input Range
Positive Input
0.2
+V
DD
+ 0.2
V
Negative Input
0.2
+0.2
V
Capacitance
25
pF
Leakage Current
1
A
SYSTEM PERFORMANCE
No Missing Codes
8
Bits
Integral Linearity Error
0.1
0.5
LSB
(1)
Differential Linearity Error
0.1
0.5
LSB
Offset Error
+0.5
+1
LSB
Offset Error Match
0.05
0.25
LSB
Gain Error
0.1
0.5
LSB
Gain Error Match
0.05
0.25
LSB
Noise
100
VRMS
Power-Supply Rejection
72
dB
SAMPLING DYNAMICS
Throughput Frequency
High-Speed Mode: SCL = 3.4MHz
70
kSPS
(2)
Fast Mode: SCL = 400kHz
10
kSPS
Standard Mode, SCL = 100kHz
2.5
kSPS
Conversion Time
5
s
AC ACCURACY
Total Harmonic Distortion
V
IN
= 2.5V
PP
at 1kHz
72
dB
(3)
Signal-to-Ratio
V
IN
= 2.5V
PP
at 1kHz
50
dB
Signal-to-(Noise+Distortion) Ratio
V
IN
= 2.5V
PP
at 1kHz
49
dB
Spurious-Free Dynamic Range
V
IN
= 2.5V
PP
at 1kHz
68
dB
Isolation Channel-to-Channel
90
dB
VOLTAGE REFERENCE OUTPUT
Range
2.475
2.5
2.525
V
Internal Reference Drift
15
ppm/
C
Output Impedance
Internal Reference ON
110
Internal Reference OFF
1
G
Quiescent Current
Internal Reference ON, SCL and SDA pulled HIGH
850
A
VOLTAGE REFERENCE INPUT
Range
0.05
V
DD
V
Resistance
1
G
Current Drain
High-Speed Mode: SCL= 3.4MHz
20
A
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Levels: V
IH
+V
DD
0.7
+V
DD
+ 0.5
V
V
IL
0.3
+V
DD
0.3
V
V
OL
Minimum 3mA Sink Current
0.4
V
Input Leakage: I
IH
V
IH
= +V
DD
+0.5
10
A
I
IL
V
IL
= -0.3
-10
A
Data Format
Straight
Binary
ADS7830 HARDWARE ADDRESS
10010
Binary
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage, +V
DD
Specified Performance
2.7
3.6
V
Quiescent Current
High-Speed Mode: SCL = 3.4MHz
225
320
A
Fast Mode: SCL = 400kHz
100
A
Standard Mode, SCL = 100kHz
60
A
Power Dissipation
High-Speed Mode: SCL = 3.4MHz
675
1000
W
Fast Mode: SCL = 400kHz
300
W
Standard Mode, SCL = 100kHz
180
W
Power-Down Mode
High-Speed Mode: SCL = 3.4MHz
70
A
w/Wrong Address Selected
Fast Mode: SCL = 400kHz
25
A
Standard Mode, SCL = 100kHz
6
A
Full Power-Down
SCL Pulled HIGH, SDA Pulled HIGH
400
3000
nA
TEMPERATURE RANGE
Specified Performance
40
85
C
NOTES: (1) LSB means least significant bit. When V
REF
= 2.5V, 1LSB is 9.8mV. (2) kSPS means kilo samples-per-second. (3) THD measured out to the 9th-harmonic.
ELECTRICAL CHARACTERISTICS: +2.7V
At T
A
= 40
C to +85
C, +V
DD
= +2.7V, V
REF
= +2.5V, SCL Clock Frequency = 3.4MHz (High-Speed Mode), unless otherwise noted.
ADS7830E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ADS7830
4
SBAS302
www.ti.com
ANALOG INPUT
Full-Scale Input Scan
Positive Input - Negative Input
0
V
REF
V
Absolute Input Range
Positive Input
0.2
+V
DD
+ 0.2
V
Negative Input
0.2
+0.2
V
Capacitance
25
pF
Leakage Current
1
A
SYSTEM PERFORMANCE
No Missing Codes
8
Bits
Integral Linearity Error
0.1
0.5
LSB
(1)
Differential Linearity Error
0.1
0.5
LSB
Offset Error
+0.5
+1
LSB
Offset Error Match
0.05
0.25
LSB
Gain Error
0.1
0.5
LSB
Gain Error Match
0.05
0.25
LSB
Noise
100
VRMS
Power-Supply Rejection
72
dB
SAMPLING DYNAMICS
Throughput Frequency
High-Speed Mode: SCL = 3.4MHz
70
kSPS
(2)
Fast Mode: SCL = 400kHz
10
kSPS
Standard Mode, SCL = 100kHz
2.5
kSPS
Conversion Time
5
s
AC ACCURACY
Total Harmonic Distortion
V
IN
= 5V
PP
at 1kHz
72
dB
(3)
Signal-to-Ratio
V
IN
= 5V
PP
at 1kHz
50
dB
Signal-to-(Noise+Distortion) Ratio
V
IN
= 5V
PP
at 1kHz
49
dB
Spurious-Free Dynamic Range
V
IN
= 5V
PP
at 1kHz
68
dB
Isolation Channel-to-Channel
90
dB
VOLTAGE REFERENCE OUTPUT
Range
2.475
2.5
2.525
V
Internal Reference Drift
15
ppm/
C
Output Impedance
Internal Reference ON
110
Internal Reference OFF
1
G
Quiescent Current
Int. Ref. ON, SCL and SDA pulled HIGH
1300
A
VOLTAGE REFERENCE INPUT
Range
0.05
V
DD
V
Resistance
1
G
Current Drain
High-Speed Mode: SCL = 3.4MHz
20
A
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Levels: V
IH
+V
DD
0.7
+V
DD
+ 0.5
V
V
IL
0.3
+V
DD
0.3
V
V
OL
Minimum 3mA Sink Current
0.4
V
Input Leakage: I
IH
V
IH
= +V
DD
+0.5
10
A
I
IL
V
IL
= -0.3
-10
A
Data Format
Straight
Binary
ADS7830 HARDWARE ADDRESS
10010
Binary
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage, +V
DD
Specified Performance
4.75
5
5.25
V
Quiescent Current
High-Speed Mode: SCL = 3.4MHz
750
1000
A
Fast Mode: SCL = 400kHz
300
A
Standard Mode, SCL = 100kHz
150
A
Power Dissipation
High-Speed Mode: SCL = 3.4MHz
3.75
5
mW
Fast Mode: SCL = 400kHz
1.5
mW
Standard Mode, SCL = 100kHz
0.75
mW
Power-Down Mode
High-Speed Mode: SCL = 3.4MHz
400
A
w/Wrong Address Selected
Fast Mode: SCL = 400kHz
150
A
Standard Mode, SCL = 100kHz
35
A
Full Power-Down
SCL Pulled HIGH, SDA Pulled HIGH
400
3000
nA
TEMPERATURE RANGE
Specified Performance
40
85
C
NOTES: (1) LSB means Least Significant Bit. When V
REF
= 5.0V, 1LSB is 19.5mV. (2) kSPS means kilo samples-per-second. (3) THD measured out to the 9th-harmonic.
ELECTRICAL CHARACTERISTICS: +5V
At T
A
= 40
C to +85
C, +V
DD
= +5.0V, V
REF
= External +5.0V, SCL Clock Frequency = 3.4MHz (High-Speed Mode), unless otherwise noted.
ADS7830E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ADS7830
5
SBAS302
www.ti.com
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
SCL Clock Frequency
f
SCL
Standard Mode
100
kHz
Fast Mode
400
kHz
High-Speed Mode, C
B
= 100pF max
3.4
MHz
High-Speed Mode, C
B
= 400pF max
1.7
MHz
Bus Free Time Between a STOP and
t
BUF
Standard Mode
4.7
s
START Condition
Fast Mode
1.3
s
Hold Time (Repeated) START
t
HD
;
STA
Standard Mode
4.0
s
Condition
Fast Mode
600
ns
High-Speed Mode
160
ns
LOW Period of the SCL Clock
t
LOW
Standard Mode
4.7
s
Fast Mode
1.3
s
High-Speed Mode, C
B
= 100pF max
(2)
160
ns
High-Speed Mode, C
B
= 400pF max
(2)
320
ns
HIGH Period of the SCL Clock
t
HIGH
Standard Mode
4.0
s
Fast Mode
600
ns
High-Speed Mode, C
B
= 100pF max
(2)
60
ns
High-Speed Mode, C
B
= 400pF max
(2)
120
ns
Setup Time for a Repeated START
t
SU
;
STA
Standard Mode
4.7
s
Condition
Fast Mode
600
ns
High-Speed Mode
160
ns
Data Setup Time
t
SU
;
DAT
Standard Mode
250
ns
Fast Mode
100
ns
High-Speed Mode
10
ns
Data Hold Time
t
HD
;
DAT
Standard Mode
0
3.45
s
Fast Mode
0
0.9
s
High-Speed Mode, C
B
= 100pF max
(2)
0
(3)
70
ns
High-Speed Mode, C
B
= 400pF max
(2)
0
(3)
150
ns
Rise Time of SCL Signal
t
RCL
Standard Mode
1000
ns
Fast Mode
20 + 0.1C
B
300
ns
High-Speed Mode, C
B
= 100pF max
(2)
10
40
ns
High-Speed Mode, C
B
= 400pF max
(2)
20
80
ns
Rise Time of SCL Signal After a
t
RCL1
Standard Mode
1000
ns
Repeated START Condition and
Fast Mode
20 + 0.1C
B
300
ns
After an Acknowledge Bit
High-Speed Mode, C
B
= 100pF max
(2)
10
80
ns
High-Speed Mode, C
B
= 400pF max
(2)
20
160
ns
Fall Time of SCL Signal
t
FCL
Standard Mode
300
ns
Fast Mode
20 + 0.1C
B
300
ns
High-Speed Mode, C
B
= 100pF max
(2)
10
40
ns
High-Speed Mode, C
B
= 400pF max
(2)
20
80
ns
TIMING CHARACTERISTICS
(1)
At T
A
= 40
C to +85
C, +V
DD
= +2.7V, unless otherwise noted.
TIMING DIAGRAM
t
R
t
BUF
t
LOW
t
F
t
HD; STA
t
SP
t
HD; STA
t
SU; STA
t
HD; DAT
t
SU; DAT
t
HIGH
t
SU; STO
SCL
SDA
START
REPEATED
START
STOP