10-Bit, 20MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
TM
ADS820
FEATURES
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NO MISSING CODES
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INTERNAL REFERENCE
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LOW DIFFERENTIAL LINEARITY ERROR:
0.2LSB
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LOW POWER: 195mW
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HIGH SNR: 60dB
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WIDEBAND TRACK/HOLD: 65MHz
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PACKAGES: 28-Pin SOIC and 28-PIN SSOP
DESCRIPTION
The ADS820 is a low power, monolithic 10-bit, 20MHz
analog-to-digital converter utilizing a small geometry
CMOS process. This COMPLETE converter includes
a 10-bit quantizer with internal track/hold, reference,
and a power down feature. It operates from a single
+5V power supply and can be configured to accept
either differential or single-ended input signals.
The ADS820 employs digital error correction to pro-
vide excellent Nyquist differential linearity perfor-
mance for demanding imaging applications. Its low
distortion, high SNR and high oversampling capability
give it the extra margin needed for telecommunications
and video applications.
This high performance converter is specified for AC
and DC performance at a 20MHz sampling rate. The
ADS820 is available in 28-pin SOIC and SSOP
packages.
Pipeline
A/D
Timing
Circuitry
Error
Correction
Logic
3-State
Outputs
T/H
10-Bit
Digital
Data
CLK
+1.25V
+3.25V
MSBI
OE
IN
IN
REFT
CM
REFB
1995 Burr-Brown Corporation
PDS-1288D
Printed in U.S.A. October, 1996
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111
Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
APPLICATIONS
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SET-TOP BOXES
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CABLE MODEMS
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VIDEO DIGITIZING
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CCD IMAGING
Camcorders
Copiers
Scanners
Security Cameras
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IF AND BASEBAND DIGITIZATION
ADS820U
ADS820E
2
ADS820
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
ADS820U, E
PARAMETER
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
SPECIFICATIONS
At T
A
= +25
C, V
S
= +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
Resolution
10 Guaranteed
Bits
Specified Temperature Range
T
AMBIENT
40
+85
C
ANALOG INPUT
Differential Full Scale Input Range
+1.25
+3.25
V
Common-Mode Voltage
2.25
V
Analog Input Bandwidth (3dB)
Small Signal
20dBFS
(1)
Input
+25
C
120
MHz
Full Power
0dB Input
+25
C
65
MHz
Input Impedance
1.25 || 4
M
|| pF
DIGITAL INPUT
Logic Family
TTL/HCT Compatible CMOS
Convert Command
Start Conversion
Falling Edge
ACCURACY
(2)
Gain Error
+25
C
0.6
1.5
%
Full
1.0
2.5
%
Gain Tempco
85
ppm/
C
Power Supply Rejection of Gain
Delta +V
S
=
5%
+25
C
0.01
0.1
%FSR/%
Input Offset Error
Full
2.1
3.0
%
Power Supply Rejection of Offset
Delta +V
S
=
5%
+25
C
0.02
0.1
%FSR/%
CONVERSION CHARACTERISTICS
Sample Rate
10k
20M
Sample/s
Data Latency
6.5
Convert Cycle
DYNAMIC CHARACTERISTICS
Differential Linearity Error
f = 500kHz
+25
C
0.15
1.0
LSB
Full
0.15
1.0
LSB
f = 10MHz
+25
C
0.2
1.0
LSB
Full
0.2
1.0
LSB
No Missing Codes
Full
Guaranteed
Integral Linearity Error at f = 500kHz
Full
0.5
2.0
LSB
Spurious-Free Dynamic Range (SFDR)
f = 500kHz (1dBFS input)
+25
C
67
77
dBFS
Full
64
74
dBFS
f = 10MHz (1dBFS input)
+25
C
59
63
dBFS
Full
57
62
dBFS
Two-Tone Intermodulation Distortion (IMD)
(3)
f = 4.4MHz and 4.5MHz (referred to 1dBFS envelope)
+25
C
61
dBc
Full
60
dBc
Signal-to-Noise Ratio (SNR)
f = 500kHz (1dBFS input)
+25
C
58
60.5
dB
Full
56
60
dB
f = 10MHz (1dBFS input)
+25
C
58
60
dB
Full
56
60
dB
Signal-to-(Noise + Distortion) (SINAD)
f = 500kHz (1dBFS input)
+25
C
58
60.5
dB
Full
55
60
dB
f = 10MHz (1dBFS input)
+25
C
56
58
dB
Full
54
57
dB
Differential Gain Error
NTSC or PAL
+25
C
0.5
%
Differential Phase Error
NTSC or PAL
+25
C
0.1
degrees
Effective Bits
(4)
f
IN
= 3.58MHz
9.5
Bits
Aperture Delay Time
+25
C
2
ns
Aperture Jitter
+25
C
7
ps rms
Overvoltage Recovery Time
(5)
1.5x Full Scale Input
+25
C
2
ns
NOTE: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D Full Scale Range of 4Vp-p. (3) IMD is referred to the
larger of the two input signals. If referred to the peak envelope signal (
0dB), the intermodulation products will be 7dB lower. (4) Based on (SINAD 1.76)/6.02.
(5) No "rollover" of bits.
3
ADS820
ADS820U, E
PARAMETER
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
SPECIFICATIONS
(CONT)
At T
A
= +25
C, V
S
= +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
OUTPUTS
Logic Family
TTL/HCT Compatible CMOS
Logic Coding
Logic Selectable
SOB or BTC
V
Logic Levels
Logic "LO", C
L
= 15pF
Full
0
0.4
V
Logic "HI", C
L
= 15pF
Full
2.5
+V
S
V
3-State Enable Time
20
40
ns
3-State Disable Time
Full
2
10
ns
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Operating
Full
+4.75
+5
+5.25
V
Supply Current: +I
S
Operating
+25
C
39
47
mA
Operating
Full
40
55
mA
Power Consumption
Operating
+25
C
195
235
mW
Operating
Full
200
275
mW
Thermal Resistance,
JA
28-Pin SOIC
75
C/W
28-Pin SSOP
50
C/W
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
Electrostatic discharge can cause damage ranging from
performance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits be
handled and stored using appropriate ESD protection
methods.
ABSOLUTE MAXIMUM RATINGS
+V
S
....................................................................................................... +6V
Analog Input .............................................................. 0V to (+V
S
+ 300mV)
Logic Input ................................................................ 0V to (+V
S
+ 300mV)
Case Temperature ......................................................................... +100
C
Junction Temperature .................................................................... +150
C
Storage Temperature ..................................................................... +125
C
External Top Reference Voltage (REFT) .................................. +3.4V Max
External Bottom Reference Voltage (REFB) .............................. +1.1V Min
NOTE: Stresses above these ratings may permanently damage the device.
PACKAGE
DRAWING
TEMPERATURE
PRODUCT
PACKAGE
NUMBER
(1)
RANGE
ADS820U
28-Pin SOIC
217
40
C to +85
C
ADS820E
28-Pin SSOP
324
40
C to +85
C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
4
ADS820
PIN
DESIGNATOR
DESCRIPTION
1
GND
Ground
2
B1
Bit 1, Most Significant Bit
3
B2
Bit 2
4
B3
Bit 3
5
B4
Bit 4
6
B5
Bit 5
7
B6
Bit 6
8
B7
Bit 7
9
B8
Bit 8
10
B9
Bit 9
11
B10
Bit 10, Least Significant Bit
12
DNC
Do not connect.
13
DNC
Do not connect.
14
GND
Ground
15
+V
S
+5V Power Supply
16
CLK
Convert Clock Input, 50% Duty Cycle
17
+V
S
+5V Power Supply
18
OE
HI: High Impedance State. LO or Floating: Nor-
mal Operation. Internal pull-down resistor.
19
MSBI
Most Significant Bit Inversion, HI: MSB inverted
for complementary output. LO or Floating: Straight
output. Internal pull-down resistor.
20
+V
S
+5V Power Supply
21
REFB
Bottom Reference Bypass. For external bypass-
ing of internal +1.25V reference.
22
CM
Common-Mode Voltage. It is derived by (REFT +
REFB)/2.
23
REFT
Top Reference Bypass. For external bypassing
of internal +3.25V reference.
24
+V
S
+5V Power Supply
25
GND
Ground
26
IN
Input
27
IN
Complementary Input
28
GND
Ground
PIN DESCRIPTIONS
PIN CONFIGURATION
TOP VIEW
SOIC/SSOP
GND
Bit 1(MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 (LSB)
DNC
DNC
GND
GND
IN
IN
GND
+V
S
REFT
CM
REFB
+V
S
MSBI
OE
+V
S
CLK
+V
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS820
DNC: Do Not Connect
TIMING DIAGRAM
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
Convert Clock Period
50
100
s
ns
t
L
Clock Pulse Low
24
25
ns
t
H
Clock Pulse High
24
25
ns
t
D
Aperture Delay
2
ns
t
1
Data Hold Time, C
L
= 0pF
3.9
ns
t
2
New Data Delay Time, C
L
= 15pF max
12.5
ns
Track
Hold
"N"
Hold
"N + 1"
Hold
"N + 2"
Hold
"N + 3"
Hold
"N + 4"
Hold
"N + 5"
Hold
"N + 6"
Track
Data Valid
N-7
Data Valid
N-6
INTERNAL
TRACK/HOLD
CONVERT
CLOCK
OUTPUT
DATA
t
D
t
2
t
1
DATA LATENCY
(6.5 Clock Cycles)
t
CONV
t
L
t
H
Track
Track
Track
Track
N-3
N-5
N-4
N-2
N-1
N
Track
Track
Data Valid
N-8
(1)
Data Invalid
NOTE: (1) " " indicates the portion of the waveform that will stretch out at slower sample rates.
5
ADS820
SPECTRAL PERFORMANCE
Frequency (MHz)
Amplitude (dB)
0
1.0
2.0
3.0
4.0
5.0
0
20
40
60
80
100
120
f
IN
= 500kHz
f
S
= 10MHz
SPECTRAL PERFORMANCE
Frequency (MHz)
Amplitude (dB)
0
2.0
4.0
6.0
8.0
10.0
0
20
40
60
80
100
120
f
IN
= 4.8MHz
SPECTRAL PERFORMANCE
Frequency (MHz)
Amplitude (dB)
0
2.0
4.0
6.0
8.0
10.0
0
20
40
60
80
100
120
f
IN
= 9.8MHz
DIFFERENTIAL LINEARITY ERROR
Code
DLE (LSB)
2.0
1.0
0
1.0
2.0
24
224
424
624
824
1024
f
IN
= 10MHz
TYPICAL PERFORMANCE CURVES
At T
A
= +25
C, V
S
= +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
0
20
40
60
80
100
120
TWO-TONE INTERMODULATION
Amplitude (dB)
0.0
2.50
5.00
7.50
10.00
Frequency (MHz)
f
1
= 4.5MHz
f
2
= 4.4MHz
DIFFERENTIAL LINEARITY ERROR
Code
DLE (LSB)
2.0
1.0
0
1.0
2.0
Code
24
224
424
624
824
1024
f
IN
= 500kHz
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