1
ADS828
ADS828
ADS828
10-Bit, 75MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
HIGH SNR: 58dB
q
LOW POWER: 325mW
q
+3V/+5V LOGIC I/O COMPATIBLE
q
INTERNAL/EXTERNAL REFERENCE
OPTION
q
SINGLE-ENDED OR DIFFERENTIAL
ANALOG INPUT
q
PROGRAMMABLE INPUT RANGE:
1Vp-p or 2Vp-p
q
LOW DNL: 0.4LSB
q
SINGLE +5V SUPPLY OPERATION
q
POWER DOWN: 20mW
q
28-LEAD SSOP PACKAGE
APPLICATIONS
q
HDTV VIDEO DIGITIZING
q
MEDICAL IMAGING
q
COMMUNICATIONS
q
TEST EQUIPMENT
DESCRIPTION
The ADS828 is a pipeline, CMOS analog-to-digital converter
that operates from a single +5V power supply. This converter
provides excellent performance with a single-ended input and
can be operated with a differential input for added spurious
performance. This high performance converter includes a 10-bit
quantizer, high bandwidth track/hold, and a high accuracy
internal reference. It also allows for the user to disable the
internal reference and utilize external references. This external
reference option provides excellent gain and offset matching
when used in multi-channel applications or in applications
where full scale range adjustment is required.
The ADS828 employs digital error correction techniques to
provide excellent differential linearity for demanding imaging
applications. Its low distortion and high SNR give the extra
margin needed for medical imaging, communications, video,
and test instrumentation. The ADS828 offers power dissipa-
tion of 325mW and also provides a power-down mode, thus
reducing power dissipation to only 20mW.
The ADS828 is specified at a maximum sampling frequency of
75MHz and a single-ended input range of 1.5V to 3.5V. The
ADS828 is available in a 28-lead SSOP package and is pin
compatible with the 10-bit, 40MHz ADS822 and ADS825, and
the 10-bit, 60MHz ADS823 and ADS826.
TM
1999 Burr-Brown Corporation
PDS-1549A
Printed in U.S.A. December, 1999
10-Bit
Pipelined
A/D Core
Internal
Reference
Optional External
Reference
Timing
Circuitry
Error
Correction
Logic
3-State
Outputs
T/H
CLK
VDRV
ADS828
+V
S
OE
PD
Int/Ext
D0
D9
IN
V
IN
IN
CM
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
For most current data sheet and other product
information, visit www.burr-brown.com
2
ADS828
SPECIFICATIONS
At T
A
= full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 75MHz, convert command clock = +3V, external reference unless
otherwise noted.
CMOS
Straight Offset Binary
ADS828E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RESOLUTION
10 Guaranteed
Bits
SPECIFIED TEMPERATURE RANGE
Ambient Air
40 to +85
C
ANALOG INPUT
Standard Single-Ended Input Range
2Vp-p
1.5
3.5
V
Optional Single-Ended Input Range
1Vp-p
2
3
V
Common-Mode Voltage
2.5
V
Optional Differential Input Range
2Vp-p
2
3
V
Analog Input Bias Current
1
A
Input Impedance
1.25 || 5
M
|| pF
Track-Mode Input Bandwidth
3dBFS
300
MHz
CONVERSION CHARACTERISTICS
Sample Rate
10k
75M
Samples/s
Data Latency
5
Clk Cyc
DYNAMIC CHARACTERISTICS
Differential Linearity Error (largest code error)
f = 1MHz
0.4
1.0
LSB
f = 10MHz
0.4
LSB
No Missing Codes
Guaranteed
Integral Nonlinearity Error, f = 1MHz
1.0
3.0
LSBs
Spurious Free Dynamic Range
(1)
Referred to Full Scale
f = 1MHz
70
dBFS
(2)
f = 10MHz
68
dBFS
Two-Tone Intermodulation Distortion
(3)
f = 9.5MHz and 9.9MHz (7dB each tone)
62
dBc
Signal-to-Noise Ratio (SNR)
Referred to Full Scale
f = 1MHz
58
dB
f = 10MHz
55
57
dB
Signal-to-(Noise + Distortion) (SINAD)
Referred to Full Scale
f = 1MHz
57
dB
f = 10MHz
50
57
dB
Effective Number of Bits
(4)
, f = 1MHz
9.3
Bits
Output Noise
Input Grounded
0.2
LSBs rms
Aperture Delay Time
3
ns
Aperture Jitter
1.2
ps rms
Overvoltage Recovery Time
2
ns
Full-Scale Step Acquisition Time
5
ns
DIGITAL INPUTS
Logic Family
TTL, +3V/5V CMOS Compatible
Convert Command
Start Conversion
Rising Edge of Convert Clock
High Level Input Current
(5)
(V
IN
= 5V)
100
A
Low Level Input Current (V
IN
= 0V)
10
A
High Level Input Voltage
+2.0
V
Low Level Input Voltage
+0.8
V
Input Capacitance
5
pF
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50
A)
VDRV = 5V
+0.1
V
Low Output Voltage, (I
OL
= 1.6mA)
+0.2
V
High Output Voltage, (I
OH
= 50
A)
+4.9
V
High Output Voltage, (I
OH
= 0.5mA)
+4.8
V
Low Output Voltage (I
OL
= 50
A)
VDRV = 3V
+0.1
V
High Output Voltage, (I
OH
= 50
A)
+2.8
V
3-State Enable Time
OE = L
20
40
ns
3-State Disable Time
OE = H
2
10
ns
Output Capacitance
5
pF
ACCURACY (Internal Reference, 2Vp-p, Unless Otherwise Noted)
Zero Error (Referred to FS)
at 25
C
0.5
3.0
%FS
Zero Error Drift (Referred to FS)
1.5
ppm/
C
Midscale Offset Error
at 25
C
0.29
%FS
Gain Error
(6)
at 25
C
1.5
2.5
%FS
Gain Error Drift
(6)
32.3
ppm/
C
Gain Error
(7)
at 25
C
0.75
1.5
%FS
Gain Error Drift
(7)
4.6
ppm/
C
Power Supply Rejection of Gain
V
S
=
5%
68
dB
REFT Tolerance
Deviation from Ideal 3.5V
10
25
mV
REFB Tolerance
Deviation From Ideal 1.5V
10
25
mV
External REFT Voltage Range
REFB + 0.8
3.5
V
S
1.25
V
External REFB Voltage Range
1.25
1.5
REFT 0.8
V
Reference Input Resistance
1.6
k
3
ADS828
PIN
DESIGNATOR
DESCRIPTION
1
GND
Ground
2
Bit 1
Data Bit 1 (D9) (MSB)
3
Bit 2
Data Bit 2 (D8)
4
Bit 3
Data Bit 3 (D7)
5
Bit 4
Data Bit 4 (D6)
6
Bit 5
Data Bit 5 (D5)
7
Bit 6
Data Bit 6 (D4)
8
Bit 7
Data Bit 7 (D3)
9
Bit 8
Data Bit 8 (D2)
10
Bit 9
Data Bit 9 (D1)
11
Bit 10
Data Bit 10 (D0) (LSB)
12
OE
Output Enable. HI = high impedance state.
LO = normal operation (internal pull-
down resistor)
13
PD
Power Down. HI = power down; LO = normal
14
CLK
Convert Clock Input
15
+V
S
+5V Supply
16
GND
Ground
17
RSEL
Input Range Select. HI = 2Vp-p; LO = 1Vp-p
18
INT/EXT
Reference Select. HI = external; LO = internal
19
REFB
Bottom Reference
20
ByB
Bottom Ladder Bypass
21
ByT
Top Ladder Bypass
22
REFT
Top Reference
23
CM
Common-Mode Voltage Output
24
IN
Complementary Input ()
25
IN
Analog Input (+)
26
GND
Ground
27
+V
S
+5V Supply
28
VDRV
Output Logic Driver Supply Voltage
POWER SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Operating
+4.75
+5.0
+5.25
V
Supply Current: +I
S
Operating
68
mA
Output Driver Supply Current (VDRV)
9
mA
Power Dissipation: VDRV = 5V
External Reference
340
385
mW
VDRV = 3V
External Reference
325
mW
VDRV = 5V
Internal Reference
355
mW
VDRV = 3V
Internal Reference
345
mW
Power Down
Operating
20
mW
Thermal Resistance,
JA
28-Lead SSOP
89
C/W
NOTES: (1) Spurious Free Dynamic Range refers to the magnitude of the largest harmonic. (2) dBFS means dB relative to Full Scale. (3) Two-tone
intermodulation distortion is referred to the largest fundamental tone. This number will be 6dB higher if it is referred to the magnitude of the two-tone fundamental
envelope. (4) Effective number of bits (ENOB) is defined by (SINAD 1.76)/6.02. (5) A 50k
pull-down resistor is inserted internally. (6) Includes internal
reference. (7) Excludes internal reference.
SPECIFICATIONS
(CONT)
At T
A
= full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 75MHz, convert command clock = +3V, external reference unless
otherwise noted.
ADS828E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PIN DESCRIPTIONS
PIN CONFIGURATION
Top View
SSOP
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 (LSB)
OE
PD
CLK
VDRV
+V
S
GND
IN
IN
CM
REFT
ByT
ByB
REFB
INT/EXT
RSEL
GND
+V
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS828
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility
for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights
or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life
support devices and/or systems.
4
ADS828
TIMING DIAGRAM
5 Clock Cycles
Data Invalid
t
D
t
L
t
H
t
CONV
N5
N4
N3
N2
N1
N
N+1
N+2
Data Out
Clock
Analog In
N
t
2
N+1
N+2
N+3
N+4
N+5
N+6
N+7
t
1
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
Convert Clock Period
13.3
100
s
ns
t
L
Clock Pulse Low
6.4
6.7
ns
t
H
Clock Pulse High
6.4
6.7
ns
t
D
Aperture Delay
3
ns
t
1
Data Hold Time, C
L
= 0pF
3.9
ns
t
2
New Data Delay Time, C
L
= 15pF max
12
ns
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE
SPECIFIED
DRAWING
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
PACKAGE
NUMBER
RANGE
MARKING
NUMBER
(1)
MEDIA
ADS828E
SSOP-28
324
40
C to +85
C
ADS828E
ADS828E
Rails
"
"
"
"
"
ADS828E/1K
Tape and Reel
NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of ADS828E/1K" will get a single 1000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
+V
S
....................................................................................................... +6V
Analog Input ............................................................. 0.3V to (+V
S
+ 0.3V)
Logic Input ............................................................... 0.3V to (+V
S
+ 0.3V)
Case Temperature ......................................................................... +100
C
Junction Temperature .................................................................... +150
C
Storage Temperature ..................................................................... +150
C
ABSOLUTE MAXIMUM RATINGS
5
ADS828
TYPICAL PERFORMANCE CURVES
At T
A
= full specified temperature range, V
S
= +5V, single-ended input range = 1.5V to 3.5V, and sampling rate = 75MHz, external reference, VDRV +3V, unless otherwise noted.
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Differential Input, 2Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 10MHz
SFDR = 70dBFS
SNR = 58.4dBFS
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Differential Input, 2Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 20MHz
SFDR = 70dBFS
SNR = 57.6dBFS
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Single-Ended, 2Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 10MHz
SFDR = 64.6dBFS
SNR = 55.5dBFS
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Single-Ended Input, 2Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 20MHz
SFDR = 62.3dBFS
SNR = 55.2dBFS
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Single-Ended, 1Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 10MHz
SFDR = 61.9dBFS
SNR = 51.2dBFS
0
20
40
60
80
100
0
7.5
15
22.5
37.5
30
SPECTRAL PERFORMANCE
(Single-Ended, 1Vp-p, Internal Reference)
Magnitude (dB)
Frequency (MHz)
f
IN
= 20MHz
SFDR = 61.6dBFS
SNR = 51dBFS
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