DESCRIPTION
The ADS8322 is a 16-bit, 500kHz Analog-to-Digital (A/D)
converter with an internal 2.5V reference. The device in-
cludes a 16-bit capacitor-based Successive Approximation
Register (SAR) A/D converter with inherent sample-and-
hold. The ADS8322 offers a full 16-bit interface, or an 8-bit
option where data is read using two read cycles and 8 pins.
The ADS8322 is available in a TQFP-32 package and is
guaranteed over the industrial 40
C to +85
C temperature
range.
16-Bit, 500kHz, MicroPower Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
HIGH-SPEED PARALLEL INTERFACE
q
500kHz SAMPLING RATE
q
LOW POWER: 85mW at 500kHz
q
INTERNAL 2.5V REFERENCE
q
UNIPOLAR INPUT RANGE
q
TQFP-32 PACKAGE
APPLICATIONS
q
CT SCANNERS
q
HIGH SPEED DATA ACQUISITION
q
TEST AND INSTRUMENTATION
q
MEDICAL EQUIPMENT
SAR
Output Latches
and
Three State
Drivers
Comparator
ADS8322
S/H Amp
BYTE
Parallel
Data
Output
+IN
IN
CDAC
REF
IN
Conversion
and Control
Logic
Internal
+2.5V Ref
CONVST
CLOCK
CS
RD
BUSY
REF
OUT
ADS8322
ADS8322
SBAS215 JULY 2001
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2001, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ADS8322
2
SBAS215
20
CLOCK
An external CMOS compatible clock can be applied
to the CLOCK input to synchronize the conversion
process to an external source.
21
CONVST
Convert Start
22
RD
Synchronization pulse for the parallel output.
23
BYTE
Selects 8 most significant bits (LOW) or 8 least
significant bits (HIGH). Data valid on pins 9-16.
24
CS
Chip Select
25
IN
Inverting Input Channel
26
+IN
Noninverting Input Channel
27
AGND
Analog Ground
28
+V
A
Analog Power Supply, +5VDC.
29
NC
No Connect
30
NC
No Connect
31
REF
IN
Reference Input. When using the internal 2.5V refer-
ence tie this pin directly to REF
OUT
.
32
REF
OUT
Reference Output. A 0.1
F capacitor should be con-
nected to this pin when the internal reference is
used.
ABSOLUTE MAXIMUM RATINGS
(1)
+IN to GND ................................................................................ V
A
+ 0.1V
IN to GND ....................................................................................... +0.5V
V
A
to GND ............................................................................. 0.3V to +7V
Digital Input Voltage to GND ................................... 0.3V to (V
A
+ 0.3V)
V
OUT
to GND ............................................................ 0.3V to (V
A
+ 0.3V)
Operating Temperature Range ...................................... 40
C to +105
C
Storage Temperature Range ......................................... 65
C to +150
C
Junction Temperature (T
J
max) .................................................... +150
C
TQFP Package:
Power Dissipation ................................................... (T
J
max T
A
) /
JA
JA
Thermal Impedance ......................................................... 240
C/W
Lead Temperature:
Vapor Phase (soldering, 60s) ................................................. +215
C
Infrared (soldering, 15s) .......................................................... +220
C
NOTE: (1) Stresses above those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
PIN
NAME
DESCRIPTION
1
DB15
Data Bit 15 (MSB)
2
DB14
Data Bit 14
3
DB13
Data Bit 13
4
DB12
Data Bit 12
5
DB11
Data Bit 11
6
DB10
Data Bit 10
3
DB9
Data Bit 9
8
DB8
Data Bit 8
9
DB7
Data Bit 7
10
DB6
Data Bit 6
11
DB5
Data Bit 5
12
DB4
Data Bit 4
13
DB3
Data Bit 3
14
DB2
Data Bit 2
15
DB1
Data Bit 1
16
DB0
Data Bit 0 (LSB)
17
BUSY
High when a conversion is in progress.
18
+V
D
Digital Power Supply, +5VDC.
19
DGND
Digital Ground
PIN ASSIGNMENTS
MAXIMUM
NO
INTEGRAL
MISSING
PACKAGE
SPECIFICATION
LINEARITY
CODES
DRAWING
TEMPERATURE
ORDERING
TRANSPORT
PRODUCT
ERROR (LSB)
ERROR (LSB)
PACKAGE
NUMBER
RANGE
NUMBER
(1)
MEDIA
ADS8322Y
8
14
TQFP-32
351
40
C to 85
C
ADS8322Y/250
Tape and Reel
"
"
"
"
"
"
ADS8322Y/2K
Tape and Reel
ADS8322YB
6
15
TQFP-32
351
40
C to 85
C
ADS8322YB/250
Tape and Reel
"
"
"
"
"
"
ADS8322YB/2K
Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces
of "ADS8322Y/2K" will get a single 2000-piece Tape and Reel.
PIN CONFIGURATION
Top View
TQFP
PACKAGE/ORDERING INFORMATION
PIN
NAME
DESCRIPTION
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CS
BYTE
RD
CONVST
CLOCK
DGND
+V
D
BUSY
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
9
10
11
12
13
14
15
16
REF
OUT
REF
IN
NC
NC
+V
A
AGND
+IN
IN
32
31
30
29
28
ADS8322
27
26
25
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet its published specifications.
ADS8322
3
SBAS215
ELECTRICAL CHARACTERISTICS: +V
A
= +5V
At 40
C to +85
C, +V
A
= +5V, V
REF
= +2.5V, f
SAMPLE
= 500kHz, and f
CLK
= 20 f
SAMPLE
, unless otherwise specified.
ADS8322Y
ADS8322YB
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
RESOLUTION
16
Bits
ANALOG INPUT
Full-Scale Input Span
(1)
+IN (IN)
0
+2V
REF
V
Absolute Input Range
+IN
0.1
V
A
+ 0.1
V
IN
0.1
+0.5
V
Capacitance
25
pF
Leakage Current
1
nA
SYSTEM PERFORMANCE
No Missing Codes
14
15
Bits
Integral Linearity Error
4
8
3
6
LSBs
(2)
Offset Error
1.0
2
0.5
1
mV
Gain Error
(3)
0.25
0.50
0.12
0.25
% of FSR
Common-Mode Rejection Ratio
At DC
70
dB
Noise
60
Vr ms
Power Supply Rejection Ratio
At FFFF
H
Output Code
3
LSBs
SAMPLING DYNAMICS
Conversion Time
1.6
s
Acquisition Time
0.4
s
Throughput Rate
500
kHz
Aperture Delay
50
ns
Aperture Jitter
30
ps
Small-Signal Bandwidth
20
MHz
Step Response
100
ns
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion
(4)
V
IN
= 5Vp-p at 100kHz
90
93
dB
SINAD
V
IN
= 5Vp-p at 100kHz
81
83
dB
Spurious Free Dynamic Range
V
IN
= 5Vp-p at 100kHz
94
96
dB
REFERENCE OUTPUT
Voltage
I
OUT
= 0
2.475
2.50
2.525
2.48
2.52
V
Source Current
Static Load
10
A
Drift
I
OUT
= 0
20
p p [ /
C
Line Regulation
4.75V
V
CC
5.25V
0.6
mV
REFERENCE INPUT
Range
1.5
2.55
V
Resistance
(5)
to Internal Reference Voltage
10
k
DIGITAL INPUT/OUTPUT
Logic Family
CMOS
Logic Levels:
V
IH
I
IH
+5
A
3.0
+V
A
V
V
IL
I
IL
+5
A
0.3
0.8
V
V
OH
I
OH
= 2 TTL Loads
4.0
V
V
OL
I
OL
= 2 TTL Loads
0.4
V
Data Format
Straight Binary
POWER-SUPPLY REQUIREMENT
Logic Family
CMOS
+V
A
4.75
5
5.25
V
+V
D
4.75
5
5.25
V
Supply Current
f
SAMPLE
= 500kHz
17
25
mA
Power Dissipation
f
SAMPLE
= 500kHz
85
125
mW
TEMPERATURE RANGE
Specified Performance
40
+85
C
Specifications same as ADS8322Y.
NOTES: (1) Ideal input span; does not include gain or offset error. (2) LSB means Least Significant Bit, with V
REF
equal to +2.5V; 1LSB = 76
V. (3) Measured relative
to an ideal, full-scale input (+In (In)) of 4.9999V. Thus, gain error includes the error of the internal voltage reference. (4) Calculated on the first nine harmonics
of the input frequency. (5) Can vary
30%.
ADS8322
4
SBAS215
1
CLOCK
Acquisition
CONVST
BUSY
BYTE
CS
RD
DB15-D8
DB7-D0
2
3
4
5
17
18
19
20
3
4
1
2
17
18
19
20
t
1
t
2
t
4
t
6
t
9
Acquisition
Conversion
t
ACQ
t
CONV
t
5
t
7
t
11
t
10
t
12
t
13
t
14
t
8
t
16
t
15
t
17
Bits 15-8
Bits 15-8
FF
t
18
t
19
t
3
Bits 7-0
Bits 7-0
Bits 15-8
ADS8322A
ADS8322B
PARAMETER
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Conversion Time
t
CONV
1.6
s
Acquisition Time
t
ACQ
0.4
s
CLOCK Period
t
1
100
ns
CLOCK High Time
t
2
40
ns
CLOCK Low Time
t
3
40
ns
CONVST Low to Clock High
t
4
10
ns
CLOCK High to CONVST High
t
5
5
ns
CONVST Low Time
t
6
20
ns
CONVST Low to BUSY High
t
7
25
ns
CS Low to CONVST Low
t
8
0
ns
CONVST High
t
9
20
ns
CLOCK Low to CONVST Low
t
10
0
ns
CLOCK High to BUSY Low
t
11
25
ns
CS High
t
12
0
ns
CS Low to RD Low
t
13
0
ns
RD High to CS High
t
14
0
ns
RD Low Time
t
15
50
ns
RD Low to Data Valid
t
16
40
ns
Data Hold from RD High
t
17
5
ns
BYTE Change to RD Low
(3)
t
18
0
ns
RD High Time
t
19
20
ns
NOTES: (1) All input signals are specified with t
R
= t
F
= 5ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
) /2. (2) See timing diagram, above.
(3) BYTE is asynchronous; when BYTE is 0, bits 15 through 0 appear at DB15-DB0. When BUSY is 1, bits 15 through 8 appear on DB7-DB0. RD may remain low
between changes in BYTE.
TIMING CHARACTERISTICS
(1)(2)
All specifications typical at 40
C to +85
C, +V
D
= +5V.
TIMING DIAGRAM
ADS8322
5
SBAS215
TYPICAL CHARACTERISTICS
At 40
C to +85
C, +V
A
= +5V, V
REF
= +2.5V, f
SAMPLE
= 500kHz, and f
CLK
= 20 f
SAMPLE
, unless otherwise specified.
Frequency (kHz)
SIGNAL-TO-NOISE RATIO AND
SIGNAL-TO-(NOISE+DISTORTION)
vs INPUT FREQUENCY
SNR, SINAD (dB)
90
85
80
75
10
250
SNR
100
1
SINAD
Frequency (kHz)
SPURIOUS FREE DYNAMIC RANGE AND
TOTAL HARMONIC DISTORTION
vs INPUT FREQUENCY
SFDR (dB)
THD (dB)
100
95
90
85
80
75
100
95
90
85
80
75
10
250
100
1
SFDR
THD
Temperature (
C)
IL+ vs TEMPERATURE
Deltas (LSB)
0.30
0.20
0.10
0.00
0.10
0.20
20
100
80
40
20
0
40
60
Temperature (
C)
0.2
0.0
0.2
0.4
0.6
IL vs TEMPERATURE
Deltas (LSB)
20
100
80
40
20
0
40
60
Temperature (
C)
1.0
0.5
0.0
0.5
1.0
1.5
DL+ vs TEMPERATURE
Deltas (LSB)
20
100
80
40
20
0
40
60
0
30
60
90
120
150
FREQUENCY SPECTRUM
(4096 Point FFT; f
IN
= 100.1kHz, 0.2dB)
0
40
60
20
80
100
120
140
160
180
200
Frequency (kHz)
Amplitude (dB)
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