FEATURES
q
FET INPUT: I
B
= 50pA max
q
WIDE BANDWIDTH: 8MHz
q
HIGH SLEW RATE: 20V/
s
q
LOW NOISE: 8nV/
Hz (1kHz)
q
LOW DISTORTION: 0.00008%
q
HIGH OPEN-LOOP GAIN: 130dB (600
load)
q
WIDE SUPPLY RANGE:
2.5 to
18V
q
LOW OFFSET VOLTAGE: 500
V max
q
SINGLE, DUAL, AND QUAD VERSIONS
International Airport Industrial Park Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
In D
+In D
V
+In C
In C
Out C
Out A
In A
+In A
V+
+In B
In B
Out B
OPA4132
14-Pin DIP
SO-14
A
D
B
C
OPA132
OPA2
132
OPA132
OPA2132
OPA4132
OPA41
32
OPA132
OPA2132
OPA4132
1
2
3
4
8
7
6
5
Offset Trim
V+
Output
NC
Offset Trim
In
+In
V
OPA132
8-Pin DIP, SO-8
1
2
3
4
8
7
6
5
V+
Out B
In B
+In B
Out A
In A
+In A
V
OPA2132
8-Pin DIP, SO-8
A
B
High Speed
FET-INPUT OPERATIONAL AMPLIFIERS
DESCRIPTION
The OPA132 series of FET-input op amps provides
high-speed and excellent dc performance. The combi-
nation of high slew rate and wide bandwidth provide
fast settling time. Single, dual, and quad versions have
identical specifications for maximum design flexibil-
ity. High performance grades are available in the
single and dual versions. All are ideal for general-
purpose, audio, data acquisition and communications
applications, especially where high source impedance
is encountered.
OPA132 op amps are easy to use and free from phase
inversion and overload problems often found in
common FET-input op amps. Input cascode circuitry
provides excellent common-mode rejection and
maintains low input bias current over its wide input
voltage range. OPA132 series op amps are stable in
unity gain and provide excellent dynamic behavior
over a wide range of load conditions, including high
load capacitance. Dual and quad versions feature
completely independent circuitry for lowest crosstalk
and freedom from interaction, even when overdriven
or overloaded.
Single and dual versions are available in 8-pin DIP
and SO-8 surface-mount packages. Quad is
available in 14-pin DIP and SO-14 surface-mount
packages. All are specified for 40
C to +85
C
operation.
PDS-1309B
1995 Burr-Brown Corporation
PDS-1309B
Printed in U.S.A. December, 1995
2
OPA132, 2132, 4132
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
SPECIFICATIONS
At T
A
= +25
C, V
S
=
15V, unless otherwise noted.
OPA132P, U
OPA2132P, U
OPA132PA, UA
OPA2132PA, UA
OPA4132PA, UA
PARAMETER
CONDITION
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE
Input Offset Voltage
0.25
0.5
0.5
2
mV
vs Temperature
(1)
Operating Temperature Range
2
10
*
*
V/
C
vs Power Supply
V
S
=
2.5V to
18V
5
15
*
30
V/V
Channel Separation (dual and quad)
R
L
= 2k
0.2
*
V/V
INPUT BIAS CURRENT
Input Bias Current
(2)
V
CM
= 0V
+5
50
*
*
pA
vs Temperature
See Typical Curve
*
Input Offset Current
(2)
V
CM
= 0V
2
50
*
*
pA
NOISE
Input Voltage Noise
Noise Density, f = 10Hz
23
*
nV/
Hz
f = 100Hz
10
*
nV/
Hz
f = 1kHz
8
*
nV/
Hz
f = 10kHz
8
*
nV/
Hz
Current Noise Density, f = 1kHz
3
*
fA/
Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
(V)+2.5
13
(V+)2.5
*
*
*
V
Common-Mode Rejection
V
CM
= 12.5V to +12.5V
96
100
86
94
dB
INPUT IMPEDANCE
Differential
10
13
|| 2
*
|| pF
Common-Mode
V
CM
= 12.5V to +12.5V
10
13
|| 6
*
|| pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
R
L
= 10k
,
V
O
= 14.5V to +13.8V
110
120
104
*
dB
R
L
= 2k
,
V
O
= 13.8V to +13.5V
110
126
104
120
dB
R
L
= 600
,
V
O
= 12.8V to +12.5V
110
130
104
120
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
8
*
MHz
Slew Rate
20
*
V/
s
Settling Time: 0.1%
G = 1, 10V Step, C
L
= 100pF
0.7
*
s
0.01%
G = 1, 10V Step, C
L
= 100pF
1
*
s
Overload Recovery Time
G =
1
0.5
*
s
Total Harmonic Distortion + Noise
1kHz, G = 1, V
O
= 3.5Vrms
R
L
= 2k
0.00008
*
%
R
L
= 600
0.00009
*
%
OUTPUT
Voltage Output, Positive
R
L
= 10k
(V+)1.2
(V+)0.9
*
*
V
Negative
(V)+0.5
(V)+0.3
*
*
V
Positive
R
L
= 2k
(V+)1.5
(V+)1.2
*
*
V
Negative
(V)+1.2
(V)+0.9
*
*
V
Positive
R
L
= 600
(V+)2.5
(V+)2.0
*
*
V
Negative
(V)+2.2
(V)+1.9
*
*
V
Short-Circuit Current
40
*
mA
Capacitive Load Drive (Stable Operation)
See Typical Curve
*
POWER SUPPLY
Specified Operating Voltage
15
*
V
Operating Voltage Range
2.5
18
*
*
V
Quiescent Current (per amplifier)
I
O
= 0
4
4.8
*
*
mA
TEMPERATURE RANGE
Operating Range
40
+85
*
*
C
Storage
40
+125
*
*
C
Thermal Resistance,
JA
8-Pin DIP
100
*
C/W
SO-8 Surface-Mount
150
*
C/W
14-Pin DIP
80
*
C/W
SO-14 Surface-Mount
110
*
C/W
*Specifications same as OPA132P, OPA132U.
NOTES: (1) Guaranteed by wafer test. (2) High-speed test at T
J
= 25
C.
3
OPA132, 2132, 4132
PACKAGE INFORMATION
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
(1)
Single
OPA132PA
8-Pin Plastic DIP
006
OPA132P
8-Pin Plastic DIP
006
OPA132UA
SO-8 Surface-Mount
182
OPA132U
SO-8 Surface-Mount
182
Dual
OPA2132PA
8-Pin Plastic DIP
006
OPA2132P
8-Pin Plastic DIP
006
OPA2132UA
SO-8 Surface-Mount
182
OPA2132U
SO-8 Surface-Mount
182
Quad
OPA4132PA
14-Pin Plastic DIP
010
OPA4132UA
SO-14 Surface-Mount
235
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V+ to V .................................................................... 36V
Input Voltage .................................................... (V) 0.7V to (V+) +0.7V
Output Short-Circuit
(1)
.............................................................. Continuous
Operating Temperature ................................................. 40
C to +125
C
Storage Temperature ..................................................... 40
C to +125
C
Junction Temperature ...................................................................... 150
C
Lead Temperature (soldering, 10s) ................................................. 300
C
NOTE: (1) Short-circuit to ground, one amplifier per package.
MODEL
PACKAGE
TEMPERATURE RANGE
Single
OPA132PA
8-Pin Plastic DIP
40
C to +85
C
OPA132P
8-Pin Plastic DIP
40
C to +85
C
OPA132UA
SO-8 Surface-Mount
40
C to +85
C
OPA132U
SO-8 Surface-Mount
40
C to +85
C
Dual
OPA2132PA
8-Pin Plastic DIP
40
C to +85
C
OPA2132P
8-Pin Plastic DIP
40
C to +85
C
OPA2132UA
SO-8 Surface-Mount
40
C to +85
C
OPA2132U
SO-8 Surface-Mount
40
C to +85
C
Quad
OPA4132PA
14-Pin Plastic DIP
40
C to +85
C
OPA4132UA
SO-14 Surface-Mount
40
C to +85
C
ORDERING INFORMATION
4
OPA132, 2132, 4132
TYPICAL PERFORMANCE CURVES
At T
A
= +25
C, V
S
=
15V, R
L
= 2k
, unless otherwise noted.
OPEN-LOOP GAIN/PHASE vs FREQUENCY
0.1
1
10
100
1k
10k
100k
1M
10M
160
140
120
100
80
60
40
20
0
20
0
45
90
135
180
Voltage Gain (dB)
Phase Shift ()
Frequency (Hz)
G
INPUT BIAS CURRENT vs TEMPERATURE
Ambient Temperature (C)
Input Bias Current (pA)
100k
10k
1k
100
10
1
0.1
75
50
25
0
25
50
75
100
125
Dual
Quad
Single
High Speed Test
Warmed Up
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
1
1k
100
10
Voltage Noise (nV/
Hz)
Frequency (Hz)
10
100
1k
10k
100k
1M
1
Current Noise (fA/
Hz)
Voltage Noise
Current Noise
POWER SUPPLY AND COMMON-MODE REJECTION
vs FREQUENCY
Frequency (Hz)
PSR, CMR (dB)
120
100
80
60
40
20
0
10
100
1k
10k
100k
1M
CMR
PSR
+PSR
CHANNEL SEPARATION vs FREQUENCY
Frequency (Hz)
Channel Separation (dB)
160
140
120
100
80
100
1k
10k
100k
Dual and quad devices.
G = 1, all channels.
Quad measured channel
A to D or B to C--other
combinations yield improved
rejection.
R
L
=
R
L
= 2k
INPUT BIAS CURRENT
vs INPUT COMMON-MODE VOLTAGE
Common-Mode Voltage (V)
Input Bias Current (pA)
10
9
8
7
6
5
4
3
2
1
0
15
10
5
0
5
10
15
High Speed Test
5
OPA132, 2132, 4132
TYPICAL PERFORMANCE CURVES
(CONT)
At T
A
= +25
C, V
S
=
15V, R
L
= 2k
, unless otherwise noted.
A
OL
, CMR, PSR vs TEMPERATURE
Ambient Temperature (C)
A
OL
, CMR, PSR (dB)
130
120
110
100
90
75
50
25
0
25
50
75
100
125
Open-Loop
Gain
PSR
CMR
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage (V)
1400
1200
1000
800
600
400
200
0
200
400
600
800
1000
1200
1400
12
10
8
6
4
2
0
Typical production
distribution of packaged
units. Single, dual and
quad units included.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Percent of Amplifiers (%)
Offset Voltage Drift (V/C)
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
Typical production distribution
of packaged units. Single,
dual and quad units included.
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY
Frequency (Hz)
10k
100k
1M
10M
30
20
10
0
Output Voltage (Vp-p)
V
S
= 15V
V
S
= 2.5V
V
S
= 5V
Maximum output voltage
without slew-rate
induced distortion
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
Frequency (Hz)
THD+Noise (%)
0.01
0.001
0.0001
0.00001
10
100
1k
10k
100k
2k
600
R
L
G = +10
G = +1
V
O
= 3.5Vrms
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT
vs TEMPERATURE
Ambient Temperature (C)
Quiescent Current Per Amp (mA)
4.3
4.2
4.1
4.0
3.9
3.8
60
50
40
30
20
10
Short-Circuit Current (mA)
75
50
25
0
25
50
75
100
125
I
SC
I
Q
6
OPA132, 2132, 4132
SMALL-SIGNAL STEP RESPONSE
G =1, C
L
= 100pF
200ns/div
50mV/div
FPO
LARGE-SIGNAL STEP RESPONSE
G = 1, C
L
= 100pF
5V/div
1s/div
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
60
50
40
30
20
10
0
100pF
1nF
10nF
Load Capacitance
Overshoot (%)
G = +1
G = 10
G = 1
TYPICAL PERFORMANCE CURVES
(CONT)
At T
A
= +25
C, V
S
=
15V, R
L
= 2k
, unless otherwise noted.
SETTLING TIME vs CLOSED-LOOP GAIN
Closed-Loop Gain (V/V)
Settling Time (s)
100
10
1
0.1
1
10
100
1000
0.01%
0.1%
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
15
14
13
12
11
10
10
11
12
13
14
15
0
10
20
30
40
50
60
Output Current (mA)
Output Voltage Swing (V)
55C
55C
25C
25C
85C
85C
125C
125C
25C
V
IN
= 15V
V
IN
= 15V
7
OPA132, 2132, 4132
APPLICATIONS INFORMATION
OPA132 series op amps are unity-gain stable and suitable
for a wide range of general-purpose applications. Power
supply pins should be bypassed with 10nF ceramic capaci-
tors or larger.
OPA132 op amps are free from unexpected output phase-
reversal common with FET op amps. Many FET-input op
amps exhibit phase-reversal of the output when the input
common-mode voltage range is exceeded. This can occur in
voltage-follower circuits, causing serious problems in
control loop applications. OPA132 series op amps are free
from this undesirable behavior. All circuitry is completely
independent in dual and quad versions, assuring normal
behavior when one amplifier in a package is overdriven or
short-circuited.
OPERATING VOLTAGE
OPA132 series op amps operate with power supplies from
2.5V to
18V with excellent performance. Although
specifications are production tested with
15V supplies,
most behavior remains unchanged throughout the full
operating voltage range. Parameters which vary signifi-
cantly with operating voltage are shown in the typical
performance curves.
OFFSET VOLTAGE TRIM
Offset voltage of OPA132 series amplifiers is laser trimmed
and usually requires no user adjustment. The OPA132
(single op amp version) provides offset voltage trim con-
nections on pins 1 and 8. Offset voltage can be adjusted by
connecting a potentiometer as shown in Figure 1. This
adjustment should be used only to null the offset of the op
amp, not to adjust system offset or offset produced by the
signal source. Nulling offset could degrade the offset
voltage drift behavior of the op amp. While it is not
possible to predict the exact change in drift, the effect is
usually small.
FIGURE 1. OPA132 Offset Voltage Trim Circuit.
INPUT BIAS CURRENT
The FET-inputs of the OPA132 series provide very low
input bias current and cause negligible errors in most appli-
cations. For applications where low input bias current is
crucial, junction temperature rise should be minimized. The
input bias current of FET-input op amps increases with
temperature as shown in the typical performance curve
"Input Bias Current vs Temperature."
The OPA132 series may be operated at reduced power
supply voltage to minimize power dissipation and tempera-
ture rise. Using
3V supplies reduces power dissipation to
one-fifth that at
15V.
The dual and quad versions have higher total power dissipa-
tion than the single, leading to higher junction temperature.
Thus, a warmed-up quad will have higher input bias current
than a warmed-up single. Furthermore, an SOIC will gener-
ally have higher junction temperature than a DIP at the same
ambient temperature because of a larger
JA
. Refer to the
specifications table.
Circuit board layout can also help minimize junction tem-
perature rise. Temperature rise can be minimized by solder-
ing the devices to the circuit board rather than using a socket.
Wide copper traces will also help dissipate the heat by acting
as an additional heat sink.
Input stage cascode circuitry assures that the input bias
current remains virtually unchanged throughout the full
input common-mode range of the OPA132 series. See the
typical performance curve "Input Bias Current vs Common-
Mode Voltage."
V+
V
100k
OPA132 single op amp only.
Use offset adjust pins only to null
offset voltage of op amp--see text.
Trim Range: 4mV typ
OPA132
6
7
8
4
3
2
1
10nF
10nF
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