FEATURES
D
LOW OFFSET VOLTAGE: 10
V (max)
D
ZERO DRIFT: 0.05
V/
C (max)
D
0.01Hz to 10Hz NOISE: 1.1
V
PP
D
QUIESCENT CURRENT: 17
A
D
SINGLE-SUPPLY OPERATION
D
SUPPLY VOLTAGE: 1.8V to 5.5V
D
RAIL-TO-RAIL INPUT/OUTPUT
D
microSIZE PACKAGES: SC70 and SOT23
APPLICATIONS
D
TRANSDUCER APPLICATIONS
D
TEMPERATURE MEASUREMENTS
D
ELECTRONIC SCALES
D
MEDICAL INSTRUMENTATION
D
BATTERY-POWERED INSTRUMENTS
D
HANDHELD TEST EQUIPMENT
DESCRIPTION
The OPA333 series of CMOS operational amplifiers uses
a proprietary auto-calibration technique to simultaneously
provide very low offset voltage (10
V max) and near-zero
drift over time and temperature. These miniature,
high-precision, low quiescent current amplifiers offer
high-impedance inputs that have a common-mode range
100mV beyond the rails and rail-to-rail output that swings
within 50mV of the rails. Single or dual supplies as low as
+1.8V (
0.9V) and up to +5.5V (
2.75V) may be used.
They are optimized for low-voltage, single-supply
operation.
The OPA333 family offers excellent CMRR without the
crossover associated with traditional complementary input
stages. This design results in superior performance for
driving analog-to-digital converters (ADCs) without
degradation of differential linearity.
The OPA333 (single version) is available in the SC70-5,
SOT23-5, and SO-8 packages. The OPA2333 (dual
version) is offered in DFN-8 (3mm x 3mm, available
Q2 '06) and SO-8 packages. All versions are specified for
operation from -40
C to +125
C.
1
2
3
5
4
V+
-
IN
OUT
V
-
+IN
OPA333
SOT23-5
1
2
3
5
4
V+
OUT
+IN
V
-
-
IN
OPA333
SC70-5
0.1Hz TO 10Hz NOISE
5
00nV
/
d
i
v
1s/div
OPA333
OPA2333
SBOS351 - MARCH 2006
1.8V, microPOWER
CMOS OPERATIONAL AMPLIFIERS
Zer
j
-Drift Series
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
www.ti.com
Copyright
2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage
+7V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals, Voltage
(2)
-0.3V to (V+) + 0.3V
. . . . . . . . .
Signal Input Terminals, Voltage
(2)
10mA
. . . . . . . . . . . . . . . . . . . .
Output Short-Circuit
(3)
Continuous
. . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature
-40
C to +150
C
. . . . . . . . . . . . . . . . . . . . .
Storage Temperature
-65
C to +150
C
. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature
+150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating
Human Body Model
4000V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model
1000V
. . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.3V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
OPA333
SOT23-5
DBV
OAXQ
OPA333
SOT23-5
DBV
OAXQ
OPA333
SC70-5
DCK
BQY
OPA333
SC70-5
DCK
BQY
OPA333
SO-8
D
O333A
OPA333
SO-8
D
O333A
OPA2333
SO-8
D
O2333A
OPA2333
SO-8
D
O2333A
OPA2333
DFN-8
(2)
DRB
BQZ
OPA2333
DFN-8
(2)
DRB
BQZ
(1) For the most current specification and package information see the Package Option Addendum at the end of this document, or see the TI web
site at www.ti.com.
(2) Available Q2 '06.
PIN CONFIGURATIONS
1
2
3
5
4
V+
-
IN
OUT
V
-
+IN
OPA333
SOT23-5
1
2
3
5
4
V+
OUT
+IN
V
-
-
IN
OPA333
SC70-5
1
2
3
4
8
7
6
5
NC
(1)
V+
OUT
NC
(1)
NC
(1)
-
IN
+IN
V
-
OPA333
SO-8
1
2
3
4
8
7
6
5
V+
OUT B
-
IN B
+IN B
OUT A
-
IN A
+IN A
V
-
A
B
OPA2333
SO-8
1
2
3
4
8
7
6
5
V+
OUT B
-
IN B
+IN B
OUT A
-
IN A
+IN A
V
-
OPA2333
DFN-8
Exposed
Thermal
Die Pad
on
Underside
(2)
(1) NC denotes no internal connection.
(2) Connect thermal die pad to V-.
(3) Available Q2 '06.
(3)
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
3
ELECTRICAL CHARACTERISTICS: V
S
= +1.8V to +5.5V
Boldface limits apply over the specified temperature range, T
A
= -40
C to +125
C.
At T
A
= +25
C, R
L
= 10k
connected to V
S
/2, V
CM
= V
S
/2, and V
OUT
= V
S
/2, unless otherwise noted.
OPA333, OPA2333
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Input Offset Voltage
V
OS
V
S
= +5V
2
10
V
vs Temperature
dV
OS
/dT
0.02
0.05
V/
C
vs Power Supply
PSRR
V
S
= +1.8V to +5.5V
1
5
V/V
Long-Term Stability
(1)
See Note
(1)
Channel Separation, dc
0.1
V/V
INPUT BIAS CURRENT
Input Bias Current
I
B
70
200
pA
over Temperature
150
pA
Input Offset Current
I
OS
140
400
pA
NOISE
Input Voltage Noise, f = 0.01Hz to 1Hz
0.3
V
PP
Input Voltage Noise, f = 0.1Hz to 10Hz
1.1
V
PP
Input Current Noise, f = 10Hz
i
n
100
fA/
Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
V
CM
(V-) - 0.1
(V+) + 0.1
V
Common-Mode Rejection Ratio
CMRR
(V-) - 0.1V < V
CM
< (V+) + 0.1V
106
130
dB
INPUT CAPACITANCE
Differential
2
pF
Common-Mode
4
pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
A
OL
(V-) + 100mV < V
O
< (V+) - 100mV, R
L
= 10k
106
130
dB
FREQUENCY RESPONSE
Gain-Bandwidth Product
GBW
C
L
= 100pF
350
kHz
Slew Rate
SR
G = +1
0.16
V/
s
OUTPUT
Voltage Output Swing from Rail
R
L
= 10k
30
50
mV
over Temperature
R
L
= 10k
70
mV
Short-Circuit Current
I
SC
5
mA
Capacitive Load Drive
C
L
See Typical Characteristics
Open-Loop Output Impedance
f = 350kHz, I
O
= 0
2
k
POWER SUPPLY
Specified Voltage Range
V
S
1.8
5.5
V
Quiescent Current Per Amplifier
I
Q
I
O
= 0
17
25
A
over Temperature
28
A
Turn-On Time
V
S
= +5V
100
s
TEMPERATURE RANGE
Specified Range
-40
+125
C
Operating Range
-40
+150
C
Storage Range
-65
+150
C
Thermal Resistance
q
JA
C/W
SOT23-5
200
C/W
SO-8
150
C/W
DFN-8
50
C/W
SC70-5
250
C/W
(1) 300-hour life test at +150
C demonstrated randomly distributed variation of approximately 1
V.
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
4
TYPICAL CHARACTERISTICS
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Po
p
u
l
a
t
i
o
n
-
10
-
9
-
8
-
7
-
6
-
5
-
4
-
3
-
2
-
1
0
1
2
3
4
5
6
7
8
9
10
Offset Voltage (
V)
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Po
p
u
l
a
t
i
o
n
0
0.002
5
0.005
0
0.007
5
0.010
0
0.012
5
0.015
0
0.017
5
0.020
0
0.022
5
0.025
0
0.027
5
0.030
0
0.032
5
0.035
0
0.037
5
0.040
0
0.042
5
0.045
0
0.047
5
0.050
0
Offset Voltage Drift (
V/
_
C)
OPEN-LOOP GAIN vs FREQUENCY
A
OL
(d
B
)
10
120
100
80
60
40
20
0
-
20
Ph
a
s
e
(
_
)
250
200
150
100
50
0
-
50
-
100
100k
10k
1k
100
Frequency (Hz)
1M
COMMON-MODE REJECTION RATIO vs FREQUENCY
CM
R
R
(
d
B
)
1
140
120
100
80
60
40
20
0
100k
10k
1k
100
10
Frequency (Hz)
1M
POWER-SUPPLY REJECTION RANGE vs FREQUENCY
PS
R
R
(
d
B
)
1
120
100
80
60
40
20
0
10k
100k
1k
100
10
Frequency (Hz)
1M
+PSRR
-
PSRR
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
O
u
tput
S
w
i
n
g
(
V
)
0
3
2
1
0
-
1
-
2
-
3
1
Output Current (mA)
10
7
8
9
6
5
4
3
2
-
40
_
C
-
40
_
C
-
40
_
C
+25
_
C
+25
_
C
+25
_
C
+125
_
C
+125
_
C
V
S
=
2.75V
V
S
=
0.9V
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
5
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
I
B
(p
A
)
0
100
80
60
40
20
0
-
20
-
40
-
60
-
80
-
100
1
Common-Mode Voltage (V)
5
4
3
2
-
I
B
+I
B
V
S
= 5V
INPUT BIAS CURRENT vs TEMPERATURE
I
B
(p
A
)
-
50
200
150
100
50
0
-
50
-
100
-
150
-
200
-
25
Temperature (
_
C)
125
100
75
50
25
0
V
S
= 5.5V
V
S
= 1.8V
-
I
B
-
I
B
+I
B
+I
B
QUIESCENT CURRENT vs TEMPERATURE
I
Q
(
A)
-
50
25
20
15
10
5
0
-
25
Temperature (
_
C)
125
100
75
50
25
0
V
S
= 1.8V
V
S
= 5.5V
LARGE-SIGNAL STEP RESPONSE
O
u
tp
u
t
V
o
l
t
age
(
1
V
/
di
v
)
Time (50
s/div)
G = 1
R
L
= 10k
SMALL-SIGNAL STEP RESPONSE
O
u
t
put
V
o
l
t
a
g
e
(
50
mV
/di
v
)
Time (5
s/div)
G = +1
R
L
= 10k
POSITIVE OVER-VOLTAGE RECOVERY
2V
/
d
i
v
0
1V
/
d
i
v
0
Time (50
s/div)
Input
Output
1 0k
1 k
OPA3 33
+2 .5V
-
2.5V
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
6
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
NEGATIVE OVER-VOLTAGE RECOVERY
2V
/d
i
v
0
1V
/
d
i
v 0
Time (50
s/div)
Input
Output
10 k
1k
O PA 333
+ 2.5V
-
2.5 V
SETTLING TIME vs CLOSED-LOOP GAIN
S
e
t
t
l
i
n
gT
i
m
e(
s)
1
600
500
400
300
200
100
0
10
Gain (dB)
100
0.001%
0.01%
4V Step
SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE
O
v
e
r
s
hoo
t
(
%
)
10
40
35
30
25
20
15
10
5
0
100
Load Capacitance (pF)
1000
0.1Hz TO 10Hz NOISE
500nV
/di
v
1s/div
CURRENT AND VOLTAGE NOISE SPECTRAL DENSITY
vs FREQUENCY
V
o
l
t
age
N
o
i
s
e
(
nV
/
/
H
z
)
1
1000
100
10
C
u
r
r
en
t
N
oi
s
e
(
f
A
/
/
H
z
)
1000
100
10
1k
100
10
Frequency (Hz)
10k
Current Noise
Voltage Noise
Continues with no 1/f (flicker) noise.
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
7
APPLICATIONS INFORMATION
The OPA333 and OPA2333 are unity-gain stable and free
from unexpected output phase reversal. They use a
proprietary auto-calibration technique to provide low offset
voltage and very low drift over time and temperature. For
lowest offset voltage and precision performance, circuit
layout and mechanical conditions should be optimized.
Avoid temperature gradients that create thermoelectric
(Seebeck) effects in the thermocouple junctions formed
from connecting dissimilar conductors. These
thermally-generated potentials can be made to cancel by
assuring they are equal on both input terminals. Other
layout and design considerations include:
D
Use low thermoelectric-coefficient conditions (avoid
dissimilar metals).
D
Thermally isolate components from power supplies or
other heat sources.
D
Shield op amp and input circuitry from air currents,
such as cooling fans.
Following these guidelines will reduce the likelihood of
junctions being at different temperatures, which can cause
thermoelectric voltages of 0.1
V/
C or higher, depending
on materials used.
OPERATING VOLTAGE
The OPA333 and OPA2333 op amps operate over a
power-supply range of +1.8V to +5.5V (
0.9V to
2.75V).
Supply voltages higher than +7V (absolute maximum) can
permanently damage the device. Parameters that vary
over supply voltage or temperature are shown in the
Typical Characteristics section of this data sheet.
INPUT VOLTAGE
The OPA333 and OPA2333 input common-mode voltage
range extends 0.1V beyond the supply rails. The OPA333
is designed to cover the full range without the troublesome
transition region found in some other rail-to-rail amplifiers.
Normally, input bias current is about 70pA; however, input
voltages exceeding the power supplies can cause
excessive current to flow into or out of the input pins.
Momentary voltages greater than the power supply can be
tolerated if the input current is limited to 10mA. This
limitation is easily accomplished with an input resistor, as
shown in Figure 1.
5k
OPA333
10mA max
+5V
V
IN
V
OUT
I
OVERLOAD
Current-limiting resistor
required if input voltage
exceeds supply rails by
0.5V.
Figure 1. Input Current Protection
INTERNAL OFFSET CORRECTION
The OPA333 and OPA2333 op amps use an
auto-calibration technique with a time-continuous 350kHz
op amp in the signal path. This amplifier is zero-corrected
every 8
s using a proprietary technique. Upon power-up,
the amplifier requires approximately 100
s to achieve
specified V
OS
accuracy. This design has no aliasing or
flicker noise.
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
8
ACHIEVING OUTPUT SWING TO THE OP
AMP NEGATIVE RAIL
Some applications require output voltage swings from 0V
to a positive full-scale voltage (such as +2.5V) with
excellent accuracy. With most single-supply op amps,
problems arise when the output signal approaches 0V,
near the lower output swing limit of a single-supply op amp.
A good single-supply op amp may swing close to
single-supply ground, but will not reach ground. The output
of the OPA333 and OPA2333 can be made to swing to
ground, or slightly below, on a single-supply power source.
To do so requires the use of another resistor and an
additional, more negative, power supply than the op amp
negative supply. A pull-down resistor may be connected
between the output and the additional negative supply to
pull the output down below the value that the output would
otherwise achieve, as shown in Figure 2.
V
OUT
R
P
= 20k
Op Amp V
-
= Gnd
OPA333
V
IN
V+ = +5V
-
5V
Additional
Negative
Supply
Figure 2. For V
OUT
Range to Ground
The OPA333 and OPA2333 have an output stage that
allows the output voltage to be pulled to its negative supply
rail, or slightly below, using the technique previously
described. This technique only works with some types of
output stages. The OPA333 and OPA2333 have been
characterized to perform with this technique; however, the
recommended resistor value is approximately 20k
. Note
that this configuration will increase the current
consumption by several hundreds of microamps.
Accuracy is excellent down to 0V and as low as -2mV.
Limiting and nonlinearity occurs below-2mV, but excellent
accuracy returns as the output is again driven above
-2mV. Lowering the resistance of the pull-down resistor
will allow the op amp to swing even further below the
negative rail. Resistances as low as 10k
can be used to
achieve excellent accuracy down to -10mV.
GENERAL LAYOUT GUIDELINES
Attention to good layout practices is always
recommended. Keep traces short and, when possible, use
a printed circuit board (PCB) ground plane with
surface-mount components placed as close to the device
pins as possible. Place a 0.1
F capacitor closely across
the supply pins. These guidelines should be applied
throughout the analog circuit to improve performance and
provide benefits such as reducing the EMI
(electromagnetic-interference) susceptibility.
Operational amplifiers vary in their susceptibility to radio
frequency interference (RFI). RFI can generally be
identified as a variation in offset voltage or dc signal levels
with changes in the interfering RF signal. The OPA333 has
been specifically designed to minimize susceptibility to
RFI and demonstrates remarkably low sensitivity
compared to previous generation devices. Strong RF
fields may still cause varying offset levels..
+
+
+
- -
+
4.096V
0.1
F
+5V
Zero Adj.
K-Type
Thermocouple
40.7
V/
_
C
R
2
549
R
9
150k
R
5
31.6k
R
1
6.04k
R
6
200
+5V
0.1
F
R
2
2.94k
V
O
R
3
60.4
R
4
6.04k
O PA333
D1
REF3140
Figure 3. Temperature Measurement
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
9
Figure 4 shows the basic configuration for a bridge
amplifier.
A low-side current shunt monitor is shown in Figure 5. R
N
are operational resistors used to isolate the ADS1100 from
the noise of the digital I
2
C bus. Since the ADS1100 is a
16-bit converter, a precise reference is essential for
maximum accuracy. If absolute accuracy is not required,
and the 5V power supply is sufficiently stable, the
REF3130 may be omitted.
R
1
V
S
V
OUT
V
REF
R
1
OPA333
R
R
R R
+5V
Figure 4. Single Op Amp Bridge Amplifier
OPA333
ADS1100
Load
V
I
2
C
R
1
4.99k
R
3
4.99k
R
4
48.7k
R
2
4.99k
+5V
3V
REF3130
R
7
1.18k
R
SHUNT
1
R
6
71.5k
R
N
56
R
N
56
(PGA Gain = 4)
FS = 3.0V
1% resistors provide adequate common-mode rejection at small ground-loop errors.
Stray ground-loop reistance.
I
LOAD
Figure 5. Low-Side Current Monitor
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
10
OPA333
Output
R
SHUNT
Load
V+
V+
R
G
R
L
R
1
(2)
10k
R
BIAS
+5V
zener
(1)
Two zener
biasing methods
are shown.
(3)
MOSFET rated to
stand-off supply voltage
such as BSS84 for
up to 50V.
Notes:
(1) zener rated for op amp supply capability (that is, 5.1V for OPA333).
(2) Current-limiting resistor.
(3) Choose zener biasing resistor or dual NMOSFETS (FDG6301N, NTJD4001N, or Si1034)
Figure 6. High-Side Current Monitor
OPA333
3V
1M
60k
100k
1M
NTC
Thermistor
Figure 7. Thermistor Measurement
V
1
-
In
V
2
+In
R
1
R
2
2
3
5
6
1
R
2
OPA333
OPA333
INA152
V
O
V
O
= (1 + 2R
2
/R
1
) (V
2
-
V
1
)
Figure 8. Precision Instrumentation Amplifier
OPA333
OPA2333
SBOS351 - MARCH 2006
www.ti.com
11
DFN PACKAGE
The OPA2333 is offered in an DFN-8 package (also known
as SON). The DFN is a QFN package with lead contacts
on only two sides of the bottom of the package. This
leadless package maximizes board space and enhances
thermal and electrical characteristics through an exposed
pad.
DFN packages are physically small, have a smaller routing
area, improved thermal performance, and improved
electrical parasitics. Additionally, the absence of external
leads eliminates bent-lead issues.
The DFN package can be easily mounted using standard
printed circuit board (PCB) assembly techniques. See
Application Note QFN/SON PCB Attachment (SLUA271)
and Application Report Quad Flatpack No-Lead Logic
Packages (SCBA017), both available for download at
www.ti.com.
The exposed leadframe die pad on the bottom of the
package should be connected to V- or left
unconnected.
DFN LAYOUT GUIDELINES
The exposed leadframe die pad on the DFN package
should be soldered to a thermal pad on the PCB. A
mechanical drawing showing an example layout is
attached at the end of this data sheet. Refinements to this
layout may be necessary based on assembly process
requirements. Mechanical drawings located at the end of
this data sheet list the physical dimensions for the package
and pad. The five holes in the landing pattern are optional,
and are intended for use with thermal vias that connect the
leadframe die pad to the heatsink area on the PCB.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests. Even
with applications that have low-power dissipation, the
exposed pad must be soldered to the PCB to provide
structural integrity and long-term reliability.
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
OPA2333AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA2333AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA2333AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA2333AIDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDBVRG4
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDCKRG4
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA333AIDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com
14-Mar-2006
Addendum-Page 1
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
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reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
14-Mar-2006
Addendum-Page 2
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