FEATURES
D
RAIL-TO-RAIL INPUT WITHOUT CROSSOVER
D
2.2V OPERATION
D
LOW OFFSET: 200
V
D
WIDE BANDWIDTH: 50MHz
D
CMRR: 100dB (min)
D
HIGH SLEW RATE: 25V/
s
D
LOW NOISE: 4.5nV/
/
Hz
D
LOW THD+NOISE: 0.0006%
D
QUIESCENT CURRENT: 5mA (max)
D
microPACKAGE: SOT23-5
APPLICATIONS
D
SIGNAL CONDITIONING
D
DATA ACQUISITION
D
PROCESS CONTROL
D
ACTIVE FILTERS
D
TEST EQUIPMENT
D
AUDIO
D
WIDEBAND AMPLIFIERS
-
120
-
100
-
80
-
60
-
40
-
20
0
Competitor B
Competitor A
1
2
3
4
f
i
= 10kHz
BW = 30kHz
5
T
HD+No
i
s
e
R
a
t
i
o
(
d
B
)
V
IN
= V
OUT
(V
PP
)
OPA365 vs COMPETITION
+5V
V
IN
OPA365
DESCRIPTION
The OPAx365 zer
-crossover series rail-to-rail high-
performance CMOS operational amplifiers are opti-
mized for very low voltage, single-supply applications.
Rail-to-rail input/output, low-noise (4.5nV/
Hz) and
high-speed operations (50MHz Gain Bandwidth) make
them ideal for driving sampling analog-to-digital con-
verters (ADCs). Applications incude audio, signal con-
ditioning, and sensor amplification. The OPA365 family
of op amps are well-suited for cell phone power amplifi-
er control loops.
Special features include excellent common-mode re-
jection ratio (CMRR), no input stage crossover distor-
tion, high input impedance and rail-to-rail input and out-
put swing. The input common-mode range includes
both the negative and positive supplies. The output volt-
age swing is within 10mV of the rails.
The OPA365 (single version) is available in the micro-
SIZE SOT23-5 and SO-8 packages. The OPA2365
(dual version) is offered in the microSIZE DFN-8 (3mm
x 3mm) and SO-8 packages. All versions are specified
for operation from -40
C to +125
C. Single and dual
versions have identical specifications for maximum de-
sign flexibility.
PACKAGE
OPA365
OPA2365
SOT23-5
n
SO-8
(1)
n
n
DFN-8
(1)
n
(1) Available Q3, 2006.
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
2.2V, 50MHz, Low-Noise,
Single-Supply Rail-to-Rail
OPERATIONAL AMPLIFIERS
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
www.ti.com
Copyright
2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS
(1)
Supply Voltage
+5.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals, Voltage
(2)
(V-) -0.5V to (V+) + 0.5V
. . . .
Signal Input Terminals, Current
(2)
10mA
. . . . . . . . . . . . . . . . . . . .
Output Short-Circuit
(3)
Continuous
. . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature
-40
C to +150
C
. . . . . . . . . . . . . . . . . . . . .
Storage Temperature
-65
C to +150
C
. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature
+150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating
Human Body Model
4000V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model
1000V
. . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
PACKAGE MARKING
SOT23-5
DBV
OAVQ
OPA365
SOT23-5
DBV
OAVQ
OPA365
SO-8
(2)
D
O365A
OPA365
SO-8
(2)
D
O365A
SO-8
(2)
D
O2365A
OPA2365
SO-8
(2)
D
O2365A
OPA2365
DFN-8
(2)
DRB
BRA
OPA2365
DFN-8
(2)
DRB
BRA
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) Available Q3, 2006.
PIN CONFIGURATIONS
(1) NC denotes no internal connection.
1
2
3
5
4
V+
-
IN
V
OUT
V
-
+IN
OPA365
SOT23-5
1
2
3
4
8
7
6
5
NC
(1)
V+
V
OUT
NC
(1)
NC
(1)
-
IN
+IN
V
-
OPA365
SO-8
Top View
1
2
3
4
8
7
6
5
V+
V
OUT
B
-
IN B
+IN B
V
OUT
A
-
IN A
+IN A
V
-
OPA2365
SO-8, DFN-8
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
3
ELECTRICAL CHARACTERISTICS: V
S
= +2.2V to +5.5V
Boldface limits apply over the specified temperature range, T
A
= -40
C to +125
C.
At T
A
= +25
C, R
L
= 10k
connected to V
S
/2, V
CM
= V
S
/2, and V
OUT
= V
S
/2, unless otherwise noted.
OPAx365
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Input Offset Voltage
V
OS
100
200
V
Drift
dV
OS
/dT
1
V/
C
vs Power Supply
PSRR
V
S
= +2.2V to +5.5V
10
100
V/V
Channel Separation, dc
0.2
V/V
INPUT BIAS CURRENT
Input Bias Current
I
B
0.2
10
pA
over Temperature
See Typical Characteristics
Input Offset Current
I
OS
0.2
10
pA
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz e
n
5
V
PP
Input Voltage Noise Density, f = 100kHz e
n
4.5
nV/
Hz
Input Current Noise Density, f = 10kHz i
n
4
fA/
Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
V
CM
(V-) - 0.1
(V+) + 0.1
V
Common-Mode Rejection Ratio
CMRR
(V-) - 0.1V
3
V
CM
3
(V+) + 0.1V
100
120
dB
INPUT CAPACITANCE
Differential
6
pF
Common-Mode
2
pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain
A
OL
RL = 10k
, 100mV < VO < (V+) - 100mV
100
120
dB
RL = 600
, 200mV < VO < (V+) - 200mV
100
120
dB
RL = 600
, 200mV < VO < (V+) - 200mV
94
dB
FREQUENCY RESPONSE
V
S
= 5V
Gain-Bandwidth Product
GBW
50
MHz
Slew Rate
SR
G = +1
25
V/
s
Settling Time, 0.1%
t
S
4V Step, G = +1
200
ns
0.01%
4V Step, G = +1
300
ns
Overload Recovery Time
V
IN
x Gain > V
S
< 0.1
s
Total Harmonic Distortion + Noise
THD+N
R
L
= 600
, V
O
= 4V
PP
, G = +1, f = 1kHz
0.0006
%
OUTPUT
Voltage Output Swing from Rail
over Temperature
R
L
= 10k
, V
S
= 5.5V
10
20
mV
Short-Circuit Current
I
SC
65
mA
Capacitive Load Drive
C
L
See Typical Characteristics
Open-Loop Output Impedance
f = 1MHz, I
O
= 0
30
POWER SUPPLY
Specified Voltage Range
V
S
2.2
5.5
V
Quiescent Current Per Amplifier
I
Q
I
O
= 0
4.6
5
mA
over Temperature
5
mA
TEMPERATURE RANGE
Specified Range
-40
+125
C
Thermal Resistance
q
JA
C/W
SOT23-5
200
C/W
SO-8
150
C/W
DFN-8
46
C/W
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
4
TYPICAL CHARACTERISTICS
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
OPEN-LOOP GAIN/PHASE vs FREQUENCY
Vo
lt
a
g
e
G
a
in
(
d
B
)
140
120
100
80
60
40
20
0
-
20
P
has
e
(
_
)
0
-
45
-
90
-
135
-
180
1M
10M
100k
10k
1k
100
10
Frequency (Hz)
100M
Phase
Gain
POWER SUPPLY AND COMMON-MODE
REJECTION RATIO vs FREQUENCY
P
S
RR,
CM
RR
(
d
B
)
140
120
100
80
60
40
20
0
1M
10M
100k
10k
1k
100
10
Frequency (Hz)
100M
CMRR
PSRR
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
V
S
= 5.5V
Offset Voltage (
V)
Po
p
u
l
a
t
i
o
n
-
20
0
-
18
0
-
16
0
-
14
0
-
12
0
-
10
0
-
80
-
60
-
40
-
20
0
20
40
60
80
10
0
12
0
14
0
16
0
18
0
20
0
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= 5.5V
Offset Voltage Drift (
V/
_
C)
P
o
pul
ati
o
n
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
INPUT BIAS CURRENT vs TEMPERATURE
Inp
u
t
B
i
a
s
(
pA
)
1000
900
800
700
600
500
400
300
200
100
0
-
25
-
50
Temperature (
_
C)
0
25
50
75
100
125
500
400
300
200
100
0
-
25
I
B
(p
A
)
-
0.5
0
5.5
V
CM
(V)
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V
CM
Specified Range
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
5
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
OUTPUT VOLTAGE vs OUTPUT CURRENT
O
u
tput
V
o
l
t
age
(
V
)
3
2
1
0
-
1
-
2
-
3
10
0
Output Current (mA)
100
20
30
40
50
60
70
80
90
+125
_
C
+25
_
C
-
40
_
C
-
40
_
C
+125
_
C
+25
_
C
V
S
=
1.1V
V
S
=
2.75V
SHORT-CIRCUIT CURRENT vs TEMPERATURE
S
hor
t-
C
i
r
c
ui
t
C
ur
r
ent
(
m
A
)
70
60
50
40
30
20
10
0
-
10
-
20
-
30
-
40
-
50
-
60
-
70
-
80
-
25
-
50
Temperature (
_
C)
125
0
25
50
75
100
I
SC
+
I
SC
-
QUIESCENT CURRENT vs SUPPLY VOLTAGE
Q
u
i
e
s
c
ent
C
u
r
r
en
t
(
m
A
)
4.75
4.50
4.25
4.00
3.75
2.5
2.2
Supply Voltage (V)
5.5
3.0
3.5
4.0
4.5
5.0
QUIESCENT CURRENT vs TEMPERATURE
Q
u
i
e
s
c
e
nt
C
u
r
r
en
t
(
m
A
)
4.80
4.74
4.68
4.62
4.56
4.50
-
25
-
50
Temperature (
_
C)
125
0
25
50
75
100
0.1Hz to 10Hz
INPUT VOLTAGE NOISE
2
V/
d
i
v
1s/div
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
T
HD+N
(
%
)
0.01
0.001
0.0001
10k
1k
100
10
Frequency (Hz)
100k
G = 10, R
L
= 600
V
O
= 1V
RMS
V
O
= 1V
RMS
V
O
= 1.448V
RMS
G = +1, R
L
= 600
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
6
TYPICAL CHARACTERISTICS (continued)
At T
A
= +25
C, V
S
= +5V, and C
L
= 0pF, unless otherwise noted.
INPUT VOLTAGE NOISE SPECTRAL DENSITY
V
o
l
t
age
N
o
i
s
e
(
nV
/
Hz
)
1k
100
10
1
10k
1k
100
10
Frequency (Hz)
100k
OVERSHOOT vs CAPACITIVE LOAD
O
v
er
s
h
oot
(
%
)
60
50
40
30
20
10
0
0
Capacitive Load (pF)
1k
100
G = +1
G =
-
1
G = +10
G =
-
10
SMALL-SIGNAL STEP RESPONSE
O
u
tput
V
o
l
t
a
g
e
(
50
mV
/d
i
v
)
Time (50ns/div)
G = 1
R
L
= 10k
V
S
=
2.5
LARGE-SIGNAL STEP RESPONSE
O
u
tp
u
t
V
o
l
t
age
(
1
V
/
d
i
v
)
Time (250ns/div)
G = 1
R
L
= 10k
V
S
=
2.5
SMALL-SIGNAL STEP RESPONSE
O
u
tput
V
o
l
t
a
g
e
(
50
mV
/d
i
v
)
Time (50ns/div)
G = 1
R
L
= 600
V
S
=
2.5
LARGE-SIGNAL STEP RESPONSE
O
u
tp
u
t
V
o
l
t
age
(
1
V
/
d
i
v
)
Time (250ns/div)
G = 1
R
L
= 600
V
S
=
2.5
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
7
APPLICATIONS INFORMATION
OPERATING CHARACTERISTICS
The OPA365 amplifier parameters are fully specified
from +2.2V to +5.5V. Many of the specifications apply
from -40
C to +125
C. Parameters that can exhibit sig-
nificant variance with regard to operating voltage or
temperature are presented in the Typical Characteris-
tics.
GENERAL LAYOUT GUIDELINES
The OPA365 is a wideband amplifier. To realize the full
operational performance of the device, good high-fre-
quency printed circuit board (PCB) layout practices are
required. Low-loss, 0.1
F bypass capacitors must be
connected between each supply pin and ground as
close to the device as possible. The bypass capacitor
traces should be designed for minimum inductance.
BASIC AMPLIFIER CONFIGURATIONS
As with other single-supply op amps, the OPA365 may
be operated with either a single supply or dual supplies.
A typical dual-supply connection is shown in Figure 1,
which is accompanied by a single-supply connection.
The OPA365 is configured as a basic inverting amplifier
with a gain of -10V/V. The dual-supply connection has
an output voltage centered on zero, while the single-
supply connection has an output centered on the com-
mon-mode voltage V
CM
. For the circuit shown, this volt-
age is 1.5V, but may be any value within the common-
mode input voltage range. The OPA365 V
CM
range
extends 100mV beyond the power-supply rails.
-
1.5V
V
-
C
1
100nF
C
1
100nF
C
2
100nF
R
2
10k
R
2
10k
R
1
1k
R
1
1k
V+
+1.5V
V
OUT
V
IN
a) Dual Supply Connection
V
-
V+
+3V
V
OUT
V
IN
V
CM
= 1.5V
b) Single-Supply Connection
OPA365
OPA365
Figure 1. Basic Circuit Connections
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
8
Figure 2 shows a single-supply, electret microphone
application where V
CM
is provided by a resistive divider.
The divider also provides the bias voltage for the elec-
tret element.
INPUT AND ESD PROTECTION
The OPA365 incorporates internal electrostatic dis-
charge (ESD) protection circuits on all pins. In the case
of input and output pins, this protection primarily con-
sists of current steering diodes connected between the
input and power-supply pins. These ESD protection
diodes also provide in-circuit, input overdrive protec-
tion, provided that the current is limited to 10mA as
stated in the Absolute Maximum Ratings. Figure 3
shows how a series input resistor may be added to the
driven input to limit the input current. The added resistor
contributes thermal noise at the amplifier input and its
value should be kept to the minimum in noise-sensitive
applications.
RAIL-TO-RAIL INPUT
The OPA365 product family features true rail-to-rail in-
put operation, with supply voltages as low as
1.1V
(2.2V). A unique zer
-crossover input topology elimi-
nates the input offset transition region typical of many
rail-to-rail, complementary stage operational amplifiers.
This topology also allows the OPA365 to provide superi-
or common-mode performance over the entire input
range, which extends 100mV beyond both power-sup-
ply rails; see Figure 4. When driving ADCs, the highly
linear VCM range of the OPA365 assures that the op
amp/ADC system linearity performance is not compro-
mised.
3.3V
49k
V
OUT
OPA365
Clean 3.3V Supply
1
F
4k
6k
Electret
Microphone
5k
Figure 2. Microphone Preamplifier
5k
OPA365
10mA max
V+
V
IN
V
OUT
I
OVERLOAD
Figure 3. Input Current Protection
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
V
OS
(
V)
200
150
100
50
0
-
50
-
150
-
100
-
200
-
2
-
3
Common-Mode Voltage (V)
3
-
1
0
1
2
V
S
=
2.75V
OPA365
Competitors
Figure 4. OPA365 has Linear Offset Over the
Entire Common-Mode Range
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
9
A simplified schematic illustrating the rail-to-rail input
circuitry is shown in Figure 5.
CAPACITIVE LOADS
The OPA365 may be used in applications where driving
a capacitive load is required. As with all op amps, there
may be specific instances where the OPA365 can be-
come unstable, leading to oscillation. The particular op
amp circuit configuration, layout, gain and output load-
ing are some of the factors to consider when establish-
ing whether an amplifier will be stable in operation. An
op amp in the unity-gain (+1V/V) buffer configuration
and driving a capacitive load exhibits a greater tenden-
cy to be unstable than an amplifier operated at a higher
noise gain. The capacitive load, in conjunction with the
op amp output resistance, creates a pole within the
feedback loop that degrades the phase margin. The
degradation of the phase margin increases as the ca-
pacitive loading increases.
When operating in the unity-gain configuration, the
OPA365 remains stable with a pure capacitive load up
to approximately 1nF. The equivalent series resistance
(ESR) of some very large capacitors (C
L
> 1
F) is suffi-
cient to alter the phase characteristics in the feedback
loop such that the amplifier remains stable. Increasing
the amplifier closed-loop gain allows the amplifier to
drive increasingly larger capacitance. This increased
capability is evident when observing the overshoot re-
sponse of the amplifier at higher voltage gains. See the
typical characteristic graph, Small-Signal Overshoot
vs. Capacitive Load.
One technique for increasing the capacitive load drive
capability of the amplifier operating in unity gain is to in-
sert a small resistor, typically 10
to 20
, in series with
the output; see Figure 6. This resistor significantly re-
duces the overshoot and ringing associated with large
capacitive loads. A possible problem with this technique
is that a voltage divider is created with the added series
resistor and any resistor connected in parallel with the
capacitive load. The voltage divider introduces a gain
error at the output that reduces the output swing. The
error contributed by the voltage divider may be insignifi-
cant. For instance, with a load resistance, R
L
= 10k
,
and R
S
= 20
, the gain error is only about 0.2%. Howev-
er, when R
L
is decreased to 600
, which the OPA365
is able to drive, the error increases to 7.5%.
Regulated
Charge Pump
V
O U T
= V
C C
+1.8V
Patent Pending
Very Low Ripple
Topology
I
B IAS
V
C C
+ 1.8V
I
BI A S
I
BI A S
I
B IA S
V
S
I
B IA S
V
O U T
V
IN
-
V
I N
+
Figure 5. Simplified Schematic
10
to
20
V+
V
IN
V
OUT
R
S
R
L
C
L
OPA365
Figure 6. Improving Capacitive Load Drive
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
10
ACHIEVING AN OUTPUT LEVEL OF
ZERO VOLTS (0V)
Certain single-supply applications require the op amp
output to swing from 0V to a positive full-scale voltage
and have high accuracy. An example is an op amp
employed to drive a single-supply ADC having an input
range from 0V to +5V. Rail-to-rail output amplifiers with
very light output loading may achieve an output level
within millivolts of 0V (or +V
S
at the high end), but not
0V. Furthermore, the deviation from 0V only becomes
greater as the load current required increases. This in-
creased deviation is a result of limitations of the CMOS
output stage.
When a pull-down resistor is connected from the ampli-
fier output to a negative voltage source, the OPA365
can achieve an output level of 0V, and even a few milli-
volts below 0V. Below this limit, nonlinearity and limiting
conditions become evident. Figure 7 illustrates a circuit
using this technique.
A pull-down current of approximately 500
A is required
when OPA365 is connected as a unity-gain buffer.
A practical termination voltage (V
NEG
) is -5V, but
other convenient negative voltages also may be
used. The pull-down resistor R
L
is calculated from
R
L
= [(V
O
-V
NEG
)/(500
A)]. Using a minimum output
voltage (V
O
) of 0V, R
L
= [0V-(-5V)]/(500
A)] = 10k
.
Keep in mind that lower termination voltages result in
smaller pull-down resistors that load the output during
positive output voltage excursions.
Note that this technique does not work with all op amps
and should only be applied to op amps such as the
OPA365 that have been specifically designed to oper-
ate in this manner. Also, operating the OPA365 output
at 0V changes the output stage operating conditions,
resulting in somewhat lower open-loop gain and band-
width. Keep these precautions in mind when driving a
capacitive load because these conditions can affect cir-
cuit transient response and stability.
ACTIVE FILTERING
The OPA365 is well-suited for active filter applications
requiring a wide bandwidth, fast slew rate, low-noise,
single-supply operational amplifier. Figure 8 shows a
500kHz, 2nd-order, low-pass filter utilizing the multiple-
feedback (MFB) topology. The components have been
selected to provide a maximally-flat Butterworth
response. Beyond the cutoff frequency, roll-off is
-40dB/dec. The Butterworth response is ideal for ap-
plications requiring predictable gain characteristics
such as the anti-aliasing filter used ahead of an ADC.
V
OUT
R
P
= 10k
500
A
OPA365
V
IN
V+ = +5V
Op Amps
Negative
Supply
Grounded
-
V =
-
5V
(Additional
Negative Supply)
Figure 7. Swing-to-Ground
C
1
1nF
C
2
150pF
R
3
549
R
1
549
R
2
1.24k
V+
V
OUT
V
IN
V
-
OPA365
Figure 8. Second-Order Butterworth 500kHz
Low-Pass Filter
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
11
One point to observe when considering the MFB filter
is that the output is inverted, relative to the input. If this
inversion is not required, or not desired, a noninverting
output can be achieved through one of these options:
1) adding an inverting amplifier; 2) adding an additional
2nd-order MFB stage; or 3) using a noninverting filter
topology such as the Sallen-Key (shown in Figure 9).
MFB and Sallen-Key, low-pass and high-pass filter syn-
thesis is quickly accomplished using TI's FilterPro pro-
gram. This software is available as a free download at
www.ti.com.
DRIVING AN ANALOG-TO-DIGITAL CONVERTER
Very wide common-mode input range, rail-to-rail input
and output voltage capability and high speed make the
OPA365 an ideal driver for modern ADCs. Also, be-
cause it is free of the input offset transition characteris-
tics inherent to some rail-to-rail CMOS op amps, the
OPA365 provides low THD and excellent linearity
throughout the input voltage swing range.
Figure 10 shows the OPA365 driving an ADS8326,
16-bit, 500kSPS converter. The amplifier is connected
as a unity-gain, noninverting buffer and has an output
swing to 0V, making it directly compatible with the ADC
minus full-scale input level. The 0V level is achieved by
powering the OPA365 V- pin with a small negative volt-
age established by the diode forward voltage drop.
A small, signal-switching diode or Schottky diode
provides a suitable negative supply voltage of -0.3 to
-0.7V. The supply rail-to-rail is equal to V+, plus the
small negative voltage.
V
OUT
V
IN
= 1V
RMS
OPA365
R
3
150k
R
2
19.5k
C
3
220pF
R
1
1.8k
C
1
3.3nF
C
2
47pF
Figure 9. Configured as a 3-Pole, 20kHz, Sallen-Key Filter
-
5V
V
-
Optional
(2)
C
1
100nF
R
1
(1)
100
R
2
500
C
2
100nF
V+
+5V
SD1
BAS40
V
IN
0 to 4.096V
ADS8326
16-Bit
100kSPS
C
3
(1)
1nF
C
4
100nF
+5V
REF IN
-
IN
+IN
REF3240
4.096V
+5V
OPA365
NOTES: (1) Suggested value; may require adjustment based on specific application.
(2) Single-supply applications lose a small number of ADC codes near ground
due to op amp output swing limitation. If a negative power supply is available,
this simple circuit creates a
-
0.3V supply to allow output swing to true ground
potential.
Figure 10. Driving the ADS8326
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
12
One method for driving an ADC that negates the need
for an output swing down to 0V uses a slightly com-
pressed ADC full-scale input range (FSR). For exam-
ple, the 16-bit ADS8361 (shown in Figure 11) has a
maximum FSR of 0V to 5V, when powered by a +5V
supply and V
REF
of 2.5V. The idea is to match the ADC
input range with the op amp full linear output swing
range; for example, an output range of +0.1 to +4.9V.
The reference output from the ADS8361 ADC is divided
down from 2.5V to 2.4V using a resistive divider. The
ADC FSR then becomes 4.8V
PP
centered on a com-
mon-mode voltage of +2.5V. Current from the ADS8361
reference pin is limited to about
10
A. Here, 5
A was
used to bias the divider. The resistors must be precise
to maintain the ADC gain accuracy. An additional bene-
fit of this method is the elimination of the negative sup-
ply voltage; it requires no additional power-supply cur-
rent.
An RC network, consisting of R
1
and C
1
, is included be-
tween the op amp and the ADS8361. It not only pro-
vides a high-frequency filter function, but more impor-
tantly serves as a charge reservoir used for charging
the converter internal hold capacitance. This capability
assures that the op amp output linearity is maintained
as the ADC input characteristics change throughout the
conversion cycle. Depending on the particular applica-
tion and ADC, some optimization of the R
1
and C
1
val-
ues may be required for best transient performance.
V
-
C
1
100nF
R
2
10k
R
1
10k
NOTE: (1) Suggested value; may require adjustment
based on specific application.
R
3
(1)
100
R
4
20k
R
5
480k
V+
+5V
V
IN
0.1V to 4.9V
ADS8361
16-Bit
100kSPS
OPA365
C
2
(1)
1nF
C
3
1
F
REF IN
+IN
-
IN
+5V
REF OUT
+2.5V
+2.4V
Figure 11. Driving the ADS8361
OPA365
OPA2365
SBOS365A - JUNE 2006 - REVISED JULY 2006
www.ti.com
13
Figure 12 illustrates the OPA2365 dual op amp provid-
ing signal conditioning within an ADS1258 bridge sen-
sor circuit. It follows the ADS1258 16:1 multiplexer and
is connected as a differential in/differential out amplifier.
The voltage gain for this stage is approximately 10V/V.
Driving the ADS1258 internal ADC in differential mode,
rather than in a single-ended, exploits the full linearity
performance capability of the converter. For best com-
mon-mode rejection the two R
2
resistors should be
closely matched.
Note that in Figure 12, the amplifiers, bridges,
ADS1258 and internal reference are powered by the
same single +5V supply. This ratiometric connection
helps cancel excitation voltage drift effects and noise.
For best performance, the +5V supply should be as free
as possible of noise and transients.
When the ADS1258 data rate is set to maximum and
the chop feature enabled, this circuit yields 12 bits of
noise-free resolution with a 50mV full-scale input.
The chop feature is used to reduce the ADS1258 offset
and offset drift to very low levels. A 2.2nF capacitor is
required across the ADC inputs to bypass the sampling
currents. The 47
resistors provide isolation for the
OPA2365 outputs from the relatively large, 2.2nF ca-
pacitive load. For more information regarding the
ADS1258, see the product data sheet available for
down load at www.ti.com.
2k
R
3
47
R
2
= 10k
R
2
= 10k
ADS1258
2.2nF
+5V
+5V
R
3
47
AIN0
AINCOM
MU
X
O
U
T
N
MU
X
O
U
T
P
A
DCI
NP
A
DCI
NN
2k
AIN1
2k
AIN14
2k
AIN15
REFP
REFN
AVSS
AVDD
R
1
= 2.2k
10
F
+
0.1
F
0.1
F
0.1
F
+
10
F
OPA2365
OPA2365
RFI
RFI
RFI
RFI
RFI
RFI
NOTE: G = 1 + 2R
2
/R
1
. Match R
2
resistors for optimum CMRR.
...
...
...
Figure 12. Conditioning Input Signals to the ADS1258 on a Single-Supply
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
OPA365AIDBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVRG4
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jul-2006
Addendum-Page 1
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