Quad High-Speed Precision
Difet
OPERATIONAL AMPLIFIER
International Airport Industrial Park Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
Difet
, Burr-Brown Corp.
BIFET
, National Semiconductor Corp.
FEATURES
q
WIDE BANDWIDTH: 6.4MHz
q
HIGH SLEW RATE: 35V/
s
q
LOW OFFSET:
750
V max
q
LOW BIAS CURRENT:
4pA max
q
LOW SETTLING: 1.5
s to 0.01%
q
STANDARD QUAD PINOUT
DESCRIPTION
The OPA404 is a high performance monolithic
Difet
(dielectrically-isolated FET) quad operational
amplifier. It offers an unusual combination of very-
low bias current together with wide bandwidth and
fast slew rate.
Noise, bias current, voltage offset, drift, and speed are
superior to BIFET
amplifiers.
Laser-trimming of thin-film resistors gives very low
offset and drift--the best available in a quad FET op
amp.
The OPA404's input cascode design allows high
pre-
cision input specifications and uncompromised
high-
speed performance.
Standard quad op amp pin configuration allows up-
grading of existing designs to higher performance
levels. The OPA404 is unity-gain stable.
OPA404
APPLICATIONS
q
PRECISION INSTRUMENTATION
q
OPTOELECTRONICS
q
SONAR, ULTRASOUND
q
PROFESSIONAL AUDIO EQUIPMENT
q
MEDICAL EQUIPMENT
q
DETECTOR ARRAYS
Cascode
+In
In
Output
OPA404 Simplified Circuit
(Each Amplifier)
+V
CC
V
CC
1986 Burr-Brown Corporation
PDS-677F
Printed in U.S.A. August 1995
2
OPA404
SPECIFICATIONS
ELECTRICAL
At V
CC
=
15VDC and T
A
= +25
C unless otherwise noted.
OPA404AG, KP, KU
(1)
OPA404BG
OPA404SG
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
INPUT
NOISE
Voltage: f
O
= 10Hz
32
*
*
nV/
Hz
f
O
= 100Hz
19
*
*
nV/
Hz
f
O
= 1kHz
15
*
*
nV/
Hz
f
O
= 10kHz
12
*
*
nV/
Hz
f
B
= 10Hz to 10kHz
1.4
*
*
Vrms
f
B
= 0.1Hz to 10Hz
0.95
*
*
Vp-p
Current: f
B
= 0.1Hz to 10Hz
12
*
*
fA, p-p
f
O
= 0.1Hz thru 20kHz
0.6
*
*
fA/
Hz
OFFSET VOLTAGE
Input Offset Voltage
V
CM
= 0VDC
260
1mV
*
750
*
*
V
KP, KU
750
2.5mV
V
Average Drift
T
A
= T
MIN
to T
MAX
3
*
*
V/
C
KP, KU
5
V/
C
Supply Rejection
V
CC
= 12V to 18V
80
100
86
*
*
*
dB
KP, KU
76
100
dB
Channel Separation
100Hz, R
L
= 2k
125
*
*
dB
BIAS CURRENT
Input Bias Current
V
CM
= 0VDC
1
8
*
4
*
*
pA
KP, KU
1
12
pA
OFFSET CURRENT
Input Offset Current
V
CM
= 0VDC
0.5
8
*
4
*
*
pA
KP, KU
0.5
12
pA
IMPEDANCE
Differential
10
13
|| 1
*
*
|| pF
Common-Mode
10
14
|| 3
*
*
|| pF
VOTAGE RANGE
Common-Mode Input Range
10.5
+13, 11
*
*
*
*
V
Common-Mode Rejection
V
IN
=
10VDC
88
100
92
*
*
*
dB
KP, KU
84
100
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
88
100
92
*
*
*
dB
FREQUENCY RESPONSE
Gain Bandwidth
Gain = 100
4
6.4
5
*
*
*
MHz
Full Power Response
20Vp-p, R
L
= 2k
570
*
*
kHz
Slew Rate
V
O
=
10V, R
L
= 2k
24
35
28
*
*
*
V/
s
Settling Time: 0.1%
Gain = 1, R
L
= 2k
0.6
*
*
s
0.01%
C
L
= 100 pF, 10V Step
1.5
*
*
s
RATED OUTPUT
Voltage Output
R
L
= 2k
11.5 +13.2, 13.8
*
*
*
*
V
Current Output
V
O
=
10VDC
5
10
*
*
*
*
mA
Output Resistance
1MHz, Open Loop
80
*
*
Load Capacitance Stability
Gain = +1
1000
*
*
pF
Short Circuit Current
10
27
40
*
*
*
*
*
*
mA
POWER SUPPLY
Rated Voltage
15
*
*
VDC
Voltage Range,
Derated Performance
5
18
*
*
*
*
VDC
Current, Quiescent
I
O
= 0mADC
9
10
*
*
*
*
mA
TEMPERATURE RANGE
Specification
Ambient Temperature
25
+85
*
*
55
+125
C
KP, KU
0
+70
C
Operating
Ambient Temperature
55
+125
*
*
*
*
C
KP, KU
25
+85
C
Storage
Ambient Temperature
65
+150
*
*
*
*
C
KP, KU
40
+125
C
Junction-Ambient
100
*
*
C/W
KP, KU
120/100
C/W
*Specifications same as OPA404AG.
NOTE: (1) OPA404KU may be marked OPA404U.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
3
OPA404
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At V
CC
=
15VDC and T
A
= T
MIN
to T
MAX
unless otherwise noted.
OPA404AG, KP, KU
OPA404BG
OPA404SG
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
TEMPERATURE RANGE
Specification Range
Ambient Temperature
25
+85
*
*
55
+125
C
KP, KU
0
+70
C
INPUT
OFFSET VOLTAGE
Input Offset Voltage
V
CM
= 0VDC
450
2mV
*
1.5mV
550
2.5mV
V
KP KU
1
3.5
mV
Average Drift
3
*
*
V/
C
KP, KU
5
V/
C
Supply Rejection
75
96
80
*
70
93
dB
BIAS CURRENT
Input Bias Current
V
CM
= 0VDC
32
200
*
100
500
5nA
pA
OFFSET CURRENT
Input Offset Current
V
CM
= 0VDC
17
100
*
50
260
2.5nA
pA
VOLTAGE RANGE
Common-Mode Input Range
10
12.7, 10.6
*
*
10 +12.6, 10.5
V
Common-Mode Rejection
V
IN
=
10VDC
82
99
86
*
80
88
dB
KP, KU
80
99
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
82
94
86
*
80
88
dB
RATED OUTPUT
Voltage Output
R
L
= 2k
11.5
12.9, 13.8
*
*
11 +12.7, 13.8
V
Current Output
V
O
=
10VDC
5
9
*
*
*
8
mA
Short Circuit Current
V
O
= 0VDC
8
20
50
*
*
*
*
*
*
mA
POWER SUPPLY
Current, Quiescent
I
O
= 0mADC
9.3
10.5
*
*
9.4
11
mA
* Specification same as OPA404AG.
ORDERING INFORMATION
TEMPERATURE
MODEL
PACKAGE
RANGE
OPA404KP
14-Pin Plastic DIP
0
C to +70
C
OPA404KU
(1)
16-Pin Plastic SOIC
0
C to +70
C
OPA404AG
14-Pin Ceramic DIP
25
C to +85
C
OPA404BG
14-Pin Ceramic DIP
25
C to +85
C
OPA404SG
14-Pin Ceramic DIP
55
C to +125
C
NOTE: (1) OPA404KU may be marked OPA404U.
PACKAGE INFORMATION
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
(1)
OPA404KP
14-Pin Plastic DIP
010
OPA404KU
(2)
16-Pin Plastic SOIC
211
OPA404AG
14-Pin Ceramic DIP
169
OPA404BG
14-Pin Ceramic DIP
169
OPA404SG
14-Pin Ceramic DIP
169
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book. (2) OPA404KU may be
marked OPA404U.
PIN CONFIGURATION
Top View
"U" (SOIC) Package
Top View
"G" or "P" (DIP) Package
ABSOLUTE MAXIMUM RATINGS
Supply .............................................................................................
18VDC
Internal Power Dissipation
(1)
......................................................... 1000mW
Differential Input Voltage
(2)
.............................................................
36VDC
Input Voltage Range
(2)
...................................................................
18VDC
Storage Temperature Range ... P, U = 40
C/+125
C, G = 65
C/+150
C
Operating Temperature Range .. P, U = 25
C/+85
C, G = 55
C/+125
C
Lead Temperature (soldering, 10s) .................................................... 300
C
SOIC (soldering, 3s) ..................................................................... +260
C
Output Short-Circuit Duration
(3)
................................................. Continuous
Junction Temperature ....................................................................... +175
C
NOTES: (1) Packages must be derated based on
JC
= 30
C/W or
JA
= 120
C/W. (2) For supply voltages less than
18VDC the absolute maximum input voltage is equal
to: 18V > V
IN
> V
CC
8V. See Figure 2. (3) Short circuit may be to power supply common only. Rating applies to +25
C ambient. Observe dissipation limit and T
J
.
A
B
D
C
1
2
3
4
5
6
7
Out A
In A
+ In A
+ V
CC
+In B
In B
Out B
14
13
12
11
10
9
8
Out D
In D
+In D
V
CC
+In C
In C
Out C
A
B
D
C
1
2
3
4
5
6
7
8
Out A
In A
+ In A
+ V
CC
+In B
In B
Out B
NC
16
15
14
13
12
11
10
9
Out D
In D
+In D
V
CC
+In C
In C
Out C
NC
4
OPA404
DICE INFORMATION
PAD
FUNCTION
8
Output C
9
Input C
10
+Input C
11
V
CC
12
+Input D
13
Input D
14
Output D
PAD
FUNCTION
1
Output A
2
Input A
3
+Input A
4
+V
CC
5
+Input B
6
Input B
7
Output B
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
108 x 108
5
2.74 x 2.74
0.13
Die Thickness
20
3
0.51
0.08
Min. Pad Size
4 x 4
0.10 x 0.10
Backing
None
Substrate Bias: V
CC
NC: No connection
1
2
3
4
NC
8
9
10
11
NC
12
NC
13
14
NC
NC
5
6
7
NC
OPA404 DIE TOPOGRAPHY
TYPICAL PERFORMANCE CURVES
T
A
= +25
C, V
CC
=
15VDC unless otherwise noted.
1
10
100
1k
10k
100k
1M
Frequency (Hz)
0.1
100
10
1
Current Noise (fA/ Hz)
INPUT CURRENT NOISE SPECTRAL DENSITY
100
1k
10k
100k
1M
10M
100M
Source Resistance ( )
1
1k
100
10
Voltage Noise, E
O
(nV/ Hz)
TOTAL INPUT VOLTAGE NOISE SPECTRAL DENSITY
AT 1kHz vs SOURCE RESISTANCE
OPA404 + Resistor
E
O
S
R
Resistor noise only
75
50
0
+25
+50
+100
+125
Temperature (C)
90
110
105
95
CMR and PSR (dB)
POWER SUPPLY REJECTION AND COMMON-MODE
REJECTION vs TEMPERATURE
100
25
+75
PSR
CMR
50
+25
25
0
+50
+75
+100
+125
Ambient Temperature (C)
0.1
1
10
100
1nA
10nA
Bias Current (pA)
BIAS AND OFFSET CURRENT
vs TEMPERATURE
0.1
1
10
100
1nA
10nA
Offset Current (pA)
Bias Current
Offset Current
5
OPA404
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
C, V
CC
=
15VDC unless otherwise noted.
15
10
5
0
+5
+10
+15
Common-Mode Voltage (V)
0.01
10
1
0.1
Bias Current (pA)
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
0.01
10
1
0.1
Offset Current (pA)
Offset Current
Bias Current
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Common-Mode Rejection (dB)
COMMON-MODE REJECTION
vs FREQUENCY
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Voltage Gain (dB)
OPEN-LOOP FREQUENCY RESPONSE
180
135
90
45
Phase Shift (Degrees)
A
OL
R
L
= 2k
C
L
= 100pF
1
1k
10
100
10k
100k
1M
10M
Frequency (Hz)
0
20
40
60
80
100
120
140
Power Supply Rejection (dB)
POWER SUPPLY REJECTION
vs FREQUENCY
+
15
10
0
+5
+10
+15
Common-Mode Voltage (V)
70
120
80
Common-Mode Rejection (dB)
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
90
5
100
110
75
50
0
+25
+50
+100
+125
Ambient Temperature (C)
2
10
8
4
Gain Bandwidth (MHz)
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
6
25
+75
33
40
36
34
Slew Rate (V/s)
35
GBW
Slew Rate
6
OPA404
0
10
20
Supply Voltage (V
CC
)
5
8
6
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
7
5
15
32
38
34
Gain Bandwidth (MHz)
36
GBW
Slew Rate
R
L
= 10k
A
V
= +1
Slew Rate (V/s)
75
50
0
+25
+50
+100
+125
Ambient Temperature (C)
80
120
110
90
Voltage Gain (dB)
OPEN-LOOP GAIN vs TEMPERATURE
100
25
+75
SMALL SIGNAL TRANSIENT RESPONSE
Time(s)
0
1
2
Output Voltage (mV)
0
50
100
100
150
50
150
LARGE SIGNAL TRANSIENT RESPONSE
Time(s)
0
1
2
3
4
5
Output Voltage (V)
10
0
10
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
C, V
CC
=
15VDC unless otherwise noted.
10k
100k
10M
Frequency (Hz)
0
30
20
10
MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
1M
R
L
= 2k
Output Voltage (Vp-p)
1
10
1k
Closed-Loop Gain (V/V)
0
5
1
SETTLING TIME vs CLOSED-LOOP GAIN
100
Settling Time (s)
2
3
4
0.01%
C
L
= 100pF
R
L
= 2k
0.1%
7
OPA404
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
C, V
CC
=
15VDC unless otherwise noted.
10
100
100k
Frequency (Hz)
150
140
130
120
110
0
CHANNEL SEPARATION vs FREQUENCY
10k
Channel Separation (dB)
1k
R
L
= 2k
R
L
=
0.1
1
10
100
1k
10k
100k
Frequency (Hz)
1
0.1
0.01
0.001
THD + N (% rms)
TOTAL HARMONIC DISTORTION vs FREQUENCY
6.5Vrms
40.2k
2k
402
A
V
= +101V/V
A
V
= +101V/V
A
V
= +1V/V
Test
Limit
0
10
20
Supply Voltage (V
CC
)
92
104
96
OPEN-LOOP GAIN vs SUPPLY VOLTAGE
100
5
15
Voltage Gain
1
10
100
1k
10k
100k
1M
Frequency (Hz)
1k
100
10
1
Voltage Noise (nV/ Hz)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
75
50
0
+25
+50
+100
+125
Ambient Temperature (C)
11
10
9
8
7
Supply Current (mA)
25
+75
SUPPLY CURRENT vs TEMPERATURE
8
OPA404
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA404 offset voltage is laser-trimmed and will require
no further trim for most applications. If desired, offset volt-
age can be trimmed by summing (see Figure 1). With this
trim method there will be no degradation of input offset drift.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce "hum" pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA404. To avoid leakage,
utmost care must be used in planning the board layout. A
"guard" pattern should completely surround the high
imped-
ance input leads and should be connected to a low-impedance
point which is at the signal input potential. (See Figure 3).
FIGURE 2. Input Current vs Input Voltage with
V
CC
Pins
Grounded.
15
10
5
0
+5
+10
+15
Input Voltage (V)
2
+2
+1
1
Input Current (mA)
INPUT CURRENT vs INPUT VOLTAGE
WITH V
CC
PINS GROUNDED
0
Maximum Safe Current
Maximum Safe Current
I
IN
V
FIGURE 3. Connection of Input Guard.
HANDLING AND TESTING
Measuring the unusually low bias current of the OPA404 is
difficult without specialized test equipment; most commer-
cial benchtop testers cannot accurately measure the OPA404
bias current. Low-leakage test sockets and special test
fixtures are recommended if incoming inspection of bias
current is to be performed.
To prevent surface leakage between pins, the DIP package
should not be handled by bare fingers. Oils and salts from
fingerprints or careless handling can create leakage currents
that exceed the specified OPA404 bias currents.
If necessary, DIP packages and PC board assemblies can be
cleaned with Freon TF
, baked for 30 minutes at 85
C,
rinsed with de-ionized water, and baked again for 30 min-
utes at 85
C. Surface contamination can be prevented by the
application of a high-quality conformal coating to the cleaned
PC board assembly.
15V
+15V
2mV
Offset
Trim
150k
100k
In
Out
20
1/4
OPA404
FIGURE 1. Offset Voltage Trim.
INPUT PROTECTION
Conventional monolithic FET operational amplifiers require
external current-limiting resistors to protect their inputs against
destructive currents that can flow when input FET gate-to-
substrate isolation diodes are forward-biased. Most BIFET
amplifiers can be destroyed by the loss of V
CC
.
Unlike BIFET amplifiers, the
Difet
OPA404 requires input
current limiting resistors only if its input voltage is greater
than 8 volts more negative than V
CC
. A 10k
series resistor
will limit the input current to a safe value with up to
15V
input levels even if both supply voltages are lost. (See Figure
2 and Absolute Maximum Ratings).
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device.
In precision operational amplifiers (both bipolar and FET
types), this may cause a noticeable degradation of offset
voltage and drift.
Static protection is recommended when handling any preci-
sion IC operational amplifier.
In
Out
Non-Inverting
In
Out
Buffer
In
Out
Inverting
For input guarding,
guard top and bottom of board.
9
OPA404
BIAS CURRENT CHANGE
vs COMMON-MODE VOLTAGE
The input bias currents of most popular BIFET operational
amplifiers are affected by common-mode voltage (Figure 4).
Higher input FET gate-to-drain voltage causes leakage and
ionization (bias) currents to increase. Due to its cascode
input stage, the extremely low bias current of the OPA404 is
not compromised by common-mode voltage.
APPLICATIONS CIRCUITS
Figures 5 through 11 are circuit diagrams of various appli-
cations for the OPA404.
In
Out
Zero
1M
2
3
1
6
7
5
Polypropylene
1F
Gain = 100
V
OS
< 10V
Drift
0.05V/C
Zero Droop
1V/s
Referred to Input
1/4
OPA404
100k
10k
100k
100
Operate
1/4
OPA404
10
5
0
+5
+10
20
10
0
10
20
30
40
50
60
70
80
Input Bias Current (pA)
LF155
OP-15/16/17
AD547
LF156/157
AD547
OPA404
LF156/157
T
A
= +25C; curves taken from
mfg. published typical data
Common-Mode Voltage (VDC)
15
+15
LF155
OPA404
FIGURE 4. Input Bias Current vs Common-Mode Voltage.
FIGURE 5. Auto-Zero Amplifier.
FIGURE 6. Low-Droop Positive Peak Detector.
Input
Output
6
7
5
2
3
1
10k
IN914
1M
2N4117
0.01F Polstyrene
Droop
0.1mV/s
10pF
1/4
OPA404
1/4
OPA404
IN914
(1)
(1)
(1)
NOTE: (1) Reverse polarity for negative peak detection.
10
OPA404
FIGURE 7. Voltage-Controlled Microamp Current Source.
FIGURE 9. FET Instrumentation Amplifier with Shield Driver.
FIGURE 8. Sensitive Photodiode Amplifier.
E
1
E
1
Output = 1A/V
I
O
1
2
3
1M
R
6
5
3
2
INA105
Differential
Input
1
I
O
= (E
1
E
2
) /R
Load
1/4
OPA404
+15V
Output
0.01F
Guard
Pin Photodiode
UDT Pin-040A
2
3
8
4
1
15V
<1pF to prevent gain peaking
5 x 8
8
V/W
0.1F
0.01F
1/4
OPA404
Circuit must be well shielded.
1000M
1000M
12
13
3
1
2
6
7
5
10
9
8
14
1/4
OPA404
1/4
OPA404
1/4
OPA404
1/4
OPA404
Input
+
Guard
20k
20k
Guard
R
F
10k
R
F
10k
20k
20k
A
V
= 101V/V
I
1pA
R
10
13
BW
100kHz
Differential Voltage Gain = 1+ (2R
F
/R
G
)
B
IN
R
G
/2
100
R
G
/2
100
11
OPA404
FIGURE 10. 8-Pole 10Hz Low-Pass Filter.
FIGURE 11. Wide-Band Amplifier.
Gain = +1V/V
48dB/Octave, 10Hz LPF
Butterworth Response
0.47F
57.6k
9.53k
2
3
1
A
0.47F
44.2k
12.1k
4
5
7
B
0.22F
61.9k
18.7k
9
10
8
C
0.033F
127k
60.4k
13
12
14
D
1F
1F
1F
1F
Out
In
1k
1k
1k
1k
A
Out
B
C
D
4.02k
4.02k
4.02k
4.02k
A
V
= +635
BW
650kHz
Gain-Bandwidth
410MHz
In
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