OPA606
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Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
Wide-Bandwidth
Difet
OPERATIONAL AMPLIFIER
FEATURES
q
WIDE BANDWIDTH: 13MHz typ
q
HIGH SLEW RATE: 35V/
s typ
q
LOW BIAS CURRENT: 10pA max at
T
A
= +25
C
q
LOW OFFSET VOLTAGE: 500
V max
q
LOW DISTORTION: 0.0035% typ at 10kHz
APPLICATIONS
q
OPTOELECTRONICS
q
DATA ACQUISITION
q
TEST EQUIPMENT
q
AUDIO AMPLIFIERS
DESCRIPTION
The OPA606 is a wide-bandwidth monolithic
dielectrically-isolated FET (Difet
) operational ampli-
fier featuring a wider bandwidth and lower bias cur-
rent than BIFET
LF156A amplifiers. Bias current is
specified under warmed-up and operating conditions,
as opposed to a junction temperature of +25
C.
Laser-trimmed thin-film resistors offer improved off-
set voltage and noise performance.
The OPA606 is internally compensated for unity-gain
stability.
Difet
; Burr-Brown Corp.
BIFET
; National Semiconductor Corp.
+In
3
+V
CC
7
V
CC
4
In
2
Trim
5
Trim
1
Simplified Circuit
V
OUT
6
1985 Burr-Brown Corporation
PDS-598D
Printed in U.S.A. July, 1995
2
OPA606
SPECIFICATIONS
ELECTRICAL
At V
CC
=
15VDC and T
A
= +25
C unless otherwise noted.
OPA606KM
OPA606LM
OPA606KP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
FREQUENCY RESPONSE
Gain Bandwidth
Small Signal
10
12.5
11
13
9
12
MHz
Full Power Response
20Vp-p, R
L
= 2k
515
550
470
kHz
Slew Rate
V
O
=
10V,
22
33
25
35
20
30
V/
s
R
L
= 2k
Settling Time
(1)
: 0.1%
Gain = 1,
1.0
1.0
1.0
s
R
L
= 2k
0.01%
10V Step
2.1
2.1
2.1
s
Total Harmonic Distortion
G = +1, 20Vp-p
0.0035
0.0035
0.0035
%
R
L
= 2k
f = 10kHz
INPUT OFFSET VOLTAGE
(2)
Input Offset Voltage
V
CM
= 0VDC
180
1.5mV
100
500
300
3mV
V
Average Drift
T
A
= T
MIN
to T
MAX
5
3
5
10
V/
C
Supply Rejection
V
CC
=
10V to
18V
82
100
90
104
80
90
dB
10
79
6
32
32
100
V/V
BIAS CURRENT
(2)
Input Bias Current
V
CM
= 0VDC
7
15
5
10
8
25
pA
OFFSET CURRENT
(2)
Input Offset Current
V
CM
= 0VDC
0.6
10
0.4
5
1
15
pA
NOISE
Voltage, f
O
= 10Hz
100% tested (L)
37
30
40
37
nV/
Hz
100Hz
100% tested (L)
21
20
28
21
nV/
Hz
1kHz
100% tested (L)
14
13
16
14
nV/
Hz
10kHz
(3)
12
11
13
12
nV/
Hz
20kHz
(3)
11
10.5
13
11
nV/
Hz
f
B
= 10Hz to 10kHz
(3)
1.3
1.2
1.5
1.3
Vrms
Current, f
O
= 0.1Hz thru 20kHz
(3)
1.5
1.3
2
1.7
fA/
Hz
IMPEDANCE
Differential
10
13
|| 1
10
13
|| 1
10
13
|| 1
|| pF
Common-Mode
10
14
|| 3
10
14
|| 3
10
14
|| 3
|| pF
VOLTAGE RANGE
Common-Mode Input Range
10.5
11.5
11
11.6
10.2
11
V
Common-Mode Rejection
V
IN
=
10VDC
80
95
85
96
78
90
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
95
115
100
118
90
110
dB
RATED OUTPUT
Voltage Output
R
L
= 2k
11
12.2
12
12.6
11
12
V
Current Output
V
O
=
10VDC
5
10
5
10
5
10
mA
Output Resistance
DC, Open Loop
40
40
40
Load Capacitance Stability
Gain = +1
1000
1000
1000
pF
Short Circuit Current
10
20
10
20
10
20
mA
POWER SUPPLY
Rated Voltage
15
15
15
VDC
Voltage Range,
Derated Performance
5
18
5
18
5
18
VDC
Current, Quiescent
I
O
= 0mADC
6.5
9.5
6.2
9
6.5
10
mA
TEMPERATURE RANGE
Specification
Ambient Temperature
KM, KP, LM
0
+70
0
+70
0
+70
C
Operating
Ambient Temperature
55
+125
55
+125
40
+85
C
JA
200
200
155
C/W
NOTES: (1) See settling time test circuit in Figure 2. (2) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (3) Sample
testedthis parameter is guaranteed on L grade only.
3
OPA606
CONNECTION DIAGRAMS
Top View
TO-99
Top View
DIP
PACKAGE INFORMATION
PACKAGE DRAWING
MODEL
PACKAGE
NUMBER
(1)
OPA606KM
TO-99
001
OPA606LM
TO-99
001
OPA606KP
Plastic DIP
006
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
TEMPERATURE
MODEL
PACKAGE
RANGE
OPA606KM
TO-99
0
C to 70
C
OPA606LM
TO-99
0
C to 70
C
OPA606KP
Plastic DIP
0
C to 70
C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ..............................................................................
18VDC
Internal Power Dissipation
(1)
......................................................... 500mW
Differential Input Voltage ...............................................................
36VDC
Input Voltage Range .....................................................................
18VDC
Storage Temperature Range ................................... M = 65
C to +150
C
P = 40
C to +85
C
Operating Temperature Range ................................ M = 55
C to +125
C
P = 40
C to +85
C
Lead Temperature (soldering, 10s) ................................................ +300
C
Output Short-Circuit Duration
(3)
................................................ Continuous
Junction Temperature .................................................................... +175
C
NOTES: (1) Packages must be derated based on
JC
= 15
C/W or
JA
. (2)
For supply voltages less than
18VDC, the absolute maximum input
voltage is equal to the negative supply voltage. (3) Short circuit may be to
power supply common only. Rating applies to +25
C ambient. Observe
dissipation limit and T
J
.
OPA606KM
OPA606LM
OPA606KP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
TEMPERATURE RANGE
Specification Range
Ambient Temp.
0
+70
0
+70
0
+70
C
INPUT OFFSET VOLTAGE
(1)
Input Offset Voltage
V
CM
= 0VDC
400
2mV
335
750
750
3.5mV
V
Average Drift
5
3
5
10
V/
C
Supply Rejection
V
CC
=
10V to
18V
80
98
85
100
78
95
dB
13
100
10
56
18
126
V/V
BIAS CURRENT
(1)
Input Bias Current
V
CM
= 0VDC
158
339
113
226
181
566
pA
OFFSET CURRENT
(1)
Input Offset Current
V
CM
= 0VDC
14
226
9
113
23
339
pA
VOLTAGE RANGE
Common-Mode Input Range
10.4
11.4
10.9
11.5
10
10.9
V
Common-Mode Rejection
V
IN
=
10VDC
78
92
82
95
75
88
dB
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
R
L
2k
90
106
95
112
88
104
dB
RATED OUTPUT
Voltage Output
R
L
= 2k
10.5
12
11.5
12.4
10.4
11.8
V
Current Output
V
O
=
10VDC
5
10
5
10
5
10
mA
POWER SUPPLY
Current, Quiescent
I
O
= 0mADC
6.6
10
6.4
9.5
6.6
10.5
mA
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up.
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At V
CC
=
15VDC and T
A
= T
MIN
to T
MAX
unless otherwise noted.
8
7
1
4
5
3
2
6
V
CC
+V
CC
NC
Offset Trim
Output
Offset Trim
In
+In
Case is connected to V
CC.
1
2
3
4
8
7
6
5
NC
+V
CC
Output
Offset Trim
Offset Trim
In
+In
V
CC
4
OPA606
DICE INFORMATION
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
65 x 54
5
1.65 x 1.37
0.13
Die Thickness
20
3
0.51
0.08
Min. Pad Size
4 x 4
0.10 x 0.10
Backing
None
Transistor Count
43
PAD
FUNCTION
1
Offset Trim
2
In
3
+In
4
V
S
5
Offset Trim
6
Output
7
+V
S
8
NC
NC
No Connection
Substrate Bias: No Connection.
OPA606 DIE TOPOGRAPHY
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
5
OPA606
TYPICAL PERFORMANCE CURVES
T
A
= +25
C, V
CC
=
15VDC unless otherwise noted.
INPUT VOLTAGE NOISE SPECTRAL DENSITY
1k
100
10
1
Voltage Noise (nV/
Hz)
10
100
1k
10k
100k
Frequency (Hz)
LM
OPEN-LOOP FREQUENCY RESPONSE
140
120
100
80
60
40
20
0
Voltage Gain (dB)
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
100M
45
90
135
180
Phase Shift (degrees)
Gain
BIAS AND OFFSET CURRENT vs TEMPERATURE
10nA
1nA
100
10
1
0.1
Bias Current (pA)
Ambient Temperature (C)
50
25
0
25
50
75
100
125
I
OS
I
B
10nA
1nA
100
10
1
0.1
Offset Current (pA)
BIAS AND OFFSET CURRENT vs
INPUT COMMON-MODE VOLTAGE
1nA
100
10
1
Bias Current (pA)
Common-Mode Voltage (V)
15
10
5
0
5
10
15
I
OS
I
B
1nA
100
10
1
Offset Current (pA)
POWER SUPPLY REJECTION
vs FREQUENCY
140
120
100
80
60
40
20
0
Power Supply Rejection (dB)
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
100M
V
CC
+V
CC
COMMON-MODE REJECTION
vs FREQUENCY
140
120
100
80
60
40
20
0
Common-Mode Rejection (dB)
Frequency (Hz)
10
100
1k
10k
100k
1M
10M
100M
6
OPA606
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
C, V
CC
=
15V unless otherwise noted.
MAXIMUM UNDISTORTED OUTPUT
VOLTAGE vs FREQUENCY
30
20
10
0
Output Voltage (V p-p)
Frequency (Hz)
10k
100k
1M
10M
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
14
12
10
8
Gain-Bandwidth (MHz)
Supply Voltage (V
CC
)
0
5
10
15
20
40
35
30
25
Slew Rate (V/s)
GBW
S/R
SUPPLY CURRENT vs TEMPERATURE
8
7
6
5
4
Supply Current (mA)
Ambient Temperature (C)
75
50
25
0
25
50
75
100
125
OPEN-LOOP GAIN vs TEMPERATURE
130
120
110
100
90
Voltage Gain (dB)
Ambient Temperature (C)
75
50
25
0
25
50
75
100
125
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
16
14
12
10
8
Gain-Bandwidth (MHz)
Ambient Temperature (C)
75
50
25
0
25
50
75
100
125
38
36
34
32
30
Slew Rate (V/s)
GBW
S/R
OPEN-LOOP GAIN AND SUPPLY CURRENT
vs SUPPLY VOLTAGE
120
110
100
Voltage Gain (dB)
Supply Voltage (V
CC
)
0
5
10
15
20
10
9
8
7
6
5
4
Supply Current (mA)
7
OPA606
TYPICAL PERFORMANCE CURVES
(CONT)
T
A
= +25
C, V
CC
=
15V unless otherwise noted.
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA606 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifi-
ers, externally trimming the remaining offset can change
drift performance by about 0.5
V/
C for each millivolt of
adjusted offset. Note that the trim (Figure 1) is similar to
operational amplifiers such as LF156 and OP-16. The
OPA606 can replace most other amplifiers by leaving the
external null circuit unconnected.
FIGURE 1. Offset Voltage Trim.
SETTLING TIME vs CLOSED-LOOP GAIN
10
8
6
4
2
0
Settling Time (s)
Closed-Loop Gain (V/V)
1
10
100
1k
TOTAL HARMONIC DISTORTION
vs FREQUENCY
0.01
0.008
0.006
0.004
0.002
0
Frequency (Hz)
100
1k
10k
100k
Test Equipment
Limit
G = +1
V
O
= 7V
rms
Total Harmonic Distortion (%)
+80
0
80
0.5
0
1
+40
+40
SMALL SIGNAL TRANSIENT RESPONSE
Time (s)
Output Voltage (mV)
LARGE SIGNAL TRANSIENT RESPONSE
Time (s)
Output Voltage (V)
+15
0
15
2.5
0
5
100k
2
3
1
+V
CC
4
7
NOTE: (1) 10k
to 1M
Trim Potentiometer
(100k
Recommended)
V
CC
5
6
(1)
OPA606
50mV Typical
Trim Range
8
OPA606
INPUT PROTECTION
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift. Static protection is recommended when handling any
precision IC operational amplifier.
If the input voltage exceeds the amplifier's negative supply
voltage, input current limiting must be used to prevent
damage.
CIRCUIT LAYOUT
Wideband amplifiers require good circuit layout techniques
and adequate power supply bypassing. Short, direct connec-
tions and good high frequency bypass capacitors (ceramic or
tantalum) will help avoid noise pickup or oscillation.
GUARDING AND SHIELDING
As in any situation where high impedances are involved,
careful shielding is required to reduce "hum" pickup in input
leads. If large feedback resistors are used, they should also
be shielded along with the external input circuitry.
Leakage currents across printed circuit boards can easily
exceed the bias current of the OPA606. To avoid leakage
problems, it is recommended that the signal input lead of the
OPA606 be wired to a Teflon
standoff. If the OPA606 is to
be soldered directly into a printed circuit board, utmost care
must be used in planning the board layout.
A "guard" pattern should completely surround the high
impedance input leads and should be connected to a low
impedance point which is at the signal input potential (see
Figure 3).
FIGURE 3. Connection of Input Guard.
APPLICATIONS CIRCUITS
FIGURE 4. Inverting Amplifier.
FIGURE 5. Noninverting Buffer.
FIGURE 2. Settling Time Test Circuit.
DUT
2
6
Scope
3
0.1%
0.1%
2k
7
4
2N4416
2N4416
100pF
3k
2k
2k
0.1%
5k
Summing
Node
V
OUT
G = 1
+15V
15V
+15V
+5V
5V
0.1%
5k
2
3
In
Noninverting
6
Out
2
3
In
Inverting
6
Out
2
3
In
Buffer
6
Out
OPA606
OPA606
OPA606
BOARD LAYOUT
FOR INPUT GUARDING
Guard top and bottom of board.
Alternate: use Teflon
standoff
for sensitive input pins.
Teflon
E. I. Du Pont
de Nemours & Co.
7
6
8
TO-99 Bottom View
3
2
4 5
6
7
8
1
Mini-DIP Bottom View
3
2
4
1
5
Output
+15VDC
10k
15VDC
OPA606
BANDWIDTH > 1MHz
T
S
1.8sec (0.01%)
GAIN = 10V/V
Input
4
1k
3
2
7
0.1F
0.1F
6
Output
+15VDC
15VDC
OPA606
Input
0.1F
0.1F
4
7
2
3
Bandwidth > 12MHz
Gain = +1V/V
R
IN
10
13
6
9
OPA606
FIGURE 6. Absolute Value Current-to-Voltage Circuit.
FIGURE 10. Low Noise/Low Distortion RIAA Preamplifier.
FIGURE 7. High-Speed Photodetector.
FIGURE 8. Isolating Load Capacitance from Buffer.
FIGURE 9. Differential Input/Differential Output Amplifier.
Output
Voltage
+15V
1M
15V
OPA606
Current
Input
4
3
2
7
6
E
O
i
0
0
E
O
= |i| R = 1V/A
i
1M
Output
+15V
150k
15V
OPA606
1. Circuit must be well shielded.
2. Stray capacitance is critical.
3. Bandwidth
1MHz
4. Output
22V/mW/cm
2
+15V
6
3
2
7
0.01F
0.01F
4
150k
150k
0.1F
Pin Photodiode
Motorola
MRD721
10k
3 Metal-film
resistors
0.2pF if necessary to
prevent gain peaking
Load
OPA606
Input
2
3
Optimize response for particular
load condition with C
1
and R
1
.
6
10k
100
R
1
C
1
20pF
OPA606
2
3
6
10k
OPA606
3
2
6
10k
R
G
2k
1. Bandwidth
1.2MHz
2. Differential Gain = 11
3. Differential Output
50Vp-p
4. Differential Slew Rate
65V/s
Differential Gain = 1 + (2 x 10k
)/R
G
Differential
Input
Differential
Output
Moving Magnet
Cartridge
Output
49.9
OPA37EJ
1. Load R and C per cartridge manufacturer's recommendations.
2. Use metal film resistors and plastic film capacitors.
3. Bypass V
CC
adequately.
6
3
2
2.49k
150pF
(1)
47.5k
0.1F
7.32k
OPA606
6
2
3
200
0.3F
1.05k
3.74k
10k
10F
Total Mid-band Gain = 40dB
See: "Topology Considerations for RIAA Phono Preamplifiers".
AES reprint #1719.
October 1980, by Walter G. Jung
G
20V/V
G
51V/V
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