OPA644

Comp

Gain Stage

In+

OUT

BIAS

4, 5

7, 8

Gain Stage

Buffer

Low Distortion Current Feedback

OPERATIONAL AMPLIFIER

DESCRIPTION

The OPA644 is a wideband precision current feed-
back operational amplifier featuring exceptionally high
open loop transimpedance and high slew rate. The
current feedback architecture allows for excellent
large signal bandwidth, even at high gains. The high
transimpedance allows this op amp to be used in
applications requiring 16 bits or more of accuracy.
This extra transimpedance at high bandwidths gives
very low distortion and low differential gain and
phase errors. The high slew rate and well-behaved
pulse response allow for superior large signal ampli-
fication in a variety of RF, video and other signal
processing applications. Fabricated on an advanced
complementary bipolar process, the OPA644 offers
exceptional performance in monolithic form.

APPLICATIONS

HIGH-SPEED SIGNAL PROCESSING

HIGH-RESOLUTION VIDEO

PULSE AMPLIFICATION

COMMUNICATIONS

ADC/DAC GAIN AMPLIFIER

RF AMPLIFICATION

MEDICAL IMAGING

AUDIO AMPLIFICATION

FEATURES

SLEW RATE: 2500V/

VERY LOW DIFFERENTIAL GAIN/PHASE
ERROR: 0.008%/0.009

LOW DISTORTION AT 5MHz: 85dBc

HIGH BANDWIDTH: 500MHz

HIGH OPEN LOOP TRANSIMPEDANCE:
2.0M

HIGH LINEARITY

FAST 12-BIT SETTLING: 21ns to 0.01%

UNITY-GAIN STABLE

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OPA644

1993 Burr-Brown Corporation

PDS-1187D

Printed in U.S.A. March, 1998

OPA644

SPECIFICATIONS

ELECTRICAL

At T

= +25

C, V

5V, R

= 100

, C

= 2pF, R

= 402

and all four power supply pins are used, unless otherwise noted.

OPA644U

OPA644UB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

OFFSET VOLTAGE
Input Offset Voltage

2.5

Average Drift

Power Supply Rejection

4.5 to

5.5V

INPUT BIAS CURRENT

(1)

Non-Inverting

Over Specified Temperature

Inverting

Over Specified Temperature

NOISE
Input Voltage Noise Density

f = 100Hz

10.3

nV/

f = 1kHz

2.9

nV/

f = 10kHz

1.9

nV/

f = 1MHz

1.9

nV/

= 100Hz to 200MHz

33.6

Vrms

Inverting Input Bias Current

Noise Density: f = 10MHz

pA/

Non-Inverting Input Current

Noise Density: f = 10MHz

pA/

INPUT VOLTAGE RANGE
Common-Mode Input Range

2.0

2.25

Over Specified Temperature

1.8

2.1

Common-Mode Rejection

INPUT IMPEDANCE
Non-Inverting

500 || 1.0

|| pF

Inverting

Open-Loop Transimpedance

2V, R

= 1k

1.4

2.0

FREQUENCY RESPONSE
Closed-Loop Bandwidth

G = +1V/V

500

MHz

G = +2V/V

300

MHz

G = +5V/V

180

MHz

G = +10V/V

125

MHz

G = +20V/V

MHz

Slew Rate

(1)

G = +2, 2V Step

2500

Settling Time: 0.01%

G = +2, 2V Step

0.1%

G = +2, 2V Step

16.5

G = +2, 2V Step

5.5

Overload Recovery Time

(2)

Spurious Free Dynamic Range

G = 1, f = 5.0MHz

dBc

= 2Vp-p

G = 1, f = 20MHz

dBc

Differential Gain Error at 3.58MHz

G = +2V/V, V

= 0V to 1.4V

0.008

= 150

Differential Phase Error at 3.58MHz

G = +2V/V, V

= 0V to 1.4V

0.009

Degrees

= 150

Gain Flatness to 1dB

G = +1

250

MHz

OUTPUT
Current Output

Over Specified Temperature

Voltage Output

No Load

Over Specified Temperature

3.0

3.5

Voltage Output

= 100

Over Specified Temperature

2.75

3.25

Short Circuit Current

Output Resistance

1MHz, G = +2V/V

0.2

POWER SUPPLY
Specified Operating Voltage

MIN

to T

MAX

Operating Voltage Range

MIN

to T

MAX

4.5

5.5

Quiescent Current

MIN

to T

MAX

TEMPERATURE RANGE
Specification: U

+85

Thermal Resistance,

U, UB

8-Pin SO-8

125

C/W

Specification same as OPA644U.

NOTES: (1) Slew rate is rate of change from 10% to 90% of the output voltage step. (2) Time for the output to resume linear operation after saturation.

OPA644

(1)

Output

(1)

Input

+Input

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.

PIN CONFIGURATION (All Packages)

Top View

SO-8

NOTE: (1) Making use of all four power supply pins is highly recommended,
although not required. Using these four pins, instead of just pins 4 and 7, will
lower the effective pin impedance and substantially lower distortion.

PACKAGE /ORDERING INFORMATION

PACKAGE DRAWING

PRODUCT

PACKAGE

NUMBER

(1)

OPA644U, UB

SO-8 Surface Mount

182

NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book. (2) The "B" grade of the
SO-8 package will be marked with a "B" by pin 8.

ABSOLUTE MAXIMUM RATINGS

Power Supply ..............................................................................

5.5VDC

Internal Power Dissipation .......................... See Thermal Considerations
Differential Input Voltage ..................................................................

1.2V

Input Voltage Range ............................................................................

Storage Temperature Range: U, UB ............................ 40

C to +125

Lead Temperature (soldering, 10s) .............................................. +300

(soldering, SO-8 3s) ....................................... +260

Junction Temperature (T

) ............................................................ +175

ELECTROSTATIC
DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.

ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.

OPA644

HARMONIC DISTORTION vs TEMPERATURE

(G = 1, V

= 2Vp-p, R

= 100

, f

= 5MHz)

100

125

Harmonic Distorotion (dBc)

Temperature (°C)

TYPICAL PERFORMANCE CURVES

(CONT)

At T

= +25

C, V

5V, R

= 100

, C

= 2pF, R

= 402

and all four power supply pins are used, unless otherwise noted. R

= 25

for a gain of +1.

HARMONIC DISTORTION vs FREQUENCY

(G = +10, V

= 2Vp-p, R

= 100

)

100k

Frequency (Hz)

10M

100M

Harmonic Distortion (dBc)

100

5MHz HARMONIC DISTORTION vs OUTPUT SWING

(G = 1, R

= 100

)

100

Output Swing (V)

Harmonic Distortion (dBc)

10MHz HARMONIC DISTORTION vs OUTPUT SWING

(G = 1, R

= 100

)

100

Output Swing (V)

Harmonic Distortion (dBc)

THIRD-ORDER INTERCEPT POINT vs FREQUENCY

(G = 1, R

= 50

, R

= 402

)

10M

100M

Frequency (Hz)

Third-Order Intercept Point (dBm)

NON-INVERTING INPUT

VOLTAGE NOISE vs FREQUENCY

(G = +10)

100

10k

100k

10M

Frequency (Hz)

Voltage Noise (nV/

Hz)

OPA644

LARGE SIGNAL TRANSIENT RESPONSE

(G = +2, R

= 100

)

Time (5ns/Div)

2.0

1.6

1.2

0.8

0.4

0.8

1.2

1.6

2.0

Voltage (V)

FEEDBACK RESISTOR

vs GAIN FOR OPTIMUM BANDWIDTH

100

500

Feedback Resistance (

)

Non-Inverting Gain (V/V)

G = +10V/V CLOSED-LOOP

SMALL SIGNAL BANDWIDTH

10M

100M

135

Frequency (Hz)

Gain (dB)

Phase Shift (°)

Gain

Closed-Loop Phase

Bandwidth

= 144MHz

G = +5V/V CLOSED-LOOP

SMALL SIGNAL BANDWIDTH

10M

100M

135

Frequency (Hz)

Gain (dB)

Phase Shift (°)

Gain

Closed-Loop Phase

Bandwidth

= 181MHz

G = +2V/V CLOSED-LOOP

SMALL SIGNAL BANDWIDTH

10M

100M

135

180

Frequency (Hz)

Gain (dB)

Gain

Closed-Loop Phase

Bandwidth

= 335MHz

G = +1V/V CLOSED-LOOP

SMALL SIGNAL BANDWIDTH

10M

100M

10G

Frequency (Hz)

Gain (dB)

180

225

270

315

360

Phase Shift (°)

Gain

Closed-Loop Phase

Bandwidth

= 558MHz

TYPICAL PERFORMANCE CURVES

(CONT)

At T

= +25

C, V

5V, R

= 100

, C

= 2pF, R

= 402

and all four power supply pins are used, unless otherwise noted. R

= 25

for a gain of +1.

OPA644

APPLICATIONS INFORMATION

THEORY OF OPERATION

This current feedback architecture offers the following im-
portant advantages over voltage feedback architectures: (1)
the high slew rate allows the large signal performance to
approach the small signal performance, and: (2) there is very
little bandwidth degradation at higher gain settings.

The current feedback architecture of the OPA644 provides
the traditional strength of excellent large signal response
with the unusual addition of very high open-loop
transimpedance. This high open-loop transimpedance al-
lows the OPA644 to be used in applications requiring
16 bits or more of accuracy and dynamic linearity.

DC GAIN TRANSFER CHARACTERISTICS

The circuit in Figure 1 shows the equivalent circuit for
calculating the DC gain. When operating the device in the
inverting mode, the input signal error current (I

) is ampli-

fied by the open-loop transimpedance gain (T

). The output

signal generated is equal to T

. Negative feedback is

applied through R

such that the device operates at a gain

equal to R

Inverting Gain = (R

)/(1+1/Loop Gain)

(1)

Non-inverting Gain = (1 + R

)/(1 + 1/Loop Gain) (2)

where: Loop Gain = T(o)/(R

)

(1/(1+T(o)/(R

))

At higher gains the small value inverting input impedance
(R

INV

) causes an apparent loss in bandwidth. This can be

seen from the equation:

Factual = F

IDEAL

/(1 + (R

INV

) (1 + R

))

(3)

This loss in bandwidth at high gains can be corrected
without affecting stability by lowering the value of the
feedback resistor from the specified value of 402

OFFSET VOLTAGE AND NOISE

The output offset is the algebraic sum of the input voltage
and current sources that influence DC operation. The output
offset is calculated by the following equation:

Output Offset Voltage =

(1 + R

)

(4)

(1 + R

)

If all terms are divided by the gain (1 + R

) it can be

observed that input referred offsets improve as gain in-
creases.

The effective noise at the output of the amplifier can be
determined by taking the root sum of the squares of equation
4 and applying the spectral noise values found in the Typical
Performance Curve graph section. This applies to noise from
the op amp only. Note that both the noise figure and
equivalent input offset voltages improve as the closed-loop
gain increases (by keeping R

fixed and reducing R

with

= 0

FIGURE 1. Equivalent Circuit.

For non-inverting operation, the input signal is applied to the
non-inverting (high impedance buffer) input. The output
(buffer) error current (I

) is generated at the low impedance

inverting input. The signal generated at the output is fed
back to the inverting input such that the overall gain is (1 +
R

Where a voltage-feedback amplifier has two symmetrical
high impedance inputs, a current feedback amplifier has a
low inverting (buffer output) impedance and a high non-
inverting (buffer input) impedance.

The closed-loop gain for the OPA644 can be calculated
using the following equations:

FIGURE 2. Output Offset Voltage Equivalent Circuit.

INCREASING BANDWIDTH AT HIGH GAINS

The closed-loop bandwidth can be extended at high gains by
reducing the value of the feedback resistor R

(refer to Figure

1). This bandwidth reduction is caused by the feedback
current being split between R

and R

. As the gain increases

(for a fixed R

), more feedback current is shunted through

, which reduces closed-loop bandwidth. To maintain speci-

fied bandwidth, the following equations can be used to
approximate R

and R

for any gain from

1 to

15:

OPA644

= 424

8G (+ for inverting and for non-inverting)

= (424 8G)/(G 1) (non-inverting)

= (424 + 8G)/G (inverting)

G = Closed-loop gain

WIRING PRECAUTIONS

Maximizing the OPA644's capability requires some wiring
precautions and high-frequency layout techniques. Oscilla-
tion, ringing, poor bandwidth and settling, gain peaking, and
instability are typical problems plaguing all high-speed
amplifiers when they are improperly used. In general, all
printed circuit board conductors should be wide to provide
low resistance, low impedance signal paths. They should
also be as short as possible. The entire physical circuit
should be as small as practical. Stray capacitances should be
minimized, especially at high impedance nodes, such as the
amplifier's input terminals. Stray signal coupling from the
output or power supplies to the inputs should be minimized.
All circuit element leads should be no longer than 1/4 inch
(6mm) to minimize lead inductance, and low values of
resistance should be used. This will minimize time constants
formed with the circuit capacitances and will eliminate
stray, parasitic circuits.

Grounding is the most important application consideration
for the OPA644, as it is with all high-frequency circuits.
Oscillations at high frequencies can easily occur if good
grounding techniques are not used. A heavy ground plane
(2 oz. copper recommended) should connect all unused
areas on the component side. Good ground planes can
reduce stray signal pickup, provide a low resistance, low
inductance common return path for signal and power, and
can conduct heat from active circuit package pins into
ambient air by convection.

Supply bypassing is extremely critical and must always be
used, especially when driving high current loads. Both
power supply leads should be bypassed to ground as close as
possible to the amplifier pins. Tantalum capacitors (2.2

with very short leads are recommended. A parallel 0.01

ceramic must also be added. Surface-mount bypass capaci-
tors will produce excellent results due to their low lead
inductance. Additionally, suppression filters can be used to
isolate noisy supply lines. Properly bypassed and modula-
tion-free power supply lines allow full amplifier output and
optimum settling time performance.

Points to Remember
1) Making use of all four power supply pins will lower the
effective power supply inductance seen by the input and
output stages. This will improve the AC performance in-
cluding lower distortion. The lowest distortion is achieved
when running separated traces to V

and V

. Power supply

bypassing with 0.01

F and 2.2

F surface-mount capacitors

is recommended. It is essential to keep the 0.01

F capacitor

very close to the power supply pins. Refer to the demonstra-
tion board figure in the DEM-OPA64X data sheet for
the recommended layout and component placements.

(2) Whenever possible, use surface mount. Don't use point-
to-point wiring as the increase in wiring inductance will be
detrimental to AC performance. However, if it must be used,
very short, direct signal paths are required. The input signal
ground return, the load ground return, and the power supply
common should all be connected to the same physical point
to eliminate ground loops, which can cause unwanted feed-
back.

3) Surface mount on the backside of the PC Board. Good
component selection is essential. Capacitors used in critical
locations should be a low inductance type with a high quality
dielectric material. Likewise, diodes used in critical loca-
tions should be Schottky barrier types, such as HP5082-
2835 for fast recovery and minimum charge storage. Ordi-
nary diodes will not be suitable in RF circuits.

4) Use a small feedback resistor (usually 25

) in unity-gain

voltage follower applications for the best performance. For
gain configurations, resistors used in feedback networks
should have values of a few hundred ohms for best perfor-
mance. Shunt capacitance problems limit the acceptable
resistance range to about 1k

on the high end and to a value

that is within the amplifier's output drive limits on the low
end. Metal film and carbon resistors will be satisfactory, but
wirewound resistors (even "non-inductive" types) are abso-
lutely unacceptable in high-frequency circuits. Feedback
resistors should be placed directly between the output and
the inverting input on the backside of the PC board. This
placement allows for the shortest feedback path and the
highest bandwidth. A longer feedback path than this will
decrease the realized bandwidth substantially. Refer to the
demonstration board layout at the end of the data sheet.

5) Surface-mount components (chip resistors, capacitors,
etc.) have low lead inductance and are therefore strongly
recommended. Circuits using all surface-mount components
with the OPA644U (SO-8 package) will offer the best AC
performance.

6) Avoid overloading the output. Remember that output
current must be provided by the amplifier to drive its own
feedback network as well as to drive its load. Lowest
distortion is achieved with high impedance loads.

7) Don't forget that these amplifiers use

5V supplies.

Although they will operate perfectly well with +5V and
5.2V, use of

15V supplies will destroy the part.

8) Standard commercial test equipment has not been de-
signed to test devices in the OPA644's speed range. Bench-
top op amp testers and ATE systems will require a special
test head to successfully test these amplifiers.

9) Terminate transmission line loads. Unterminated lines,
such as coaxial cable, can appear to the amplifier to be a
capacitive or inductive load. By terminating a transmission
line with its characteristic impedance, the amplifier's load
then appears purely resistive.

10) Plug-in prototype boards and wire-wrap boards will not
be satisfactory. A clean layout using RF techniques is
essential; there are no shortcuts.

OPA644

INPUT PROTECTION

Static damage has been well recognized for MOSFET de-
vices, but any semiconductor device deserves protection
from this potentially damaging source. The OPA644 incor-
porates on-chip ESD protection diodes as shown in Figure 3.
This eliminates the need for the user to add external protec-
tion diodes, which can add capacitance and degrade AC
performance.

All pins on the OPA644 are internally protected from ESD
by means of a pair of back-to-back reverse-biased diodes to
either power supply as shown. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier's power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally lim-
ited to 10mA or so whenever possible.

The OPA644 utilizes a fine geometry high speed process
that withstands 500V using the Human Body Model and
100V using the machine model. However, static damage can
cause subtle changes in amplifier input characteristics with-
out necessarily destroying the device. In precision opera-
tional amplifiers, this may cause a noticeable degradation of
offset voltage and drift. Therefore, static protection is strongly
recommended when handling the OPA644.

OUTPUT DRIVE CAPABILITY

The OPA644 has been optimized to drive 75

and 100

resistive loads. The device can drive 2Vp-p into a 75

load.

This high-output drive capability makes the OPA644 an
ideal choice for a wide range of RF, IF, and video applica-
tions. In many cases, additional buffer amplifiers are un-
needed.

Many demanding high-speed applications such as
ADC/DAC buffers require op amps with low wideband
output impedance. For example, low output impedance is
essential when driving the signal-dependent capacitances at
the inputs of flash A/D converters. As shown in Figure 4,
the OPA644 maintains very low closed-loop output imped-
ance over frequency. Closed-loop output impedance in-
creases with frequency since loop gain is decreasing with
frequency.

THERMAL CONSIDERATIONS

The OPA644 does not require a heat sink for operation in
most environments. At extreme temperatures and under full
load conditions a heat sink may be necessary.

The internal power dissipation is given by the equation
P

= P

+ P

, where P

is the quiescent power dissipa-

tion and P

is the power dissipation in the output stage due

to the load. (For

5V, P

= 10V

26mA = 260mW,

max). For the case where the amplifier is driving a grounded
load (R

) with a DC voltage (

OUT

) the maximum value of

occurs at

OUT

/ 2, and is equal to P

, max

= (

)

/4R

. Note that it is the voltage across the output

transistor, and not the load, that determines the power
dissipated in the output stage.

The short-circuit condition represents the maximum amount
of internal power dissipation that can be generated. The
variation of output current with temperature is shown in the
Typical Performance Curves.

CAPACITIVE LOADS

The OPA644's output stage has been optimized to drive low
resistive loads. Capacitive loads, however, will decrease the
amplifier's phase margin which may cause high frequency
peaking or oscillations. Capacitive loads greater than 5pF
should be buffered by connecting a small resistance, usually
5

to 25

, in series with the output as shown in Figure 5.

This is particularly important when driving high capacitance
loads such as flash A/D converters.

100

0.1

0.01

0.001

10K

100K

10M

100M

Frequency (Hz)

Output Impedance (

)

= +2V/V

FIGURE 4. Closed-Loop Output Impedance vs Frequency.

FIGURE 5. Driving Capacitive Loads.

OPA644

typically 5

to 25

)

402

External

Internal
Circuitry

FIGURE 3. Internal ESD Protection.

ESD Protection diodes internally
connected to all pins.

OPA644

In general, capacitive loads should be minimized for opti-
mum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.

COMPENSATION

The OPA644 is internally compensated and is stable in unity
gain with a phase margin of approximately 70

. (Note that,

from a stability standpoint, an inverting gain of 1V/V is
equivalent to a noise gain of 2.) Gain and phase response for
other gains are shown in the Typical Performance Curves.

The high-frequency response of the OPA644 in a good
layout is very flat with frequency.

DISTORTION

The OPA644's harmonic distortion characteristics into a
100

load are shown vs frequency and power output in the

Typical Performance Curves. Distortion can be further im-
proved by increasing the load resistance as illustrated in
Figure 6. Remember to include the contribution of the
feedback resistance when calculating the effective load re-
sistance seen by the amplifier.

DG and DP of the OPA644 were measured with the amplifier
in a gain of +2V/V with 75

input impedance and the output

back-terminated in 75

. The input signal selected from the

generator was a 0V to 1.4V modulated ramp with sync pulse.
With these conditions the test circuit shown in Figure 7
delivered a 100IRE modulated ramp to the 75

input of the

video analyzer. The signal averaging feature of the analyzer
was used to establish a reference against which the performance
of the amplifier was measured. Signal averaging was also used
to measure the DG and DP of the test signal in order to
eliminate the generator's contribution to measured amplifier
performance. Typical performance of the OPA644 is 0.008%
differential gain and 0.009

differential phase to both NTSC

and PAL standards.

FIGURE 6. 5MHz Harmonic Distortion vs Load Resistance.

100

Load Resistance (

)

100

200

500

Harmonic Distortion (dBc)

DIFFERENTIAL GAIN AND PHASE

Differential Gain (DG) and Differential Phase (DP) are among
the more important specifications for video applications. DG
is defined as the percent change in closed-loop gain over a
specified change in output voltage level. DP is defined as the
change in degrees of the closed-loop phase over the same
output voltage change. Both DG and DP are specified at the
NTSC sub-carrier frequency of 3.58MHz and the PAL
subcarrier of 4.43MHz. All NTSC measurements were
performed using a Tektronix model VM700A Video
Measurement Set.

FIGURE 7. Configuration for Testing Differential

Gain/Phase.

OPA644

402

TEK TSG 130A

TEK VM700A

NOISE FIGURE

The OPA644's voltage and current noise spectral densities
are specified in the Typical Performance Curves. For RF
applications, however, Noise Figure (NF) is often the pre-
ferred noise specification since it allows system noise per-
formance to be more easily calculated. The OPA644's Noise
Figure vs Source Resistance is shown in Figure 8.

FIGURE 8. Noise Figure vs Source Resistance.

Source Resistance (

)

100

10K

100K

Noise Figure (dB)

NF = 10LOG 1 +

+ (InR

)

4KTR

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